Computer Organization and

Architecture(COA)
BCA-203
Unit-1
 Digital Electronics

• Digital electronics is the branch of electronics that deals with the study of
digital signals and the components that use or create them.
 Computer Architecture Vs Computer Organization
• Computer architecture refers to the design of the internal workings of a
computer system, including the CPU, memory, and other hardware
components.

• Computer organization refers to the operational units and their

interconnections that implement the architecture specification. It deals
with how the components of a computer system are arranged and how
they interact to perform the required operations.
• In summary, Computer Architecture is focused on the design of the
internal workings of a computer system, while Computer Organization is
focused on the implementation of that design.

• Computer Architecture is concerned with the high-level design decisions,

while Computer Organization deals with the low-level implementation
details.
 Signal
• A signal is an electromagnetic or electrical current that is used for
carrying data from one system or network to another.

• There are two main types of signals: Analog signal and Digital signal.
 Analog Signals
• Analog signals were used in many systems to produce signals to carry
information.
• These signals are continuous in both values and time.
• The use of analog signals has declined with the arrival of digital signals.
• In short, to understand analog signals – all signals that are natural or
come naturally are analog signals.
 Digital Signals
• Unlike analog signals, digital signals are not continuous, but signals are
discrete in value and time.
• These signals are represented by binary numbers and consist of different
voltage values.
 Boolean Algebra
• Boolean algebra is the category of algebra in which the variable’s values
are the truth values, true and false, ordinarily denoted 1 and 0
respectively.
• Boolean algebra was invented by George Boole in 1854.
• It is used to analyze and simplify digital circuits or digital gates.
• It is also called Binary Algebra or logical Algebra.
• It has been fundamental in the development of digital electronics.
• The important operations performed in Boolean algebra are: conjunction
(∧), disjunction (∨) and negation (¬).
• Hence, this algebra is far way different from elementary algebra where
the values of variables are numerical and arithmetic operations like
addition, subtraction is been performed on them.
 Boolean Algebra Operations
The basic operations of Boolean algebra are as follows:
• Conjunction or AND operation
• Disjunction or OR operation
• Negation or Not operation
 Boolean Expression
• A logical statement that results in a Boolean value, either be True or
False, is a Boolean expression.
• Boolean expressions are the statements that use logical operators, i.e.,
AND, OR, XOR and NOT. Thus, if we write X AND Y = True, then it is a
Boolean expression.
 Truth Table
• The truth table is a table that gives all the possible values of logical
variables and the combination of the variables.
• It is possible to convert the Boolean equation into a truth table. The
number of rows in the truth table should be equal to 2n, where “n” is the
number of variables in the equation.
• For example, if a Boolean equation consists of 3 variables, then the
number of rows in the truth table is 8. (i.e.,) 23 = 8.
Boolean Algebra Truth Table
 Boolean Algebra Rules
• Variable used can have only two values. Binary 1 for HIGH and Binary 0 for
LOW.
• The complement of a variable is represented by an overbar.
• OR-ing of the variables is represented by a plus (+) sign between them.
For example, the OR-ing of A, B, and C is represented as A + B + C.
• Logical AND-ing of the two or more variables is represented by writing a
dot between them, such as A.B.C. Sometimes, the dot may be omitted like
ABC.
 Laws of Boolean Algebra
• Commutative law
• Associative law
• Distributive law
• AND law
• OR law
• Inversion law
• De Morgan’s Law/Theorem
• Absorption Law
 Commutative Law
This law states that no matter in which order we use the variables. It means
that the order of variables doesn't matter. The order of the input variables
does not matter at all.

For two variables, the commutative law of addition is written as:

A+B = B+A

For two variables, the commutative law of multiplication is written as:

A.B = B.A
 Associative Law
• This law states that the operation can be performed in any order when
the variables priority is same. As '*' and '/' have same priority.

For three variables, the associative law of addition is written as:

A + (B + C) = (A + B) + C

For three variables, the associative law of multiplication is written as:

A(BC) = (AB)C
 Distributive Law
• According to this law, if we perform the OR operation of two or more
variables and then perform the AND operation of the result with a single
variable, then the result will be similar to performing the AND operation of
that single variable with each two or more variable and then perform the
OR operation of that product. This law explains the process of factoring.

For three variables, the distributive law is written as:

A(B + C) = AB + AC (OR Distributive Law)
A+(BC)=(A+B).(A+C) (AND Distributive Law)
 AND Laws
• These laws use the AND operation. Therefore they are called AND laws.

A.0=0 (Annulment Law)

A.1=A (Identity Law)
A.A=A (Idempotent Law)
A . A’= 0 (Complement Law)
 OR Laws
• These laws use the OR operation. Therefore they are called OR laws.

A+0=A (Identity Law)

A+1=1 (Annulment Law)
A+A=A (Idempotent Law)
A + A’= 1 (Complement Law)
 Inverse Law or NOT Law
• In Boolean algebra, the inversion law states that double inversion of
variable results in the original variable itself.

A’’=A (Double Negation or Double Complementation Law)

 De Morgan’s Law/Theorem
• De Morgan’s First Law states that (A.B)’ = A’+B’.
• De Morgan’s Second law states that (A+B)’ = A’. B’.
 Absorption Law
• This law enables a reduction in a complicated expression to a simpler one
by absorbing like terms.
A + (A.B) = A.1+A.B=A[1+B]=A.1=A
A.(A+B)=A.A+A.B=A+A.B=A
A+A’.B=(A+A’)(A+B)=1(A+B)=A+B
A.(A’+B)=A.A’+AB=0+A.B=AB
 Boolean Postulates
• These are a set of Mathematical Laws which can be used in the
simplification of Boolean Expressions.
 Duality Theorem
• The principle of duality is an important concept in Boolean algebra,
particularly in proving various theorems.
• Briefly stated, the principle of duality pronounces that given an
expression which is always valid in boolean algebra, the dual expression is
also always valid.
• The dual expression is found by replacing all + operations with (.), all (.)
operation with (+) all 1's by 0's, and all 0's by 1's.
• As an example given the expression.
A(B+C)=A.B+A.C
The dual of the expression is:
A+(B.C)=(A+B)(A+C)
 Simplification of Boolean Expression
Question: AB + A (B+C) + B (B+C)

Solution:
AB + A (B+C) + B (B+C)
AB + AB + AC + BB + BC {Distributive law; A (B+C) = AB+AC, B (B+C) =
BB+BC}
AB + AB + AC + B + BC {Idempotent law; BB = B}
AB + AC + B + BC {Idempotent law; AB+AB = AB}
AB + AC +B {Absorption law; B+BC = B}
B + AC {Absorption law; AB+B = B}
Hence, the simplified Boolean function will be B + AC.
 Logic Gates
• A logic gate is a digital gate that allows data to be transferred. Logic gates,
use logic to determine whether or not to pass a signal.
• A logic gate is a device that acts as a building block for digital circuits.
• Logic Gates are important digital devices that are mainly based on the
Boolean function.
• Logic gates are used to carry out logical operations on single or multiple
binary inputs and give one binary output.
• In simple terms, logic gates are the electronic circuits in a digital system.
 Types of Logic Gates
Logic
Gates

Basic Universal Arithmetic

Gates Gates Gates

AND NAND XOR

OR NOR XNOR

NOT
 OR Gate
• An OR gate is a digital circuit that has two or more inputs and produces an
output, which is the logical OR of all those inputs.
• In an OR gate, the output of an OR gate attains state 1 if one or more
inputs attain state 1.
• This logical OR is represented with the symbol ‘+’.
• The Boolean expression of the OR gate is Y = A + B, read as Y equals A ‘OR’
B.
 AND Gate
• An AND gate is a digital circuit that has two or more inputs and produces
an output, which is the logical AND of all those inputs.
• In the AND gate, the output of an AND gate attains state 1 if and only if all
the inputs are in state 1.
• The Boolean expression of AND gate is Y = A.B
 NOT Gate
• A NOT gate is a digital circuit that has single input and single output.
• The output of NOT gate is the logical inversion of input.
• Hence, the NOT gate is also called as inverter.
• In a NOT gate, the output of a NOT gate attains state 1 if and only if the
input does not attain state 1.
• The Boolean expression is Y= A’
• It is read as Y equals NOT A.
 Universal Gates
• A universal gate is a gate which can implement any Boolean function
without need to use any other gate type.
• The NAND and NOR gates are universal gates.
• In practice, this is advantageous since NAND and NOR gates are
economical and easier to fabricate and are the basic gates used in all IC
digital logic families.
 NAND Gate
• The NAND gate represents the complement of the AND operation.
• Its name is an abbreviation of NOT AND.
• The graphic symbol for the NAND gate consists of an AND symbol with a
bubble on the output, denoting that a complement operation is
performed on the output of the AND gate.
• The Boolean expression of the NAND gate is
 NOR Gate
• The NOR gate represents the complement of the OR operation.
• Its name is an abbreviation of NOT OR.
• The graphic symbol for the NOR gate consists of an OR symbol with a
bubble on the output, denoting that a complement operation is
performed on the output of the OR gate.
• The Boolean expression of the NOR gate is:
 Exclusive-OR Gate
• XOR gate (sometimes EOR, or EXOR and pronounced as Exclusive OR) is a
digital logic gate that gives a true (1 or HIGH) output when the number of
true inputs is odd.
• An XOR gate implements an exclusive or ( ) from mathematical logic; that
is, a true output results if one, and only one, of the inputs to the gate is
true.
• The Boolean expression of the XOR gate is:
 Exclusive-NOR Gate
• Exclusive-NOR gate or XNOR gate is formed by combining the
Exclusive-OR gate (XOR gate) and the NOT gate.
• The output of Ex-NOR gate is ‘1’, when both inputs are same.
• The Boolean expression of the XNOR gate:
 NAND Gate is a Universal Gate
• To prove that any Boolean function can be implemented using only NAND
gates, we will show that the AND, OR, and NOT operations can be
performed using only these gates.
Implementing NOT gate using NAND only
Implementing AND gate using NAND only
Implementing OR gate using NAND only
 Implementing NOT Gate using NAND Gate
(A.A)'=A' (Idempotent Law)
 Implementing AND Gate using NAND Gate
((AB)' (AB)')'= ((AB)')' (By Idempotent Law)
= AB (Involution Law)
 Implementing OR Gate using NAND Gate
((AA)'(BB)')'= (A'B')’ (By Idempotent Law)
= A''+B'' (By De Morgan’s Law)
= A+B (By involution Law)
 Implementing NOT Gate using NOR Gate
(A+A)'=A' (By Idempotent Law)
 Implementing AND Gate using NOR Gate
((A+A)'(B+B)')'= (A'+B')' (By Idempotent Law)
= A’’.B’’ (By De Morgan’s Law)
= A.B (By involution Law)
 Implementing OR Gate using NOR Gate
((A+A)'+(B+B)')'= (A’.B’)’ (By Idempotent Law)
= A’’+B’’ (By De Morgan’s Law)
= A+B (By involution Law)
 Equivalent Gates
• NAND gate is equivalent to the inverted input OR gate:
• AND gate is equivalent to the inverted input NOR gate
• NOR gate is equivalent to the inverted input AND gate.
• OR gate is equivalent to the inverted input NAND gate:
 Applications of Logic Gates
• Logic gates are used in microcontrollers, microprocessors,
electronic and electrical project circuits, and embedded system
applications. The basic logic gates are categorized into seven types
as AND, OR, XOR, NAND, NOR, XNOR, and NOT.
• These are used in circuits where various power sources are
available to perform the similar action. Implemented in alarm
systems and intrusion detection equipment's. Used in industrial
plants for some protective measures.
 Minterm and Maxterm
• There are two ways in which we can put the Boolean function.
• These ways are the minterm canonical form and maxterm canonical form.
• The product of all literals, either with complement or without
complement, is known as minterm.
• The sum of all literals, either with complement or without complement, is
known as maxterm.
 Minterm
• A minterm is a specific type of Boolean expression that represents
a unique combination of variables in a truth table for which the
output is TRUE (or '1’).
• Each minterm is an AND (product) of all the input variables of a
function, where each variable is either in its original
(uncomplemented) form or in its complemented (negated) form.
• For a Boolean function with n variables, there will be 2n minterms
since each variable can be in one of two states (0 or 1) and there
are n variables.
• Example:
• Consider a function with 2 variables A and B. The possible
minterms are:
1. A′B′: Corresponds to A=0,B=0
2. A′B: Corresponds to A=0,B=1
3. AB′: Corresponds to A=1,B=0
4. AB: Corresponds to A=1,B=1
• For a 3-variable function with A,B, and C as inputs, there would be
8 minterms:
1. A′B′C′
2. A′B′C
3. A′BC′
4. A′BC
5. AB′C′
6. AB′C
7. ABC′
8. ABC
Each minterm corresponds to a unique row in the truth table of the
function.
 Maxterm
• A maxterm is a specific type of Boolean expression that represents
a unique combination of variables in a truth table for which the
output is FALSE (or '0'). Each maxterm is an OR (sum) of all the
input variables of a function, where each variable is either in its
original (uncomplemented) form or in its complemented (negated)
form.
• For a Boolean function with n variables, there will be 2n maxterms,
just like minterms, since each variable can be in one of two states
(0 or 1) and there are n variables.
• Example:
• Consider a function with 2 variables A and B. The possible
maxterms are:
1.(A+B): Corresponds to A=0,B=0
2.(A+B′): Corresponds to A=0,B=1
3.(A′+B): Corresponds to A=1,B=0
4.(A′+B′): Corresponds to A=1,B=1
• For a 3-variable function with A,B, and C as inputs, the possible
maxterms are:
1. (A+B+C)
2. (A+B+C′)
3. (A+B′+C)
4. (A+B′+C′)
5. (A′+B+C)
6. (A′+B+C′)
7. (A′+B′+C)
8. (A′+B′+C′)

Each maxterm corresponds to a unique row in the truth table of the

function.
 Sum of Product(SoP)
• The term "Sum of Products" (SoP) typically refers to a form of
representing Boolean functions. In digital design, Boolean
functions describe how outputs relate to inputs using logic gates.
• In a Sum of Products expression, a function is written as a sum
(logical OR) of product terms (logical ANDs). Each product term is
an AND of literals, where a literal is either a variable or its
negation.
• For instance, consider the Boolean function F for inputs A,B, and
C:
F=A′BC+AB′C′+ABC′
• In this example:
1.A′BC is the first product term (or minterm).
[Link]′C′ is the second product term.
[Link]′ is the third product term.
• All the product terms are ORed together to create the full SoP
expression.
• To determine the function's value:
• For each minterm, if all the literals evaluate to '1' (or true), then
that minterm evaluates to '1'.
• The function's value will be '1' if at least one minterm evaluates to
'1'. If no minterms evaluate to '1', the function's value is '0'.
• The Sum of Products form is widely used in digital design because
it directly relates to the implementation with AND and OR gates.
• Consider a function F of inputs A,B, and C:
• To get the SoP expression:
[Link] the rows where the output F is 1.
[Link] down the product (AND) expression for each of those rows.
[Link] (OR) all those product expressions together.
1. Rows where F=1 are:
• A=0,B=0,C=1
• A=0,B=1,C=0
• A=1,B=0,C=0
• A=1,B=1,C=0

2. Product expressions for these rows are:

• A′B′C (Where A′ is the complement of A)
• A′BC′
• AB′C′
• ABC′

3. Summing them together, we get: F=A′B′C+A′BC′+AB′C′+ABC′

 Product of Sum(Pos)
• The term "Product of Sums" (PoS) is another form of representing
Boolean functions, which is opposite to the Sum of Products (SoP)
form. In a Product of Sums expression, a function is written as a
product (logical AND) of sum terms (logical ORs). Each sum term
is an OR of literals, where a literal is either a variable or its
negation.
• For instance, consider the Boolean function G for inputs A,B, and
C: G=(A+B′+C)(A′+B+C′)
• In this example:
1.(A+B′+C) is the first sum term (or maxterm).
2.(A′+B+C′) is the second sum term.
• Both sum terms are ANDed together to create the full PoS
expression.
• To determine the function's value:
• For each maxterm, if any of the literals evaluates to '1' (or true),
then that maxterm evaluates to '1'.
• The function's value will be '1' if all maxterms evaluate to '1'. If any
maxterm evaluates to '0', the function's value is '0'.
• The Product of Sums form can be derived from a truth table by
looking at the rows where the function is '0' and writing the sum
term (which will be '0' for that row) and then ANDing all these sum
terms together. It's worth noting that while SoP directly relates to an
implementation with AND and OR gates, PoS does the same but
can sometimes be more concise for certain functions.
• Consider a function G of inputs A,B, and C:
• To get the PoS expression:
[Link] the rows where the output G is 0.
[Link] down the sum (OR) expression for each of those rows, such
that the ORed expression evaluates to 0 for that row.
[Link] (AND) all those sum expressions together.

1. Rows where G=0 are:

1. A=0,B=0,C=1
2. A=0,B=1,C=0
3. A=1,B=0,C=0
2. Sum expressions for these rows (OR expressions which are '0' for
that row):
• (A+B+C′) for A=0,B=0,C=1
• (A+B′+C) for A=0,B=1,C=0
• (A′+B+C) for A=1,B=0,C=0

3. Multiplying them together, we get: G=(A+B+C′)(A+B′+C)(A′+B+C)

This is the PoS expression for the given truth table. It should be
noted that in the PoS form, the product expression will be '0' if any of
the OR expressions inside the parentheses evaluate to '0'.
 Karnaugh Map
• K-Map was developed by Maurice Karnaugh in the year of 1953.
• A Karnaugh map or a K-map refers to a pictorial method that is utilised to
minimise various Boolean expressions without using the Boolean algebra
theorems along with the equation manipulations.
• A Karnaugh map can be a special version of the truth table.
• We can easily minimise various expressions that have 2 to 4 variables
using a K-map.
 Rules for creating groups in K-map
• Groups can be vertical or Horizontal but can’t be diagonal.
• Overlapping Allowed.
• Groups should be as large as possible.
• Group must contain 2n cells.
 Solving an Expression Using K-Map
• Here are the steps that are used to solve an expression using the
K-map method:
1. Select a K-map according to the total number of variables.
2. Identify maxterms or minterms as given in the problem.
3. For SOP, put the 1’s in the blocks of the K-map with respect to the
minterms (elsewhere 0’s).
4. For POS, putting 0’s in the blocks of the K-map with respect to the
maxterms (elsewhere 1’s).
5. Making rectangular groups that contain the total terms in the power
of two, such as 2,4,8 ..(except 1) and trying to cover as many
numbers of elements as we can in a single group.
6. From the groups that have been created in step 5, find the product
terms and then sum them up for the SOP form.
 SoP FORM
• 3 variables K-map:
Z = ∑A, B, C (1, 3, 6, 7)
• From the red group, the product term would be — A’C
• From the purple group, the product term would be — AB
• If we sum these product terms, then we will get this final
expression (A’C+AB)
2. 4 variables K-map:
F (P, Q, R, S) = ∑(0, 2, 5, 7, 8, 10, 13, 15)
• From the red group, the product term would be — QS
• From the purple group, the product term would be — Q’S’
• If we sum these product terms, then we will get this final
expression (QS + Q’S’)
• Minimize the following boolean function-
• F(A, B, C, D) = Σm(0, 1, 2, 5, 7, 8, 9, 10, 13, 15)
F(A, B, C, D)= BD + C’D + B’D’
• Minimize the following boolean function-
• F(A, B, C, D) = Σm(0, 1, 3, 5, 7, 8, 9, 11, 13, 15)
F(A, B, C, D)= D + B’C’
• Simplify the following 4-variable Boolean function in SOP form to obtain the
minimal SOP expression.
• F(A,B,C,D)= Σm(0,1,3,5,6,7,10,13,14,15)
• F=A’D+BD+BC+ACD’+A’B’C’
• Minimize: A’B’C’D’+A’B’CD’+AB’C’D’+AB’CD’
• Minimize: A’B’C’D’+A’B’C’D+A’B’CD+A’B’CD’+AB’C’D’+AB’C’D+AB’CD+AB’CD’
• Minimize: A’B’C’D’+A’B’C’D+A’B’CD+A’B’CD’+BC’D’+BCD’+AB’C’D’+AB’D+AB’CD’
• Minimize: A’B’C’D’+AB’CD’+AB’C’D’+ABCD
• Minimize: A’B’C’D’+A’B’C’D+A’BC’D+A’BCD+ABCD+ABCD’+AB’C’D’+AB’CD’
• Minimize: A’B’C’D’+A’B’C’D+A’B’CD+A’BC’D’+A’BC’D+A’BCD+ABC’D’+ABC’D+ABCD
• Minimize: A’B’C’D’+A’B’CD+A’BC’D’+A’BCD+ABC’D’+ABC’D+ABCD+AB’C’D’+AB’CD
• Minimize: C’+ABCD
 PoS FORM
1. 3 variables K-map
F (A, B, C) = π(0,3,6,7)
• From the purple group, the terms would be- AB
• If we take the complement of these two A’B’
• And then sum up them (A’ + B’)
• From the blue group, the terms would be- BC
• When we take the complement of these terms- B’C’
• And then sum them up (B’ + C’)
• From the red group, the terms would be A’ B’ C’
• If we take the complement of the two terms A B C
• And then sum them up (A + B + C)
• If we take the product of these three terms, then we will get this
final expression – (A’ + B’) (B’ + C’) (A + B + C)
2. 4 variables K-map
F (A, B, C, D) = π (3, 5, 7, 8, 10, 11, 12, 13)
• From the blue group, the terms would be BC’D
• We take their complement and then sum them (B’ + C+ D’)
• From the purple group, the terms would be AB’C
• We take their complement and then sum them (A’+B+C’)
• From the red group, the terms would be AC’D’
• We take their complement and then sum them (A’+C+D)
• From the pink group, the terms would be A’CD
• We take their complement and then sum them (A+C’+D’)
• Finally, we will express these in the form of the product –
(B’+C+D’).(A’+B+C’).(A’+C+D).(A+C’+D’)
 Don’t Care Condition
• One of the very significant and useful concepts in simplifying the output
expression using K-Map is the concept of “Don’t Care”.
• The “Don’t Care” conditions allow us to replace the empty cell of a K-
Map to form a grouping of the variables which is larger than that of
forming groups without don’t care.
• A Don’t Care cell can be represented by a cross(X) or minus(-) or phi(Φ)
in K-Maps representing an invalid combination.
• A Don’t Care cell can be represented by a cross(X) or minus(-) or
phi(Φ) in K-Maps representing an invalid combination.
Minimize the following function in SOP minimal form using K-
Maps: F(A, B, C, D) = m(1, 2, 6, 7, 8, 13, 14, 15) + d(3, 5, 12)
• Therefore,
f = AC'D' + A'D + A'C + AB
• SOP Form: BC’+A’C’D+ABD+A’CD’

Take Complement

POS Form: (B’+C)(A+C+D’)(A’+B’+D’)(A+C’+D)

Minimize F(A,B,C,D) = m(0,1,2,3,4,5) + d(10,11,12,13,14,15) in
POS minimal form
The POS form of the given function is:
F(A,B,C,D) = M(6,7,8,9) + d(10,11,12,13,14,15)
• SOP Form: A+BC

Take Complement

POS Form: A’(B’+C’)

• Minimize the following boolean function-
• F(A, B, C, D) = Σm(1, 3, 4, 6, 8, 9, 11, 13, 15) + Σd(0, 2, 14)
F(A, B, C, D)= AD + B’D + B’C’ + A’D’
• Minimize the following boolean function-
• F(A, B, C) = Σm(1, 2, 5, 7) + Σd(0, 4, 6)
F(A, B, C)= B’ + A + C’
 Combinational Logic Circuits
• Combinational logic circuits are a fundamental category of digital
circuits wherein the outputs are solely determined by the current
inputs, with no memory or feedback from past states.
• These circuits rely on the combination of logic gates to produce a
specific output based on input combinations.
 Characteristics of Combinational Logic Circuits
• No Memory: The output depends only on the current values of the
inputs. There's no internal state or memory of previous inputs.

• Instantaneous Output: As soon as the inputs change, the outputs will

start to change. There might be a tiny propagation delay due to the
physical characteristics of the gates, but this delay is ideally minimized.
 Types of Combinational Logic Circuits
• Multiplexers (MUX): They select one of many inputs to forward to the output
based on a set of selection lines.
• Demultiplexers (DEMUX): The opposite of a MUX; it takes a single input and
routes it to one of many outputs.
• Encoders: Converts an N-bit input code to a binary code of M bits where M <
N.
• Decoders: The opposite of an encoder. It converts an N-bit input into a
maximum of 2^N outputs.
• Adders: Used to add two binary numbers. The simplest form is the half adder,
which can be expanded to a full adder, and then multiple full adders can be
chained to create multi-bit adders.
• Comparators: These circuits compare two binary numbers to determine
equality or which one is greater.
 Sequential Logic Circuits
• Sequential logic circuits are a type of digital circuits where the
output is not only dependent on the current inputs but also on the
past history of inputs.
• This memory of past inputs gives rise to the concept of a "state" in
sequential circuits, allowing them to be used for more complex
applications compared to combinational circuits.
 Characteristics of Sequential Logic Circuits
• Memory: Sequential circuits have memory elements that store information
about past inputs, allowing the output to be dependent on both current and
past inputs.

• State: These circuits can exist in one of a number of different states,

determined by the values stored in their memory elements.

• Clock Signal: Many sequential circuits are synchronized by a clock signal, which
controls when the circuit can transition from one state to another.
 Types of Sequential Logic Circuits
• Flip-Flops: The simplest memory elements, storing a single bit of information.
Types include SR, JK, D, and T flip-flops.
• Registers: Groups of flip-flops used to store multi-bit values.
• Counters: Sequential circuits that increment or decrement a number stored in
a register, often in response to a clock signal.
• Shift Registers: A series of flip-flops where the output of one flip-flop is the
input of the next.
 Adder
• An adder is a digital circuit that performs addition of numbers.
• In many computers and other types of processors, adders are used not
only in the arithmetic logic units but also in other parts of the processor,
where they compute addresses, table indices, and similar operations.
• There are several types of adder designs, including:
 Half Adder
 Full Adder
 Ripple Carry Adder
 Carry Lookahead Adder (CLA)
 Carry Select Adder
 Carry Skip Adder
 Binary Coded Decimal (BCD) Adder
 Half Adder
• The half adder is a basic building block for more complex adder circuits such as
full adders and multiple-bit adders.
• It performs binary addition of two single-bit inputs, A and B, and provides two
outputs, SUM and CARRY.
• The SUM output is the least significant bit (LSB) of the result, which is the XOR
of the two inputs A and B.
• The CARRY output is the most significant bit (MSB) of the result, indicating
whether there was a carry-over from the addition of the two inputs. The
CARRY output is the AND of the two inputs A and B.
• Sum = A XOR B
• Carry = A AND B
 Advantages of Half Adder
• The half adder, while simple on its own, forms a fundamental
building block for designing more complex digital addition circuits.
• For example, two half adders can be combined with an OR gate to
create a full adder, which can then be used to construct multi-bit
binary adders like the ripple-carry adder.
 Limitations of Half Adder
• The half adder cannot accept a carry input from a previous stage.
Hence, it's only useful for adding the least significant bits in a multi-
bit binary addition where there is no carry input. For all other bits, a
full adder, which can handle a carry input, is used.
Half Adder using NAND Gates only
Half Adder using NOR Gates only
 Full Adder
• The half adder is used to add only two numbers. To overcome this
problem, the full adder was developed. The full adder is used to add three
1-bit binary numbers A, B and Carry C. The full adder has three input
states and two output states i.e., Sum and Carry.
• Sum=x’y’z+xy’z’+x’yz’+xyz = x y z

• Carry=xy+xz+yz = (x y)z+xy
 Half Subtractor
• The half subtractor is also a building block for subtracting two
binary numbers.
• It has two inputs and two outputs. This circuit is used to subtract
two single bit binary numbers A and B. The 'diff' and 'borrow' are
two output states of the half subtractor.. In the subtraction (A-B), A is
called a Minuend bit and B is called as Subtrahend bit.
The Boolean expression of the Half Subtractor circuit is given
below:
• Diff= A XOR B (A⊕B)
• Borrow= not-A AND B (A'.B)
Half Subtractor using NAND Gates only
Half Subtractor using NOR Gates only
 Full Subtractor
• The Half Subtractor is used to subtract only two numbers. To overcome
this problem, a full subtractor was designed. The full subtractor is used to
subtract three 1-bit numbers A, B, and C, which are minuend, subtrahend,
and borrow, respectively. The full subtractor has three input states and
two output states i.e., diff and borrow.
Diff(D) = x ⊕ y ⊕ z

Borrow (out) = (x ⊕ y )’z+x’ y

 Parallel Binary Adder/Ripple Adder
• A single full adder performs the addition of two one bit numbers and an
input carry.
• But a Parallel Adder is a digital circuit capable of finding the
arithmetic sum of two binary numbers that is greater than one bit in
length by operating on corresponding pairs of bits in parallel.
• It consists of full adders connected in a chain where the output carry
from each full adder is connected to the carry input of the next higher
order full adder in the chain.
• A n bit parallel adder requires n full adders to perform the operation. So
for the two-bit number, two adders are needed while for four bit number,
four adders are needed and so on.
 Parallel Subtractor
• A Parallel Subtractor is a digital circuit capable of finding the arithmetic
difference of two binary numbers that is greater than one bit in length by
operating on corresponding pairs of bits in parallel.
• The parallel subtractor can be designed in several ways including
combination of half and full subtractors, all full subtractors or all full
adders with subtrahend complement input.
 Advantages of Parallel Adder/Subtractor
• The parallel adder/subtractor performs the addition operation faster as
compared to serial adder/subtractor.
• Time required for addition does not depend on the number of bits.
• The output is in parallel form i.e all the bits are added/subtracted at the
same time.
• It is less costly.
 Disadvantages of Parallel Adder/Subtractor
• Each adder has to wait for the carry which is to be generated from the
previous adder in chain.
• The propagation delay( delay associated with the travelling of carry bit) is
found to increase with the increase in the number of bits to be added.
 4-bit binary Adder-Subtractor
• In Digital Circuits, A Binary Adder-Subtractor is capable of both the
addition and subtraction of binary numbers in one circuit itself.
• The circuit consists of 4 full adders since we are performing operations on
4-bit numbers. There is a control line K that holds a binary value of either
0 or 1 which determines that the operation is carried out is addition or
subtraction.
A B =AB’ + A’B

A 0 =A.0’ + A’.0 = A

A 1=A.1’ + A’.1 = A’

Note: If C=0, the circuit work as Adder.

If C=1, the circuit work as Subtractor.
Computer Organization and
Architecture(COA)
BCA-203
Unit-2
 Multiplexer
• A multiplexer is a combinational circuit that has 2n input lines and a single
output line.
• Simply, the multiplexer is a multi-input and single-output combinational
circuit.
• The binary information is received from the input lines and directed to
the output line.
• On the basis of the values of the selection lines, one of these data inputs
will be connected to the output.
• Multiplexers are also known as data selector, parallel to serial convertor,
many to one circuit.
• Multiplexers are mainly used to increase amount of the data that can be
sent over the network within certain amount of time and bandwidth.
• There are n selection lines and 2n input lines. So, there is a total of
2N possible combinations of inputs.
• A multiplexer is also treated as Mux.
Types of Multiplexers
2x1
Multiplexer

16x1 Types of 4x1

Multiplexer Multiplexer
Multiplexers

8x1
Multiplexer
 2x1 Multiplexer
• In 2×1 multiplexer, there are only two inputs, i.e., A0 and A1, 1 selection
line, i.e., S0 and single outputs, i.e., Y.
• On the basis of the combination of inputs which are present at the
selection line S0, one of these 2 inputs will be connected to the output.
 4x1 Multiplexer
• In the 4×1 multiplexer, there is a total of four inputs, i.e., A0, A1, A2, and
A3, 2 selection lines, i.e., S0 and S1 and single output, i.e., Y.
• On the basis of the combination of inputs that are present at the
selection lines S0 and S1, one of these 4 inputs are connected to the
output.
 8x1 Multiplexer
• In the 8 to 1 multiplexer, there are total eight inputs, i.e., A0, A1, A2, A3,
A4, A5, A6, and A7, 3 selection lines, i.e., S0, S1and S2 and single output,
i.e., Y.
• On the basis of the combination of inputs that are present at the
selection lines S0, S1 and S2, one of these 8 inputs are connected to the
output.
 16x1 Multiplexer
• In the 16 to 1 multiplexer, there are total of 16 inputs, i.e., A0, A1 , …,
A16, 4 selection lines, i.e., S0, S1, S2, and S3 and single output, i.e., Y.
• On the basis of the combination of inputs that are present at the
selection lines S0, S1, S2 and S3 one of these 16 inputs will be connected
to the output.
 8 ×1 Multiplexer using 4×1 and 2×1 Multiplexer
• We can implement the 8×1 multiplexer using a lower order multiplexer.
• To implement the 8×1 multiplexer, we need two 4×1 multiplexers and
one 2×1 multiplexer.
• The 4×1 multiplexer has 2 selection lines, 4 inputs, and 1 output.
• The 2×1 multiplexer has only 1 selection line, 2 inputs and 1 output.
 16×1 Multiplexer using 8×1 and 2×1 Multiplexer
• We can implement the 16×1 multiplexer using a lower order multiplexer.
• To implement the 8×1 multiplexer, we need two 8×1 multiplexers and one
2×1 multiplexer.
• The 8×1 multiplexer has 3 selection lines, 4 inputs, and 1 output.
• The 2×1 multiplexer has only 1 selection line, 2 inputs and 1 output.
 Applications of Multiplexer
• Data Routing
• Logic Function Generator
• Control Sequencer
• Parallel to Serial Converter
 Demultiplexer
• A De-multiplexer is a combinational circuit that has only 1 input line and
2N output lines.
• Simply, the multiplexer is a single-input and multi-output combinational
circuit.
• The information is received from the single input lines and directed to the
output line.
• On the basis of the values of the selection lines, the input will be
connected to one of these outputs.
• De-multiplexer is opposite to the multiplexer.
 1x2 De-
Multiplexer

1x16 De- Types of De- 1x4 De-

Multiplexer Multiplexer
Multiplexers

1x8 De-
Multiplexer
 1x2 Demultiplexer
• In the 1 to 2 De-multiplexer, there are only two outputs, i.e., Y0, and Y1, 1
selection lines, i.e., S0, and single input, i.e., A.
• On the basis of the selection value, the input will be connected to one of
the outputs.
 1x4 Demultiplexer
• In 1 to 4 De-multiplexer, there are total of four outputs, i.e., Y0, Y1, Y2,
and Y3, 2 selection lines, i.e., S0 and S1 and single input, i.e., A.
• On the basis of the combination of inputs which are present at the
selection lines S0 and S1, the input be connected to one of the outputs.
 1x8 Demultiplexer
• In 1 to 8 De-multiplexer, there are total of eight outputs, i.e., Y0, Y1, Y2, Y3,
Y4, Y5, Y6, and Y7, 3 selection lines, i.e., S0, S1and S2 and single input, i.e.,
A.
• On the basis of the combination of inputs which are present at the
selection lines S0, S1 and S2, the input will be connected to one of these
outputs.
 1x16 Demultiplexer
• In 1×16 de-multiplexer, there are total of 16 outputs, i.e., Y0, Y1, …, Y16,
4 selection lines, i.e., S0, S1, S2, and S3 and single input, i.e., A.
• On the basis of the combination of inputs which are present at the
selection lines S0, S1, and S2, the input will be connected to one of
these outputs.
1×8 De-multiplexer using 1×4 and 1×2 de-multiplexer
• We can implement the 1×8 de-multiplexer using a lower order de-
multiplexer.
• To implement the 1×8 de-multiplexer, we need two 1×4 de-
multiplexer and one 1×2 de-multiplexer.
• The 1×4 multiplexer has 2 selection lines, 4 outputs and 1 input.
• The 1×2 de-multiplexer has only 1 selection line, 2 outputs and 1
input.
 1×16 De-multiplexer using 1×8 and 1×2 De-multiplexer
• We can implement the 1×16 de-multiplexer using a lower order de-
multiplexer.
• To implement the 1×16 de-multiplexer, we need two 1×8 de-multiplexer
and one 1×2 de-multiplexer.
• The 1×8 multiplexer has 3 selection lines, 1 input, and 8 outputs.
• The 1×2 de-multiplexer has only 1 selection line, 1 input and 2 outputs.
 Decoder
• It is a Multi-input & Multi-output device.
• Decoder is a combinational circuit that converts n lines of input into 2n
lines of output.
• Applications of decoders are converting binary code to other codes.
• Binary to Octal (3x8)
• Binary to Hexadecimal (4x16)
• Binary to Decimal (4x10)
 Encoder
• It is a Multi-input & Multi-output device.
• Encoder is a combinational circuit that converts 2n lines of input into n
lines of output.
• Applications of encoders are converting other codes to Binary codes.
• Octal to Binary (8x3)
• Hexadecimal to Binary (16x4)
• Decimal to Binary (10x4)
 Latch
• Latches are digital circuits that store a single bit of information and hold its value until
it is updated by new input signals.
• They are used in digital systems as temporary storage elements to store binary
information. Latches can be implemented using various digital logic gates, such as
AND, OR, NOT, NAND, and NOR gates.
 There are two types of latches:
1. S-R (Set-Reset) Latches: S-R latches are the simplest form of latches and are
implemented using two inputs: S (Set) and R (Reset). The S input sets the output to 1,
while the R input resets the output to 0. When both S and R are at 1, the latch is said
to be in an “undefined” state.
2. D (Data) Latches: D latches are also known as transparent latches and are
implemented using two inputs: D (Data) and a clock signal. The output of the latch
follows the input at the D terminal as long as the clock signal is high. When the clock
signal goes low, the output of the latch is stored and held until the next rising edge of
the clock.
• Latches are widely used in digital systems for various applications, including data
storage, control circuits, and flip-flop circuits.
• They are often used in combination with other digital circuits to implement
sequential circuits, such as state machines and memory elements.
• In summary, latches are digital circuits that store a single bit of information and hold
its value until it is updated by new input signals.
• There are two types of latches: S-R (Set-Reset) Latches and D (Data) Latches, and
they are widely used in digital systems for various applications.
• Latches are basic storage elements that operate with signal levels (rather than signal
transitions).
• Latches controlled by a clock transition are flip-flops.
• Latches are level-sensitive devices. Latches are useful for the design of asynchronous
sequential circuit.
 SR (Set-Reset) Latch
• They are also known as preset and clear states. The SR latch forms the basic building
blocks of all other types of flip-flops.
• SR Latch is a circuit with:
(i) 2 cross-coupled NOR gate or 2 cross-coupled NAND gate.
(ii) 2 input S for SET and R for RESET.
(iii) 2 output Q, Q’.
SR Latch Truth Table
 Advantages of Latches
1. Easy to Implement: Latches are simple digital circuits that can be easily implemented
using basic digital logic gates.
2. Low Power Consumption: Latches consume less power compared to other sequential
circuits such as flip-flops.
3. High Speed: Latches can operate at high speeds, making them suitable for use in high-
speed digital systems.
4. Low Cost: Latches are inexpensive to manufacture and can be used in low-cost digital
systems.
5. Versatility: Latches can be used for various applications, such as data storage, control
circuits, and flip-flop circuits.
 Disadvantages of Latches
1. No Clock: Latches do not have a clock signal to synchronize their operations, making
their behavior unpredictable.
2. Unstable State: Latches can sometimes enter into an unstable state when both
inputs are at 1. This can result in unexpected behavior in the digital system.
3. Complex Timing: The timing of latches can be complex and difficult to specify,
making them less suitable for real-time control applications.
 Flip Flops
• Flip-flops and Latches are circuits that have two stable states that can store state
information – a bistable multivibrator.
• The circuit can be made to change state by signals applied to one or more control
inputs and will output its state (often along with its logical complement too). It is the
basic storage element in sequential logic.
• Flip-flops and latches are fundamental building blocks of digital electronics systems
used in computers, communications, and many other types of systems.
 Types of Flip Flops
• SR Flip Flop
• JK Flip Flop
• D Flip Flop
• T Flip Flop
 S R Flip Flop
• It is a Flip Flop with two inputs, one is S and other is R. S here stands for
Set and R here stands for Reset.
• Set basically indicates set the flip flop which means output 1 and reset
indicates resetting the flip flop which means output 0.
• Here clock pulse is supplied to operate this flop flop, hence it is clocked
flip flop.
Block Diagram of SR Flip Flop
Working of SR Flip Flop
• Case 1: Let’s say, S=0 and R=0, then output of both AND gates will be 0
and the value of Q and Q’ will be same as their previous value, i.e, Hold
state.
• Case 2: Let’s say, S=0 and R=1, then output of both AND gates will be 1
and 0, correspondingly the value of Q will be 0 as one of input is 1 and
it is a NOR gate so it will ultimately gives 0, hence Q gets 0 value,
similarly Q’ will be 1.
• Case 3: Let’s say, S=1 and R=0, then output of both AND gates will be 0
and 1, correspondingly the value of Q’ will be 0 as one of input to NOR
gate is 1, so output will be 0 ultimately and this 0 value will go as input
to upper NOR gate, and hence Q will become 1.
• Case 4: Let’s say, S=1 and R=1, then output of both AND gates will be 1
and 1 which is invalid, as the outputs should be complement of each
other.
 Applications of SR Flip Flop
• Register: SR Flip Flop used to create register. Designer can create any
size of register by combining SR Flip Flops.
• Counters: SR Flip Flops used in counters. Counters counts the number
of events that occurs in a digital system.
• Memory: SR Flip Flops used to create memory which are used to
store data, when the power is turned off.
• Synchronous System: SR Flip Flop are used in synchronous system
which are used to synchronise the operation of different component.
 JK Flip Flop
• The “JK flip flop,” also known as the Jack Kilby flip flop, is a sequential
logic circuit designed by Jack Kilby during his tenure at Texas Instruments
in the 1950s.
• This flip flop serves the purpose of storing and manipulating binary
information within digital systems.
• JK flip flop operates on sequential logic principle, where the output is
dependent not only on the current inputs but also on the previous state.
• There are two inputs in JK Flip Flop Set and Reset denoted by J and K. It
also has two outputs Output and complement of Output denoted by Q
and Q̅.
• The internal circuitry of a JK Flip Flop consists of a combination of logic
gates, usually NAND gates.
• JK flip flop comprises four possible combinations of inputs: J=0, K=0; J=0,
K=1; J=1, K=0; and J=1, K=1. These input combinations determine the
behavior of flip flop and its output.
• J=0, K=0: In this state, flip flop retains its preceding state. It neither sets
nor resets itself, making it stable.
• J=0, K=1: This input combination forces flip flop to reset, resulting in Q=0
and Q̅=1. It is often referred to as the “reset” state.
• J=1, K=0: Here, flip flop resides in the set mode, causing Q=1 and Q̅=0. It
is known as the “set” state.
• J=1, K=1: This combination toggles flip flop. If the previous state is Q=0, it
switches to Q=1 and vice versa. This makes it valuable for frequency
division and data storage applications.
JK Flip Flop Truth Table
JK Flip Flop Characteristic Table
Excitation Table of JK Flip Flop
 Advantages of JK Flip Flop
• Versatility: As discussed above, JK-flipflops can be used as a basic memory element or
a primary building block of further complex memory design. It is very much adaptive as
it can be operated in both synchronous and asynchronous modes.
• Toggle Functionality: The application which are required to get output as its
complement of input that also can be developed by JK-flipflops as when J=K=1 it
triggers toggle state which gives output which is complement with it’s each clock pulse.
• Error Detection and Correction: We can use a complex circuit built by JK-flipflops
which can detect and correct information during data-transmission.
 Disadvantages of JK Flip-Flop
• Complexity: Compared to other types of flipflops(D,T, SR), JK flipflop requires
additional logic gates to implement which consumes extra memory resources and
increases complexity to operate.
• Propagation Delay: This is the major problem present in JK-FF. Propagation delay
results a timing delay in certain application which are time-flow sensitive.
• Race Problem: This issue arises when the clock input’s timing pulse isn’t given enough
time to turn “Off” before the output Q’s state is altered.
 Applications of JK Flip Flop
• Counters: The JK flip-flop can be used in conjunction with other digital logic
gates to create a binary counter. This makes it useful in real-time applications
such as timers and clocks.
• Data storage: The JK flip-flop can be used to store temporary data in digital
systems.
• Synchronization: The JK flip-flop can be used to synchronize data signals
between two digital circuits, ensuring that they are operating on the same clock
cycle. This makes it useful in applications where timing is critical.
• Frequency Division: The JK flip-flop can be used to create a frequency divider,
which is a circuit that divides the frequency of an input signal by a fixed
amount. This makes it useful in real-time applications such as audio and video
processing.
 Race Around Condition in JK Flip Flop
• For J-K flip-flop, if J=K=1, and if clk=1 for a long period of time, then
output Q will toggle as long as CLK remains high which makes the output
unstable or uncertain.
• This is called a race around condition in J-K flip-flop.
• We can overcome this problem by making the clock =1 for very less
duration.
• The circuit used to overcome race around conditions is called the
Master Slave JK flip flop.
 Master Slave JK Flip Flop
• Here two JK flip flops are connected in series.
• The first JK flip flop is called the “master” and the other is a “slave”.
• The output from the master is connected to the two inputs of the slave
whose output is fed back to inputs of the master.
• The circuit also has an inverter other than the two flip flops.
• The Clock Pulse and inverter are connected because of which the flip
flops get an inverted clock pulse.
• In other words, if CP=0 for a master flip-flop, then CP=1 for a slave flip-
flop and vice versa.
 Working of Master Slave JK Flip Flop
• When the clock pulse goes high, the slave is isolated; J and K inputs can affect
the state of the system. The slave flip-flop is isolated when the CP goes low.
• When the CP goes back to 0, information is transmitted from the master flip-
flop to the slave flip-flop and output is obtained.
• As the master flip flop is positive triggered it responds first and the slave later
(it is negative edge triggered).
• The master goes to the K input of the slave when both inputs J=0 and K=1, and
also Q’ = 1. In this case the slave copies the master as the clock forces the
slave to reset.
• The master goes to the J input of the slave when both J=1 and K=0, Q = 1. The
clock is set due to the negative transition of the clock.
• There is a state of toggle when both J=1 and K=1. On the negative transition
of clock slave toggles and the master toggles on the positive transition of the
clock.
• Both the flip flops are disabled when both J=0 and K=0 and Q is unchanged.
 D Flip Flop
• D flip flop is an electronic devices that is known as “delay flip flop” or
“data flip flop” which is used to store single bit of data.
• D flip flops are synchronous or asynchronous. The clock single required for
the synchronous version of D flip flops but not for the asynchronous one.
• The D flip flop has two inputs, data and clock input which controls the flip
flop. when clock input is high, the data is transferred to the output of the
flip flop and when the clock input is low, the output of the flip flop is held
in its previous state.
• D flip flop consist of a single input D and two outputs (Q and Q’). The basic working of
D Flip Flop is as follows:
• When the clock signal is low, the flip flop holds its current state and ignores the D
input.
• When the clock signal is high, the flip flop samples and stores D input.
• The value that was previously fed into the D input is reflected at the flip flop’s Q
output.
• If D = 0 then Q will be 0.
• If D = 1 then Q will be 1.
• The Q’ output of the flip flop is complemented by the Q output.
• If Q = 0 then Q’ will be 1.
• If Q = 1 then Q’ will be 0.
D Flip Flop Excitation Table
 Advantages of D Flip Flop
• D flip flop is very simple to design.
• The computation speed of D flip flop is very fast compared to other flip
flops.
• D flip flop requires very few components to design which makes it simple
to understand.
 Disadvantages of D Flip Flop
• D flip flops are glitch prone. When input varies fast, flip flop output may
glitch. Digital circuit glitches are hard to identify and fix.
 Applications of D Flip Flops
• Memory: D flip flop is used to create memory circuit for holding the data.
• Registers: D flip flop is used to create register, which can hold data in digital system. By
using the D flip flop the designer can built any size of register as per the requirement.
• Counters: D flip flops are used to create the counters which counts the number of
event occurred in the digital system.
• Synchronous System: D flip flop is having in developing the synchronous system.
 T Flip Flop
• T flip flop or to be precise is known as Toggle Flip Flop because it can able to toggle its
output depending upon on the input.
• T here stands for Toggle.
• Toggle basically indicates that the bit will be flipped i.e., either from 1 to 0 or from 0 to
1.
• Here, a clock pulse is supplied to operate this flop, hence it is a clocked flip-flop.
• T flip flop or to be precise is known as Toggle Flip Flop because it can able to toggle its
output depending upon on the input.
• T here stands for Toggle.
• Toggle basically indicates that the bit will be flipped i.e., either from 1 to 0 or from 0
to 1.
• Here, a clock pulse is supplied to operate this flop, hence it is a clocked flip-flop.
Characteristic Table of T Flip Flop
 Applications of T Flip Flop
• Counters: T Flip Flops used in counters. Counters counts the number of events that
occurs in a digital system.
• Data Storage: T Flip Flops used to create memory which are used to store data, when
the power is turned off.
• Synchronous logic circuits: T flip-flops can be used to implement synchronous logic
circuits, which are circuits that perform operations on binary data based on a clock
signal. By synchronizing the logic circuit’s operations to the clock signal using T flip-
flops, the circuit’s behavior can be made predictable and reliable.
• Frequency division: It is used to divide the frequency of a clock signal by 2. Flip-flop
will toggle its output every time the clock signal transitions from high to low or low
to high, hence dividing the clock frequency by 2.
• Shift registers: T flip-flops can be used in shift registers which are used to shift binary
data in one direction.
 Counters
• Counter is a device that stores (and sometimes displays) the number of
times a particular event or process has occurred, often in relationship to a
clock.
• A counter is usually constructed by a number of flip flops connected in
cascade.
• Counters are used to count the clock pulse.
• We use Edge triggered flip flops in Counters because by using level
triggered flip flops Race around condition can occur.
 Synchronous Vs Asynchronous Counter
• In synchronous counter we use a • In asynchronous counter main clock is
universal clock that is common to all only applied to the first flip flop and
flip flops through out the circuit. then for rest of flip flops the output of
previous flip flop is taken as a clock.

• Synchronous Counter is faster in • Asynchronous Counter is slower as

operation as compared to compared to synchronous counter in
Asynchronous Counter. operation.

• Synchronous Counter does not

• Synchronous Counter does not produce any decoding errors.
produce any decoding errors.
• Synchronous Counter is also called • Asynchronous Counter is also called
Parallel Counter. Serial Counter.

• Synchronous Counter designing as • Asynchronous Counter designing as

well implementation are complex due well as implementation is very easy.
to increasing the number of states.
• Asynchronous Counter will operate
• Synchronous Counter will operate in only in fixed count sequence
any desired count sequence. (UP/DOWN).

• Synchronous Counter examples • Asynchronous Counter examples

are: Ring counter, Johnson counter. are: Ripple UP counter, Ripple DOWN
counter.
• In synchronous counter, propagation • In asynchronous counter, there is high
delay is less. propagation delay.
 Register
• Flip Flop is 1 bit memory cell.
• To increase the storage capacity, we have to use group of flip flops. This
group of flip flops is known as Register.
• A register is a collection of flip flops used to store binary data and
manipulate it using control signals.
• The architecture of a register consists of mostly memory storage, allowing
it to store data temporarily or permanently.
• The n-bit register consists of ”n” number of flip flops and is capable of
storing ”n” bit word.
 Shift Register
• A group of flip flops which is used to store multiple bits of data and the
data is moved from one flip flop to another is known as Shift Register.
• The bits stored in registers shifted when the clock pulse is applied within
and inside or outside the registers.
• To form an n-bit shift register, we have to connect n number of flip flops.
• The flip flops are connected in such a way that the first flip flop's output
becomes the input of the other flip flop.
• Shift Registers are used to implement arithmetic operations.
• Basic Flip Flop used in Registers is D Flip Flop.
• A Shift Register can shift the bits either to the left or to the right.
• A Shift Register, which shifts the bit to the left, is known as "Shift left
register", and it shifts the bit to the right, known as “Shift right register".
• The shift register is classified into the following types:
❖Serial In Serial Out(SISO)
❖Serial In Parallel Out(SIPO)
❖Parallel In Serial Out(PISO)
❖Parallel In Parallel Out(PIPO)
❖Bi-directional Shift Register
❖Universal Shift Register
 Serial IN Serial OUT(SISO)
• A Serial-In Serial-Out shift register is a sequential logic circuit that allows
data to be shifted in and out one bit at a time in a serial manner.
• It consists of a cascade of flip-flops connected in series, forming a chain.
• The input data is applied to the first flip-flop in the chain, and as the clock
pulses, the data propagates through the flip-flops, ultimately appearing at
the output.
• The logic circuit provided below demonstrates a serial-in serial-out
(SISO) shift register. It comprises four D flip-flops that are interconnected
in a sequential manner. These flip-flops operate synchronously with one
another, as they all receive the same clock signal.
• The synchronous nature of the flip-flops ensures that the shifting of data
occurs in a coordinated manner.
• When the clock signal rises, the input data is sampled and stored in the
first flip-flop.
• On subsequent clock pulses, the stored data propagates through the flip-
flops, moving from one flip-flop to the next.
• Each D flip-flop in the circuit has a Data (D) input, a Clock (CLK) input, and
an output (Q). The D input represents the data to be loaded into the flip-
flop, while the CLK input is connected to the common clock signal. The
output (Q) of each flip-flop is connected to the D input of the next flip-
flop, forming a cascade.
 Numerical
• Assuming an initial state where all flip-flops are reset to 0, let’s apply a
series of input bits and observe the output as the data is shifted through
the shift register. For simplicity, we’ll use a clock signal with rising edges to
trigger the shifting process.
Input data: 1011
Clock signal: 1 1 1 1
• Solution:
• Initially, all flip-flops are in the reset state (0), and the input data is 1011.
As the clock signal rises, the first bit of the input (1) is sampled and stored
in the first flip-flop. The remaining bits shift to the right, and the output
reflects the state of the last flip-flop.
Initially: Output: 0 0 0 0
Clock 1: Input: 1 0 1 1; Output: 1 0 0 0
Clock 2: Input: 1 0 1 1; Output: 1 1 0 0
Clock 3: Input: 1 0 1 1; Output: 0 1 1 0
Clock 4: Input: 1 0 1 1; Output: 1 0 1 1
• After four clock cycles, the input data has shifted through the shift
register, and the final output is 1011.
• It’s important to note that the clock signal synchronizes the shifting
process, ensuring that each bit moves to the next flip-flop at the rising
edge of the clock pulse. The output of the shift register represents the last
bit that has been shifted out of the register.
 Serial IN Parallel OUT(SIPO)
• The shift register, which allows serial input (one bit after the other through
a single data line) and produces a parallel output is known as the Serial-In
Parallel-Out shift register. The logic circuit given below shows a serial-in-
parallel-out shift register.
• The circuit consists of four D flip-flops which are connected. The clear
(CLR) signal is connected in addition to the clock signal to all 4 flip flops in
order to RESET them. The output of the first flip-flop is connected to the
input of the next flip flop and so on. All these flip-flops are synchronous
with each other since the same clock signal is applied to each flip-flop.
• The above circuit is an example of a shift right register, taking the serial
data input from the left side of the flip-flop and producing a parallel
output. They are used in communication lines where demultiplexing of a
data line into several parallel lines is required because the main use of the
SIPO register is to convert serial data into parallel data.
 Parallel IN Serial OUT(PISO)
• A PISO shift register is a digital circuit that can accept parallel data and
output serial data.
• It is made up of a succession of flip-flops, with each flip-flop capable of
storing one bit of data.
• Unlike PIPO shift registers, which offer parallel input and output, a PISO
shift register accepts data in parallel and outputs it sequentially, or
serially.
• To understand the operation of a PISO shift register, let’s consider a basic
example with four flip-flops labeled D0, D1, D2, and D3.
• Each flip-flop can store one bit of data. The parallel data is loaded into the
flip-flops simultaneously through the parallel input lines.
• Once the data is loaded, it can be shifted out in a sequential manner
through the serial output.
• To shift the data out, a clock signal is applied to the shift register. Each
clock pulse triggers the movement of data from one flip-flop to the next
in a cascading fashion.
• The most significant bit (MSB) is usually the first to be shifted out,
followed by the remaining bits. The serial output provides the bits one at
a time, in the order they were loaded.
 Parallel IN Parallel OUT(PIPO)
• The shift register, which allows parallel input (data is given separately to
each flip flop and in a simultaneous manner) and also produces a parallel
output is known as Parallel-In parallel-Out shift register.
• The logic circuit given below shows a parallel-in-parallel-out shift register.
The circuit consists of four D flip-flops which are connected.
• The clear (CLR) signal and clock signals are connected to all 4 flip-flops.
• In this type of register, there are no interconnections between the
individual flip-flops since no serial shifting of the data is required.
• Data is given as input separately for each flip flop and in the same way,
output is also collected individually from each flip flop.
 Bidirectional Shift Register
• If we shift a binary number to the left by one position, it is equivalent to
multiplying the number by 2 and if we shift a binary number to the right
by one position, it is equivalent to dividing the number by 2.
• To perform these operations we need a register which can shift the data in
either direction. Bidirectional shift registers are the registers that are
capable of shifting the data either right or left depending on the mode
selected.
• If the mode selected is 1(high), the data will be shifted toward the right
direction and if the mode selected is 0(low), the data will be shifted
towards the left direction.
• The logic circuit given below shows a Bidirectional shift register. The
circuit consists of four D flip-flops which are connected. The input data is
connected at two ends of the circuit and depending on the mode selected
only one gate is in the active state.
 Universal Shift Register
• A Universal shift register is a register which has both the right shift and
left shift with parallel load capabilities.
• Universal shift registers are used as memory elements in computers.
• A Unidirectional shift register is capable of shifting in only one direction. A
bidirectional shift register is capable of shifting in both the directions. The
Universal shift register is a combination design of bidirectional shift
register and a unidirectional shift register with parallel load provision.
• A n-bit universal shift register consists of n flip-flops and n 4×1
multiplexers. All the n multiplexers share the same select lines(S1 and
S0)to select the mode in which the shift register operates. The select
inputs select the suitable input for the flip-flops.
 Applications of Shift Registers
• The shift registers are used for temporary data storage.
• The shift registers are also used for data transfer and data manipulation.
• The serial-in serial-out and parallel-in parallel-out shift registers are used
to produce time delay to digital circuits.
• The serial-in parallel-out shift register is used to convert serial data into
parallel data thus they are used in communication lines where
demultiplexing of a data line into several parallel lines is required.
• A Parallel in Serial out shift register is used to convert parallel data to
serial data.
 Ring Counter
• A ring counter is a typical application of the Shift register. The ring
counter is almost the same as the shift counter.
• The only change is that the output of the last flip-flop is connected to the
input of the first flip-flop in the case of the ring counter but in the case of
the shift register it is taken as output. Except for this, all the other things
are the same.
• No. of States in Ring Counter=No. of flip-flops used
• So, for designing a 4-bit Ring counter we need 4 flip-flops.
• In this diagram, we can see that the clock pulse (CLK) is applied to all the
flip-flops simultaneously. Therefore, it is a Synchronous Counter.
• Also, here we use Overriding input (ORI) for each flip-flop. Preset (PR) and
Clear (CLR) are used as ORI. When PR is 0, then the output is 1. And when
CLR is 0, then the output is 0. Both PR and CLR are active low signal that
always works in value 0.
 Advantages of Ring Counter
• Ring Counters are Simple and easy to implement using shift registers and
flip flops.
• Implementation can be done using JK and D Flip Flop.
• Ring counters generate codes that are easy to decode without additional
logic circuitry.
 Disadvantages of Ring Counter
• The ring counter is not self-starting, meaning it requires external
interventions.
• Out of 15, 4 states are usable.
 Twisted Ring Counter / Johnson Counter
• Johnson counter also known as creeping counter, is an example of
synchronous counter.
• In Johnson counter, the complemented output of last flip flop is
connected to input of first flip flop and to implement n-bit Johnson
counter we require n flip-flop.
• It is one of the most important type of shift register counter. It is formed
by the feedback of the output to its own input. Johnson counter is a ring
with an inversion.
• Another name of Johnson counter are: creeping counter, twisted ring
counter, walking counter, mobile counter and switch tail counter.
• Total number of used and unused states in n-bit Johnson counter:
number of used states=2n
number of unused states=2n – 2*n
• where,
CP is clock pulse and
Q1, Q2, Q3, Q4 are the states.
• Question: Determine the total number of used and unused states in 4-bit
Johnson counter.
• Answer: Total number of used states= 2*n
= 2*4
=8
Total number of unused states= 2n – 2*n
= 16-2*4
=8
 Advantages of Johnson Counter
• The Johnson counter has same number of flip flop but it can count twice
the number of states the ring counter can count.
• It can be implemented using D and JK flip flop.
• Johnson ring counter is used to count the data in a continuous loop.
 Disadvantages of Johnson Counter
• Johnson counter doesn’t count in a binary sequence.
• In Johnson counter more number of states remain unutilized than the
number of states being utilized.
Computer Organization and
Architecture(COA)
BCA-203
Unit-3
 Register Transfer Language(RTL)
• In symbolic notation, it is used to describe the micro-operations transfer
among registers.
• It is a kind of intermediate representation (IR) that is very close to
assembly language, such as that which is used in a compiler.
• The term “Register Transfer” can perform micro-operations and transfer
the result of operation to the same or other register.
 Microoperations
• The operation executed on the data stored in registers are called micro-
operations.
• They are detailed low-level instructions used in some designs to
implement complex machine instructions.
 Register Transfer
• The information transformed from one register to another register is
represented in symbolic form by replacement operator is called Register
Transfer.
 Replacement Operator
• In the statement, R2 <- R1, <- acts as a replacement operator. This
statement defines the transfer of content of register R1 into register R2.
 Types of Registers in Computer Architecture
• Accumulator Register(AC)
• Address Register(AR)
• Data Register(DR)
• Instruction Register(IR)
• Input Register(IR)
• Program Counter(PC)
• Temporary Register(TR)
• Output Register(OR)
 There are various methods of RTL
1. General way of representing a register is by the name of the register
enclosed in a rectangular box as shown in (a).

2. Register is numbered in a sequence of 0 to (n-1), starting from 0 in the

rightmost position as shown in (b).

3. The numbering of bits in a register can be marked on the top of the box
as shown in (c).

4. A 16-bit register PC is divided into 2 parts- Bits (0 to 7) are assigned with

lower byte and bits (8 to 15) are assigned with higher bytes as shown in
(d).
 Register Transfer Operations
• The operation performed on the data stored in the registers are referred
to as register transfer operations.
• There are different types of register transfer operations:

Simple Transfer – R2 <- R1

The content of R1 are copied into R2 without affecting the content of R1. It
is an unconditional type of transfer operation.
Conditional Transfer –

It indicates that if P=1, then the content of R1 is transferred to R2. It is a

unidirectional operation.
Simultaneous Operations

• If 2 or more operations are to occur simultaneously then they are

separated with comma (,).
 Bus and Memory Transfer
• A digital system composed of many registers, and paths must be provided
to transfer information from one register to another.
• The number of wires connecting all of the registers will be excessive if
separate lines are used between each register and all other registers in
the system.
• A bus structure, on the other hand, is more efficient for transferring
information between registers in a multi-register configuration
system.
• A bus consists of a set of common lines, one for each bit of
register, through which binary information is transferred one at a
time. Control signals determine which register is selected by the
bus during a particular register transfer.
• The following block diagram shows a Bus system for four registers.
It is constructed with the help of four 4 * 1 Multiplexers each having
four data inputs (0 through 3) and two selection inputs (S1 and S2).
• We have used labels to make it more convenient for you to
understand the input-output configuration of a Bus system for four
registers. For instance, output 1 of register A is connected to input 0
of MUX1.
Bus System for 4 Registers
• The two selection lines S0 and S1 are connected to the selection
inputs of all four multiplexers. The selection lines choose the four
bits of one register and transfer them into the four-line common
bus.
• When both of the select lines are at low logic, i.e. S1S0 = 00, the 0
data inputs of all four multiplexers are selected and applied to the
outputs that forms the bus. This, in turn, causes the bus lines to
receive the content of register A since the outputs of this register
are connected to the 0 data inputs of the multiplexers.
• Similarly, when S1S0 = 01, register B is selected, and the bus lines
will receive the content provided by register B.
• The following function table shows the register that is selected by
the bus for each of the four possible binary values of the Selection
lines.
• A bus system can also be constructed using three-state
gates instead of multiplexers.
• The three state gates can be considered as a digital circuit that
has three gates, two of which are signals equivalent to logic 1 and
0 as in a conventional gate. However, the third gate exhibits a high-
impedance state.
• The most commonly used three state gates in case of the bus
system is a buffer gate.
• The graphical symbol of a three-state buffer gate can be
represented as:
• The following diagram demonstrates the construction of a bus
system with three-state buffers.
• The outputs generated by the four buffers are connected to form a
single bus line.
• Only one buffer can be in active state at a given point of time.
• The control inputs to the buffers determine which of the four normal
inputs will communicate with the bus line.
• A 2 * 4 decoder ensures that no more than one control input is
active at any given point of time.
 Memory Transfer
Most of the standard notations used for specifying operations on
memory transfer are stated below:
• The transfer of information from a memory unit to the user end is
called a Read operation.
• The transfer of new information to be stored in the memory is called
a Write operation.
• The address register is designated by AR and the data
register by DR.
• Thus, a read operation can be stated as:
Read: DR ← M [AR]
• The Read statement causes a transfer of information into the data
register (DR) from the memory word (M) selected by the address
register (AR).
• And the corresponding write operation can be stated as:
Write: M [AR] ← R1
• The Write statement causes a transfer of information from register
R1 into the memory word (M) selected by address register (AR).
 Types of Micro-operations
• Register Transfer Micro-operations
• Arithmetic Micro-operations
• Logical Micro-operations
• Shift Micro-operations
 Register Transfer Micro-operation
• Register Transfer Micro-operation doesn’t change the information content
when the binary information moves from source register to destination
register.
• Other three types of micro-operations change the information change the
information content during the transfer.
 Arithmetic Micro-operations
• In general, the Arithmetic Micro-operations deals with the
operations performed on numeric data stored in the registers.
• The basic Arithmetic Micro-operations are classified in the following
categories:
[Link]
[Link]
[Link]
[Link]
[Link]
• Some additional Arithmetic Micro-operations are classified as:
[Link] with carry
[Link] with borrow
[Link]/Load, etc.
• The following table shows the symbolic representation of various
Arithmetic Micro-operations.
 Logical Micro-operations
• Logic microoperations specify binary operations for strings of bits stored
in registers.
• These operations consider each bit of the register separately and treat
them as binary variables.
• There are 16 different logic operations that can be performed with two
binary variables.
Truth Table for 16 Logical Micro-operations
• Logic micro-operations are very useful for manipulating individual bits
or a portion of a word stored in a register.
• They can be used to change bit values, delete a group of bits or insert
new bits values into a register.
 Selective Set
• The selective-set operation sets to 1 the bits in register A where there are
corresponding l's in register B. It does not affect bit positions that have 0's
in B.
• The OR microoperation can be used to selectively set bits of a register.
• The following numerical example clarifies this operation
 Selective Complement
• The selective-complement operation complements bits in A where there
are corresponding 1's in B. It does not affect bit positions that have 0's in
B.
• The exclusive-OR microoperation can be used to selectively complement
bits of a register.
• For example:
 Selective Clear
• The selective-clear operation clears to 0 the bits in A only where there are
corresponding l's in B.
• The corresponding logic microoperation is:
• For example:
 Mask
• The mask operation is similar to the selective-clear operation except that
the bits of A are cleared only where there are corresponding O's in B .
• The mask operation is an AND micro operation as seen from the following
numerical example:
 Clear
• The clear operation compares the words in A and B and produces an all
0's result if the two numbers are equal.
• This operation is achieved by an exclusive-OR microoperation as shown by
the following example:
 Insert
• The insert operation inserts a new value into a group of bits. This is done
by first masking the bits and then ORing them with the required value.
• For example, suppose that an A register contains eight bits, 0110 1010. To
replace the four leftmost bits by the value 1001 we first mask the four
unwanted bits:
 Shift Micro-operations
• Shift micro-operations are those micro-operations that are used for the
serial transfer of information.
• The contents of a register can be shifter to left or right.
• There are three types of shift micro-operations:
1. Logical Shift
2. Arithmetic Shift
3. Circular Shift
Logical Shift:
• It transfers the 0 zero through the serial input. We use the symbols ‘<<‘ for
the logical left shift and ‘>>‘ for the logical right shift.
• Every time we shift a number towards the left by 1 bit it multiplies that
number by 2.
• Every time we shift a number towards the right by 1 bit it divides that
number by 2.
Arithmetic Shift:
• The arithmetic shift micro-operation moves the signed binary number
either to the left or to the right position.
• In Arithmetic shift left, each bit is moved to the left one by one.
• In Arithmetic shift right, each bit is moved to the right one by one.
Circular Shift:
• The circular shift circulates the bits in the sequence of the register around
both ends without any loss of information.
Following are the two ways to perform the circular shift.
[Link] Shift Left
[Link] Shift Right
Computer Registers
 Instruction Cycle
• A program residing in the memory unit of a computer consists of a
sequence of instructions. These instructions are executed by the
processor by going through a cycle for each instruction.
• In a basic computer, each instruction cycle consists of the following
phases:
[Link] instruction from memory.
[Link] the instruction.
[Link] the effective address from memory.
[Link] the instruction.
• Effective Address: Effective address is the address of the exact memory
location where the value of the operand is present.
• The following block diagram shows the input-output configuration
for a basic computer:
• The input-output terminals send and receive information.
• The information generated through the keyboard is shifted into an
input register 'INPR'.
• The information for the printer is stored in the output register
'OUTR'.
• Registers INPR and OUTR communicate with a communication
interface serially and with the AC in parallel.
• The transmitter interface receives information from the keyboard
and transmits it to INPR.
• The receiver interface receives information from OUTR and sends
it to the printer serially.
 Instruction Format
• In computer organization, instruction formats refer to the way
instructions are encoded and represented in machine language.
• There are several types of instruction formats, including zero, one, two,
and three-address instructions.
• Each type of instruction format has its own advantages and disadvantages
in terms of code size, execution time, and flexibility. Modern computer
architectures typically use a combination of these formats to provide a
balance between simplicity and power.
 Different Fields in Instruction
• The operation field specifies the operation to be performed like addition.
• Address field which contains the location of the operand, i.e., register or
memory location.
• Mode field which specifies how operand is to be founded.
 Types of Instructions
• Zero Address Instructions
• One Address Instructions
• Two Address Instructions
• Three Address Instructions
 Zero Address Instructions
• These instructions do not specify any operands or addresses.
• Instead, they operate on data stored in registers or memory locations
implicitly defined by the instruction.
• For example, a zero-address instruction might simply add the contents of
two registers together without specifying the register names.
 One Address Instructions
• These instructions specify one operand or address, which typically refers
to a memory location or register.
• The instruction operates on the contents of that operand, and the result
may be stored in the same or a different location.
• For example, a one-address instruction might load the contents of a
memory location into a register.
 Two Address Instructions
• These instructions specify two operands or addresses, which may be
memory locations or registers.
• The instruction operates on the contents of both operands, and the
result may be stored in the same or a different location. For example, a
two-address instruction might add the contents of two registers together
and store the result in one of the registers.
 Three Address Instructions
• These instructions specify three operands or addresses, which may be
memory locations or registers.
• The instruction operates on the contents of all three operands, and the
result may be stored in the same or a different location.
• For example, a three-address instruction might multiply the contents of
two registers together and add the contents of a third register, storing
the result in a fourth register.
• Instruction is of variable length depending upon the number of addresses
it contains. Generally, CPU organization is of three types based on the
number of address fields:
 Single Accumulator organization
 General register organization
 Stack organization
 Single Accumulator Organization
• The computers, present in the early days of computer history, had
accumulator-based CPUs.
• In this type of CPU organization, the accumulator register is used
implicitly for processing all instructions of a program and storing the
results into the accumulator.
• The instruction format that is used by this CPU Organization is the One
address field. Due to this, the CPU is known as One Address Machine.
• The main points about Single Accumulator based CPU Organization are:
1. In this CPU Organization, the first ALU operand is always stored into the
Accumulator and the second operand is present either in Registers or in
the Memory.
2. Accumulator is the default address thus after data manipulation the
results are stored into the accumulator.
3. One address instruction is used in this type of organization.

The Format of Instruction is: Opcode + Address

Opcode indicates the type of operation to be performed.

• Mainly two types of operation are performed in a single accumulator based
CPU organization:
1. Data transfer operation– In this type of operation, the data is transferred from
a source to a destination.
e.g. LOAD X, STORE Y
Here LOAD is a memory read operation that is data is transferred from memory
to accumulator and STORE is a memory write operation that is data is transferred
from the accumulator to memory.
2. ALU operation – In this type of operation, arithmetic operations are
performed on the data.
e.g. MULT X
where X is the address of the operand. The MULT instruction in this example
performs the operation,
ACAC*M[X]
AC is the Accumulator and M[X] is the memory word located at location X.
 Advantages of Single Accumulator Organization
• One of the operands is always held by the accumulator register. This
results in short instructions and less memory space.
• The instruction cycle takes less time because it saves time in instruction
fetching from memory.
 Disadvantages of Single Accumulator Organization
• When complex expressions are computed, program size increases due to
the usage of many short instructions to execute it. Thus memory size
increases.
• As the number of instructions increases for a program, the execution time
increases.
 General Register Organization
• When we are using multiple general-purpose registers, instead of a single
accumulator register, in the CPU Organization then this type of
organization is known as General register-based CPU Organization.
• In this type of organization, the computer uses two or three address fields
in their instruction format. Each address field may specify a general
register or a memory word.
e.g. MULT R1,R2,R3
• This is an instruction of an arithmetic multiplication written in assembly
language. It uses three address fields R1, R2, and R3. The meaning of this
instruction is:
R1 R2*R3
• This instruction also can be written using only two address fields as:
MULT R1,R2
• In this instruction, the destination register is the same as one of the
source registers. This means the operation
R1R1*R2
• The use of a large number of registers results in a short program with
limited instructions.
 Advantages of General Register Organization
• The efficiency of the CPU increases as large number of registers are used
in this organization.
• Less memory space is used to store the program since the instructions are
written in a compact way.
 Disadvantages of General Register Organization
• Care should be taken to avoid unnecessary usage of registers. Thus,
compilers need to be more intelligent in this aspect.
• Since a large number of registers are used, thus extra cost is required in
this organization.
 Memory Stack Organization in Computer
Architecture
• A stack is a storage device in which the information or item stored last is
retrieved first.
• Basically, a computer system follows a memory stack organization.
• A portion of memory is assigned to a stack operation to implement the
stack in the CPU. Here the processor register is used as a Stack Pointer
(SP).
• The portion of computer memory divided into three segments: Program
Instructions, Data, and Stack.
• Program Counter (PC): It is a register that points to the address of the next
instruction that is going to be executed in the program.
• Address Register (AR): This register points at the collection of data and is
used during the execute phase to read an operand.
• Stack Pointer (SP): It points at the top of the stack and is used to push or
pop the data items in or from the stack.

These three registers are connected to a common address bus and either
one of them can provide an address for memory.
• Stack Pointer is first going to point at the address 3001, and then the
stack will grow with the decreasing addresses. It means that the first item
is going to be stored at address 3001, the second item at address 3000,
and the items can keep getting stored in the stack until it reaches the last
address 2000 where the last item will be held.
• Here the data which is getting inserted into the Stack is obtained from
the Data Register and the data retrieved from the Stack is also read by
the Data Register.
 PUSH & POP operations in Memory Stack
Organization
PUSH Operation:
• This operation is used to insert a new data item into the top of the Stack.
The new item can be inserted as follows:-
SP ←SP-1
M[SP]← DR
• In the first step, the Stack Pointer is decremented to point at the address
where the data item will be stored.
• Then, by using the memory write operation, the data item from Data
Register gets inserted into the top of the stack ( at the address where the
Stack Pointer is pointing).
• POP Operation
• This operation is used to delete a data item from the top of the Stack.
Data item can be deleted as follows:-
DR←M[SP]
SP←SP+1
• In the first step, the top data item is read from the Stack into the Data
Register. The Stack Pointer is then incremented to point at the next data
item in the stack.
 Addressing Modes
• The term addressing modes refers to the way in which the operand of an
instruction is specified.
• The addressing mode specifies a rule for interpreting or modifying the
address field of the instruction before the operand is actually executed.
• An assembly language program instruction consists of two parts:
 Types of Addressing Modes
• Implied Mode
• Immediate Addressing Mode
• Register Mode
• Register Indirect Mode
• Autoincrement or Autodecrement Addressing Mode
• Direct Addressing Mode
• Indirect Addressing Mode
• Relative Address Mode
• Indexed Addressing Mode
• Base Register Addressing Mode
 Implied Mode
• It is also known as “Inherent” or “Implicit” addressing mode.
• It is a type of addressing mode no memory location or register is
specified in the instruction.
• Also, in the implied mode, the operands are specified implicitly in the
instruction definition.
• E.g. INC AC
ACAC+1
 Immediate Addressing Mode
• In this mode data is present in address field of instruction.
• Operand is directly provided as constant.
• No Computation required to calculate Effective Addresss.
ADD R1,#3
R1R1+3
 Register Mode
• In register addressing the operand is placed in one of 8 bit or 16 bit
general purpose registers. The data is in the register that is specified by
the instruction.
• Register No. is present in the instruction.
• Here one register reference is required to access the data.
• E.g. LOAD R1
ACR1
 Register Indirect Mode
• In this addressing the operand’s address is placed in any one of the
registers as specified in the instruction.
• Register contains address of operand rather than operand itself.
• Here two register reference is required to access the data.
 Autoincrement Addressing Mode
• The auto increment mode is very similar to the register indirect mode.
• The auto increment addressing mode is just the opposite of the auto
decrement mode.
• In the case of auto increment mode, the content present in the register is
initially incremented, and then the content that is incremented in the
register is used in the form of an effective address.
• Once the content present in the register in the auto-increment addressing
mode is accessed by its instruction, the content of the register is
incremented to refer to the next operand.
• Symbolically, we can represent it as follows:
(R)+
 Autodecrement Addressing Mode
• The auto decrement addressing mode is just the opposite of the auto
increment mode.
• In the case of auto decrement mode, the content present in the register is
initially decremented, and then the content that is decremented in the
register is used in the form of an effective address.
• It is presented symbolically as follows:
-(R)
 Direct Addressing Mode
• Direct Addressing Mode is also known as absolute addressing
mode.
• In this mode, the instruction contains the address of the actual
memory location where the operand's value is stored.
• The address of this memory location is referred to as the effective
address.
 Indirect Addressing Mode
• This is the mode of addressing where the instruction contains the
address of the location where the target address is stored.
• Used to implement pointers.
• So in this way, it is Indirectly storing the address of the target
location in another memory location. So it is called Indirect
Addressing mode.
• In this mode address field of instruction contains the address of
effective address.
• Here two references are required.
1st reference to get effective address.
2nd reference to access the data.
 Relative Addressing Mode
• In this mode, the Effective Address (EA) of the operand is
calculated by adding the content of the CPU register and the
address part of the instruction word.
• The effective address is calculated by adding displacement
(immediate value given in the instruction) and the register value.
• The effective address thus calculated is relative to the address of
the next instruction.
• EA= PC+ Offset(Displacement)
 Base Register Addressing Mode
• Base register addressing mode is used to implement inter
segment transfer of control.
• In this mode effective address is obtained by adding base
register value to address field value.
EA= Base Register+ Address Field Value
PC= Base Register+ Relative Value
 Advantages of Addressing Modes
[Link] give programmers to facilities such as Pointers, counters for
loop controls, indexing of data and program relocation.
[Link] reduce the number bits in the addressing field of the
Instruction.
Computer Organization and
Architecture(COA)
BCA-203
Unit-4
 Peripheral Devices
• A peripheral device is an internal or external device that connects directly
to a computer or other digital device but does not contribute to the
computer’s primary function, such as computing.
• It helps end users access and use the functionalities of a computer.
• Since it’s not a core device for the system, the computer can still function
without the peripheral, which simply provides extra functions. However,
some peripherals such as a mouse, keyboard, or monitor tend to be
pretty much fundamental to the interaction between the user and the
computer itself.
• A peripheral device is also called a peripheral, computer peripheral,
input-output device, or I/O device.
• A peripheral device provides input/output (I/O) functions for a computer
and serves as an auxiliary computer device without computing-intensive
functionality.
• Peripheral devices connect with a computer through several I/O
interfaces, such as communications (COM), Universal Serial Bus (USB).
Peripheral devices include the following:
• Mouse.
• Keyboard.
• Printer.
• Monitor.
• Webcam.
• Printer.
• Scanner.
• Speakers.
• External Drive.
• USB Flash Drive.
• CD-ROM.
• There are several types of peripherals, although they’re commonly
divided into three broad categories: input, output, and storage devices.
• Input devices convert incoming instructions or actions from the user into
viable information that can be interpreted by the computer. For example,
a keyboard will convert keystroke into characters that appear on the
computer’s display, while a monitor will transform hand movements into
movements of a cursor that can be used to interact with the operating
system’s programs. Other input peripherals include joysticks,
microphones, webcams, optical scanners, etc.
• Output peripherals translate digital signals into information that can be
interpreted or utilized by the end user. For example, a monitor or display
screen will show the operating system’s desktop, while a laser printer will
translate information saved in a word file into printed material. Other
output peripherals include speakers, 3D printers, and projectors.
• Some devices can provide both input and output signals, such as network
interfaces, modems, routers, and webcams.
• Storage peripherals are used to store and record data, and include
internal and external hard drives, CD-ROM and DVD drives, and flash
memory drives.
• Depending on whether the peripheral is located inside or outside the
computer system case, it can be further classified as an internal or
external peripheral device.
• An external peripheral can be connected via many different types of
cables and connections. Today, the most common connection for external
peripherals is the USB connection, both because most computers have
several ports available, and because of the simplicity of the plug-and-play
feature.
• Internal storage devices such as hard disks are usually connected with a
SATA cable, while display port and HDMI are the most popular connections
for displays and monitors.
• Today, many peripherals are built-in inside smaller computer devices such
as tablets, laptops and smartphones. For example, webcam, speakers and
microphones are integrated inside most smartphones, although the latter
cannot be considered a peripheral since it’s a core function of any phone.
Similarly, webcams and monitors are integrated into most laptops,
although it’s still possible to connect the computer to a larger monitor or
higher resolution webcam.
 Input/Output Interface
• Input/Output interface is used as a method which helps in transferring of
information between the internal storage devices i.e. memory and the
external peripheral device .
• In micro-computer based system, the only purpose of peripheral devices
is just to provide special communication links for interfacing them with
the CPU.
• To resolve the differences between peripheral devices and CPU, there is a
special need for communication links.
• The major differences are as follows:
1. The nature of peripheral devices is electromagnetic and electro-
mechanical. The nature of the CPU is electronic. There is a lot of
difference in the mode of operation of both peripheral devices and CPU.
2. There is also a synchronization mechanism because the data transfer rate
of peripheral devices are slow than CPU.
3. In peripheral devices, data code and formats differ from the format in
the CPU and memory.
4. The operating mode of peripheral devices are different and each may be
controlled so as not to disturb the operation of other peripheral devices
connected to CPU.
• There is a special need of the additional hardware to resolve the
differences between CPU and peripheral devices to supervise and
synchronize all input and output devices.
• To communicate with I/O, the processor must communicate with the
memory unit. Like the I/O bus, the memory bus contains data, address
and read/write control lines.
• While the data lines convey bits from one device to another, control lines
determine the direction of data flow and when each device can access the
bus. Address lines determine the location of the source or destination of
the data.
 Functions of Input/Output Interface
1. It is used to synchronize the operating speed of CPU with respect to
input-output devices.
2. It selects the input-output device which is appropriate for the
interpretation of the input-output device.
3. It is capable of providing signals like control and timing signals.
4. In this data buffering can be possible through data bus.
5. There are various error detectors.
6. It converts serial data into parallel data and vice-versa.
7. It also convert digital data into analog signal and vice-versa.
 Asynchronous Data Transfer
• Asynchronous data transfer enables computers to send and receive data
without having to wait for a real-time response. With this technique, data
is conveyed in discrete units known as packets that may be handled
separately.
Sender: The machine or gadget that transfers the data.
Receiver: A device or computer that receives data.
Packet: A discrete unit of transmitted and received data.
Buffer: A short-term location for storing incoming or departing data.
 Classification of Asynchronous Data Transfer
• Strobe Control Method
• Handshaking Method
 Strobe Control Method For Data Transfer
• Strobe control is a method used in asynchronous data transfer that
synchronizes data flow between two devices.
• Bits are transmitted one at a time, independent of one another, and
without the aid of a clock signal in asynchronous communication.
• To properly receive the data, the receiving equipment needs to be able to
synchronize with the transmitting device.
• Strobe control involves sending data along with a different signal known
as the strobe signal.
• The strobe signal alerts the receiving device that the data is valid and
ready to be read. The receiving device waits for the strobe signal before
reading the data to ensure it is synchronized with its clock.
• The strobe signal is usually generated by the transmitting device and is
sent either before or after the data. If the strobe signal is sent before the
data, it is called a leading strobe. If it is sent after the data, it is called a
trailing strobe.
 Handshaking Method For Data Transfer
• During an asynchronous data transfer, two devices manage their
communication using handshaking.
• It is guaranteed that the transmitting and receiving devices are prepared
to send and receive data.
• Handshakes are essential in asynchronous communication since there is
no clock signal to synchronize the data transfer.
• During handshaking, we use two types of signals mostly they are request-
to-send (RTS) and clear-to-send (CTS).
• The receiving device is notified by an RTS signal when the transmitting
equipment is ready to provide data.
• The receiving device responds with a CTS signal when it is ready to accept
data.
• Once data is transmitted to the receiver end, the receiver generates a
signal that it has done by sending an acknowledgment (ACK) signal.
• If the data is not successfully received, the receiving device will notify that
a new transmission is necessary via a negative acknowledgment (NAK)
signal.
 Advantages of Asynchronous Data Transfer
• Because asynchronous data transfer sends data in discrete, independently
processable pieces, it enables faster data transfer speeds.
• This method is more effective than synchronous data transfer because
there is no need for the receiver to respond.
• Transmission is done by making large files or data sets into smaller packets
and sending them in parallel cuts the duration time.
 Disadvantages of Asynchronous Data Transfer
• Asynchronous data transfer requires more complex programming and it
may be possible that some data may get corrupted or lose data if packets
are not received in the correct order or are lost during transmission.
• As we know there will be no real-time communication in asynchronous
data transport can be more prone to errors than synchronous data
transfer.
 Modes of Transfer
• The binary information that is received from an external device is usually
stored in the memory unit. The information that is transferred from the
CPU to the external device is originated from the memory unit. CPU
merely processes the information but the source and target is always the
memory unit. Data transfer between CPU and the I/O devices may be
done in different modes. Data transfer to and from the peripherals may
be done in any of the three possible ways
[Link] I/O.
[Link]- initiated I/O.
[Link] memory access( DMA)
 Programmed I/O
• In this case, the I/O device does not have direct access to the
memory unit.
• A transfer from I/O device to memory requires the execution of
several instructions by the CPU, including an input instruction to
transfer the data from device to the CPU and store instruction to
transfer the data from CPU to memory.
• In programmed I/O, the CPU stays in the program loop until the I/O
unit indicates that it is ready for data transfer. This is a time
consuming process since it needlessly keeps the CPU busy. This
situation can be avoided by using an interrupt facility.
 Interrupt-Initiated I/O
• Since in the above case we saw the CPU is kept busy unnecessarily.
This situation can very well be avoided by using an interrupt driven
method for data transfer.
• By using interrupt facility and special commands to inform the interface
to issue an interrupt request signal whenever data is available from any
device.
• In the meantime the CPU can proceed for any other program execution.
The interface meanwhile keeps monitoring the device. Whenever it is
determined that the device is ready for data transfer it initiates an
interrupt request signal to the computer.
• Upon detection of an external interrupt signal the CPU stops
momentarily the task that it was already performing, branches to the
service program to process the I/O transfer, and then return to the task it
was originally performing.
 Direct memory access( DMA)
• The data transfer between a fast storage media such as magnetic disk and
memory unit is limited by the speed of the CPU.
• Thus we can allow the peripherals directly communicate with each other
using the memory buses, removing the intervention of the CPU.
• This type of data transfer technique is known as DMA or direct memory
access.
• During DMA the CPU is idle and it has no control over the memory buses.
The DMA controller takes over the buses to manage the transfer directly
between the I/O devices and the memory unit.
 Direct Memory Access (DMA) Controller
• Direct Memory Access uses hardware for accessing the memory, that
hardware is called a DMA Controller.
• It has the work of transferring the data between Input Output devices and
main memory with very less interaction with the processor.
• The Direct Memory Access Controller is a control unit, which has the work
of transferring data.
• DMA Controller is a type of control unit that works as an interface for the
data bus and the I/O Devices.
 Types of Direct Memory Access (DMA)
• Single-Ended DMA
• Dual-Ended DMA
• Arbitrated-Ended DMA
• Interleaved DMA
• Single-Ended DMA: Single-Ended DMA Controllers operate by reading
and writing from a single memory address. They are the simplest DMA.
• Dual-Ended DMA: Dual-Ended DMA controllers can read and write from
two memory addresses. Dual-ended DMA is more advanced than single-
ended DMA.
• Arbitrated-Ended DMA: Arbitrated-Ended DMA works by reading and
writing to several memory addresses. It is more advanced than Dual-
Ended DMA.
• Interleaved DMA: Interleaved DMA are those DMA that read from one
memory address and write from another memory address.
 Advantages of DMA Controller
• Data Memory Access speeds up memory operations and data transfer.
• CPU is not involved while transferring data.
• DMA requires very few clock cycles while transferring data.
• DMA distributes workload very appropriately.
• DMA helps the CPU in decreasing its load.
 Disadvantages of DMA Controller
• Direct Memory Access is a costly operation because of additional
operations.
• DMA Controller increases the overall cost of the system.
• DMA Controller increases the complexity of the software.
 Computer Memory
• Computer memory is just like the human brain.
• It is used to store data/information and instructions.
• It is a data storage unit or a data storage device where data is to be
processed and instructions required for processing are stored.
• It can store both the input and output can be stored here.
 Primary Memory/Main Memory
• It is also known as the main memory of the computer system.
• It is used to store data and programs or instructions during computer
operations.
• It uses semiconductor technology and hence is commonly called
semiconductor memory.
• Primary memory is of two types:
RAM
ROM
 RAM (Random Access Memory)
• It is a volatile memory.
• Volatile memory stores information based on the power supply.
• If the power supply fails/ interrupted/stopped, all the data and
information on this memory will be lost.
• RAM is used for booting up or start the computer. It temporarily
stores programs/data which has to be executed by the processor.
• RAM is of two types:
S RAM (Static RAM)
D RAM (Dynamic RAM)
• S RAM (Static RAM): S RAM uses transistors and the circuits of this
memory are capable of retaining their state as long as the power is
applied. This memory consists of the number of flip flops with each flip
flop storing 1 bit. It has less access time and hence, it is faster.
• D RAM (Dynamic RAM): D RAM uses capacitors and transistors and
stores the data as a charge on the capacitors. They contain thousands of
memory cells. It needs refreshing of charge on capacitor after a few
milliseconds. This memory is slower than S RAM.
 ROM (Read Only Memory)
• It is a non-volatile memory.
• Non-volatile memory stores information even when there is a power supply
failed/ interrupted/stopped.
• ROM is used to store information that is used to operate the system. As its name
refers to read-only memory, we can only read the programs and data that is
stored on it.
• It contains some electronic fuses that can be programmed for a piece of specific
information. The information stored in the ROM in binary format. It is also known
as permanent memory.
• ROM is of four types:
MROM(Masked ROM)
PROM (Programmable Read Only Memory)
EPROM (Erasable Programmable Read Only Memory)
EEPROM (Electrically Erasable Programmable Read Only Memory)
• MROM(Masked ROM): Hard-wired devices with a pre-programmed
collection of data or instructions were the first ROMs. Masked ROMs are a
type of low-cost ROM that works in this way.
• PROM (Programmable Read Only Memory): This read-only memory is
modifiable once by the user. The user purchases a blank PROM and uses
a PROM program to put the required contents into the PROM. Its content
can’t be erased once written.
• EPROM (Erasable Programmable Read Only Memory): EPROM is an
extension to PROM where you can erase the content of ROM by exposing
it to Ultraviolet rays for nearly 40 minutes.
• EEPROM (Electrically Erasable Programmable Read Only Memory): Here
the written contents can be erased electrically. You can delete and
reprogramme EEPROM up to 10,000 times. Erasing and programming take
very little time, i.e., nearly 4 -10 ms(milliseconds). Any area in an
EEPROM can be wiped and programmed selectively.
 Secondary Memory/Auxiliary Memory
• It is also known as auxiliary memory and backup memory.
• It is a non-volatile memory and used to store a large amount of data or
information.
• The data or information stored in secondary memory is permanent, and it is
slower than primary memory.
• A CPU cannot access secondary memory directly. The data/information from
the auxiliary memory is first transferred to the main memory, and then the
CPU can access it.
• It is a slow memory but reusable.
• It is a reliable and non-volatile memory.
• It is cheaper than primary memory.
• The storage capacity of secondary memory is large.
• A computer system can run without secondary memory.
• In secondary memory, data is stored permanently even when the power is off.
 Types of Auxiliary Memory
• Magnetic Tapes: Magnetic tape is a long, narrow strip of plastic film with a
thin, magnetic coating on it that is used for magnetic recording.
• Bits are recorded on tape as magnetic patches called RECORDS that run
along many tracks. Typically, 7 or 9 bits are recorded concurrently. Each
track has one read/write head, which allows data to be recorded and read
as a sequence of characters. It can be stopped, started moving forward or
backward, or rewound.
• Magnetic Disks: A magnetic disk is a circular metal or a plastic plate and
these plates are coated with magnetic material. The disc is used on both
sides. Bits are stored in magnetized surfaces in locations called tracks that
run in concentric rings. Sectors are typically used to break tracks into
pieces. Hard discs are discs that are permanently attached and cannot be
removed by a single user.
• Optical Disks: It’s a laser-based storage medium that can be written to and read.
It is reasonably priced and has a long lifespan. The optical disc can be taken out
of the computer by occasional users.
Types of Optical Disks
CD – ROM
• It’s called compact disk. Only read from memory.
• Information is written to the disc by using a controlled laser beam to burn pits
on the disc surface.
• It has a highly reflecting surface, which is usually aluminium.
• The diameter of the disc is 5.25 inches.
• 16000 tracks per inch is the track density.
• The capacity of a CD-ROM is 600 MB, with each sector storing 2048 bytes of
data.
• The data transfer rate is about 4800KB/sec. & the new access time is around 80
milliseconds.
WORM-(WRITE ONCE READ MANY)
• A user can only write data once.
• The information is written on the disc using a laser beam.
• It is possible to read the written data as many times as desired.
• They keep lasting records of information but access time is high.
• It is possible to rewrite updated or new data to another part of the disc.
• Data that has already been written cannot be changed.
• Usual size – 5.25 inch or 3.5 inch diameter.
• The usual capacity of 5.25 inch disk is 650 MB,5.2GB etc.
DVDs
• The term “DVD” stands for “Digital Versatile/Video Disc,” and there are two
sorts of DVDs:
• DVDR (writable)
• DVDRW (Re-Writable)
• DVD-ROMS (Digital Versatile Discs): These are read-only memory (ROM) discs
that can be used in a variety of ways. When compared to CD-ROMs, they can
store a lot more data. It has a thick polycarbonate plastic layer that serves as a
foundation for the other layers. It’s an optical memory that can read and write
data.
• DVD-R: DVD-R is a writable optical disc that can be used just once. It’s a DVD
that can be recorded. It’s a lot like WORM. DVD-ROMs have capacities ranging
from 4.7 to 17 GB. The capacity of 3.5 inch disk is 1.3 GB.
 Cache Memory
• The data or contents of the main memory that are used frequently by CPU are
stored in the cache memory so that the processor can easily access that data in
a shorter time.
• Whenever the CPU needs to access memory, it first checks the cache memory. If
the data is not found in cache memory, then the CPU moves into the main
memory.
• Cache memory is placed between the CPU and the main memory. The block
diagram for a cache memory can be represented as:
• The cache is the fastest component in the memory hierarchy and
approaches the speed of CPU components.
• When the CPU needs to access memory, the cache is examined. If the
word is found in the cache, it is read from the fast memory.
• If the word addressed by the CPU is not found in the cache, the main
memory is accessed to read the word.
• A block of words one just accessed is then transferred from main
memory to cache memory. The block size may vary from one word (the
one just accessed) to about 16 words adjacent to the one just accessed.
• The performance of the cache memory is frequently measured in terms
of a quantity called hit ratio.
• When the CPU refers to memory and finds the word in cache, it is said to
produce a hit.
• If the word is not found in the cache, it is in main memory and it counts
as a miss.
• The ratio of the number of hits divided by the total CPU references to
memory (hits plus misses) is the hit ratio.
Advantages of Cache Memory
• It is faster than the main memory.
• When compared to the main memory, it takes less time to access it.
• It keeps the programs that can be run in a short amount of time.
• It stores data in temporary use.
Disadvantages of Cache Memory
• Because of the semiconductors used, it is very expensive.
• The size of the cache (amount of data it can store) is usually small.
 Associative Memory
• Associative memory is also known as content addressable memory (CAM) or
associative storage or associative array.
• When data is accessed by data content rather than data address, then the
memory is called associative memory or content addressable memory.
• It is a special type of memory that is optimized for performing searches through
data, as opposed to providing a simple direct access to the data based on the
address.
• When a write operation is performed on associative memory, no address or
memory location is given to the word. The memory itself is capable of finding
an empty unused location to store the word.
• On the other hand, when the word is to be read from an associative memory,
the content of the word, or part of the word, is specified. The words which
match the specified content are located by the memory and are marked for
reading.
• It takes relatively less time to find an item based on content rather than
by address.
• It is very expensive.
 Virtual Memory
• Virtual memory is a common technique used in a computer's operating
system (OS). Virtual memory uses both hardware and software to enable
a computer to compensate for physical memory shortages, temporarily
transferring data from random access memory (RAM) to disk storage.
• Virtual memory is a method that computers use to manage storage space
to keep systems running quickly and efficiently.
• Using the technique, operating systems can transfer data between
different types of storage, such as random access memory (RAM), also
known as main memory, and hard drive or solid-state disk storage.
• At any particular time, the computer only needs enough active memory to
support active processes. The system can move those that are dormant
into virtual memory until needed.