8085 Microprocessor Architecture Overview
8085 Microprocessor Architecture Overview
INTA
RST6.5 TRAP
sID
INTRRSTS5 STS soD
8 bi deto buS
Accumulotor
L (bit)
Temp Insucthon|
(8bit) RetBbr+)
Mu
Z
(
Inst E
De (81
Code
ALU
(8
Srock peoin
16 b
Progrom Can
Trming ad Conhol Uait
Teveent|Dec
CL
2CL DMA Rmt odaws
Lpteh (1GDit)
CLE Coia Status Reset
oUT
TUITIAU Address
Dota Aderss
READYALESo HLDA RESET OUTT 8u1fevta) Bufler (8bit
51 MOLD
Ro
WR Io
Ais-Ag AD-ADo
RESET 1IN
X1 4 Vec
x2 HOLD
RST5S 32
INTR 31
INTA 1 3 ALE
A DO 12 29 SO
AD 13 28 Ais
AD2 4 27 Aly
AD3 1s 26 F Ag3
AD4 16 2s Ai
ADS 17 A
24
AD 1 23 Ao
AD7 19 22 A9
GND 20 2
SO Senas In dal
CLK clock,
Address late Enable
ALE
Salient features ot Bo85 MicopsDe Ss
1) 9+ is an 8bit PsocesSor cwhich con ocrept and process 8 bikdets
2) 9t has 8 bit inteanal dat bus. ( Do D
of memo
6) 9t psovides 8 bit I/% adde sses to access 23 (2s6) Ilo ports.
s At operad
Ahough
genrral pupose regicters ov 9 bAaside
but hey con be used os 6 bit rgistes by
Co.E) and (,L-)
combming B,e)
Hhey ave alko knonas B DE end H ,
poir
POT cuTing 16 b*
has
ope ratian. Among ol e s e poirs HEpeT
speial Sgiticone In some
of Bos menoH Telard operahans|
HL pir is used as o
emoty poiten C addrss of
wemo loration).
Emp Mov A, M
cshre A
Ace umulator
Memoy locahon
hinsruehor sig fies hot thonsfe he data stovedd
inmemary loation to
location i be
arumulato nood Hhe emory
memory e
H 29H
spoufrecdbHL
ond L
poi
01H hen
28 Mo1 2B01H
Coddesof
memory locahon) 29o4M
2803
28e2
A 5M 56H29o1H
28o0H
Accumulatov- ACcUulato is en & bit registes hreh is
w*
s Z AC x P x c
B Bs B4 B3 B2 B1 Bo
MS8 of aceumulatoY =
1 Hhen S=
MS8 of orrumulatovr ohen S o
1 0 oo oooo
Cotent of areumulator
So cary
atev he addun'on operohen Z wit be 1
Auxltor Ceny (AC)- Te
auxiloy Corty log is set
when n
1e auzlliory cav*y genla
process ot orihmehe opei ohon, ( AC
durin
duTi BCD arithmetie operanon
is
gneatrd
and
e binoy Subshroerm op)
hen a
Cay 3 2enerated from 8s bt and
+o B4 bit
hi's CoTry is also knousn
posses
os haf Coy
Exp Add OF (M)Sih_o1)
OF() oo00 T
O1 (H) oooigoo1 B3 bit aeneaies a Cany
heh i4
passes *
o010000
B4
So AC'
Paity Flag (P) The pavity +lag is set f he Content
ot accumulaor ate qny rihmtc
oper aton had eren
no ot 1s
Exp Aet ofter eny oprarlon A o01 1olo (®)
a n o ot
1s 4 (evan) So P 1
w Flag C)-covy fig is set f co anerated
trom bit Hhis flg also indicates
he value of borYOL t Substrachon opera hen.
Ep 3 (H) a oo oo
D2 ( ) o oolo
1 0o ot 09
cavy kon 7h b so C 1
Buses 8oSS
1) Data Bus-) 8085 has 8 bit dats bus to tronste binory 10fomatm
rom uP to memory/Io devices ond Vice-Versa
D a t a bud is mutiplexed uoith address bud ( ADo - A D=) to seduce he
umbea of cxteLna pins i wp IC.
Data bus s bidirectibnal
2) Address bus -
Multiplexes bus
AddresS
ADo-AD Bus Ao A
74LS373
Latch
3) onto Bus -
)This bus 1s Used to gererate timing and Control Signals fos
Contsolling the assoiated memoTY ond peiphera devies ,
Sorme of he Con tsol sLgnals are
i Io M RD NR V) ALE
When ALE = 1 ,
ADo-ADa Ao- A
Do- Da
ALE =O, ADo- AD
va ious operahoms
These lines are used to describe
Status Signa( So S1) -
Remank
So status
SL
Halt No OpeAation
up writes cdata
WTite
O
P reads d a a
Read
fetches thstructhon fsom ccde men
Fetch up
Io/M D MEMR
KD
NR D MEM W
IOR
8085
MP
TOW
INTR- *)9t son active HiGH Stnal qenerated by exte nal deices
When INTR 1 that means external device wonts t o
Communicade asi h 3085
to go high.
*This Signal is mainly Used by sloia pesiphera devjces
bt 808S.
*)HLDA = 1 mean ss
8085 is Teady to tonsfea Hhe ontro
Of Sstem bues
SoD (Sesal Out data) - This pin is used to send data Serially
as pe Hhe Ran. SIM (Set Toterwupt Maok)
Inshsuchon ezecuhion
51D (Seiol Input data)i This pio is Uscd to acrept senal data ao pes
the execuhon o RIM struehm
*
Tntersupts
Tterrupt is a
Signal ot a
psocrss initiated by extesnal
device to nfoTm Hhe processor hat it is ready o Communic
ate he
-
Non Vectored
TNT) Vectoved Interrupt
RST 5.5
65
Non- MMaskable Tntersupt- TRAP
(VectoredIntesruPt)
*) Non- Vectosed
Tntessupt *equire an externol horduore
to
upply Hhe Location fsom cwhere execuHon Has
to be
Testarted
*) Vectoved
întesrupt have Vector AddCss ho
spe ty he
Call locat ion
oo28 H)
oo29 CH) and So on. he
som hnis no program coill start
locotiom. exacobing
Ho he intexd upt prouSS tekes place -
x
3518
18 23FE
Code MemOTY
STACK Memory
Block diogvom for Intesrupt
w System t 8o95
5V Vectov Addves
AL
RST5-
C
Mask
RST:S
D To external
Hard&ore of
o03C CH)
J RsST 65
Mask
RST 65
D -0034+ CH)
70038 H
TRAP o024H)
oo2-0 H
EL S
00 0 H
DI
Reset R o o0OH
Any fnterwph
Recogni'se Tnteopt Engble FlipFlap) Get RST
Code from
Ecernal
N INTR |Hardove
= o 1 o CH)
INTR
INTR
Intesrupti^g|
device
B025 MPU
TNTA U EN +5
D% -www-
www
www.
w-
ww.
www
www
Do ww
IR 5V
RST2 Code qeneration Harduwave
Code generated by hadore = Dq Ds Ds O4Da Da9 Do
1 o 101 1 1
this s Hhe opcode of RST2 So RST2Jill be executed. he PC
will get he veckor address of RST 2
cohich isS
oolo(H) oites
ececuting RST2 ,Processo% wil) execute fom locat lem oolo CH) .
Machine Control Tnstruetion for Interuptsg-
() Enoble Intemupt-CEI): this a single byte fnstvuchon. which
Sets he Intevtupt enable flip flop
by vsing his nstruction S cwill get 1 tn Inter opt Enoble F.F: so
he devices can
interrupt
C1) Disable Interupt ( DI) - This s a 1 byte instruchon
which
IS Used to disable
Chen Hhe intezrupt prosss
we înset or orite DI tà oUY
of Oi no PTogTam Hhen ahter execuhHor
intervupt
,
t
eoterrained by proces soY. So
devices
interrupts , it is not Seaviced by Bo85. ithe exkemal
U) Set Intesropt MASK C
SIM) his instruction fs osed 3 fon
different functions -
*)Used to Set maok fov
RST7-5, RST 65, RST 5.5
Used to rebet RST
75 flip flop intervopfs.
s e to
Impliment sesial Input |output hrough SiD ond soD.
fovmo fov SIM
fnstruct ion
B7 Bs Bs B4 B B2 Bi Bo
code e
put X =O
Code we Put X= 11
MVI A,5c CH)D
SIM
EI
HLT
8o85
* Nhe SiM sr.
s erecuted S2
ill be closed
SIM
s1
sOD Pin" * t soE = 1 Hhen S1
coil be clo sed
datg on
ond L
(8)soD
of Acc. will Cend to
sop SOE sOD pin
Accumulatov
4 Read Iterrupt MadK instruchion ( RIM)- Tnis înstuchèn is osed to
Tead the &tatus of vaniou
pending intesrupts and also used to recieve data Sevialls onsID p
SID
17516s|I55| TE M75 M6:s MSs
i t 1 Hhen it tells
itany of one bit is Hhat RST 55 is
MasKed
1Hhen it shotos het
the particulan intevY i t ? means RST6:Sismask
upt is pendingt'e
LH i means RST 7S iS maoked.
oterropt is not Seawice Hhen Tntrrrupt Enable lip Flopi
Set
et.
bit
> Sestalinput data C Datare uered on siD pin ot 885 ill be
plad on his pomtom).
8o85
RIM
data bit on SID
Suitch (itcsillbecloged Pin of 809S
when RIM 's ¬xecud
sD B4 BaeB Bo
ACC
87
Opcode Fetch
T1 T2 T3 T4
CLK
Ag-Ai5 X30H
Decodin9
AD-AD X20H 64H
ALE
TolM TolM=o
RO
Ro-0
Ag-AIs X 36 H 36H
K X 360ol
Ag-As 36 H Reg H 86 H
L:0H
ADo Xo0 H 32H (opcode)) O1H Ay5H|Cdata)
ADT Decode
ALE
Io M Io/M=-0 1o/M=0.
RD
WR
D. 3 I mo o S
A
0
qs MovI s Gro up ó istsuchon so Ond will be
D7 Dc Oo
Register B d'cates Ds De Pae 000
as Hhe immidiate
So we
operation ís parfprmed o9 shgle *gister
hove oa D Do
So
130
op- cods wil1 beeome
D, De Ds P4 D3 DaD Do
6H
O6H ndu'cades he op- code for 1istsuchon MVI G, 91H
Exp INX B3
as
as
TncTemant register paiv B-c
Incre ment
belongs to gvoop 8 so Ce have D De = 00
B-c egister pair codo= oo
1erement opeation i's to be
pertosmeel on
regisien pai
B o11
D Dc Ds P4 P3 D2 D Do
o O1 1 O3 H
T is added by defaut
Reg'ster pair Codo
10 C. O 11 23H
defoutt addihion of o dusingNX
* Default valu may be O or 1 Some tnshruchems it s
and i some it i's 1' Hhese valves avre cho sen bp defeut
Tnstruchons of Goup d-
MVI moveimmid iate LDA Lcad RLC 1Rotation of
LxI Load immidiate STA Stove
RRC Accumulatoy
INR Inesement DAD add Re airto HL. datg
DAA
RAL
INX finCYemert Reg Raiv
DCR deee ment CMA Complimat A RARJ
STC set cavY
DCX decrement [Link]
CMe
LDAX Compliment Cavry
.Load from RaPoi NoP mo
operahon
STAX Stove som [Link] RIM
LHLD Load from Reeieve or Send Seviál data through
HLpai SIM SID and soD pió
Byte Ovgonisation of Goup 1 Insruchons -2 This 1roup
roup 13
13 the
he
azest aroup ohich
moves 1itormaton from one souTce to oHhe SouTce or destinabion.
this is also
Toup called MOv qroup.
D Ds Ds Dy 3 D2 Da Do
R2 R1 Ro S2 L S So
41 H
Group 1 Code fo
Code fov
Sending Roale c
Reeiering Register '8'
Exp MOV M, D
+2 H
Group 1 Codefov Code for D
M
12
6yte Organisatio fov Group'2 Instruetions - This group is called
arithmetic and
logical 3roup comparilon of 2
registerc avve also one by
his qroup intsuchons
D Ds D Dy D3 Da D Do
1 o Aa AAo
S2| S So
Code fov ALU operaton
roup 2
Reiste tofornation
S2 S1 So are Hhe
registers hich ere source of data .
he
Code foY ifferet Taisiers are same as
1 qroup 1
Aa A Ao
ADDITI ON CADD)
O 1 Add coih camy
CADc)
Subshachon
CSUB)
Subsrachon cih borow ( SBB)
o8ta AND
Exclosive -
OR CxOR)
Logtad OR
1 1
Compone
Exp> ADD B
4oo ooololol 80 H
O1 oo BC H
code tor
Codeos
Compore eisr H
o 0 0 o 3
o o
O
O
3 HH .
5 (
Exp TNZ Address -e. JNZ 2000 H
he instruction says ump t rot zevo to oddress 2000H.
1 o olo|oLo] = c2 H
conduho naumnp
Conditon 1s
tnot Zero
Exp CALL 2440 H
1 o 4 o1 co H
Uncondubonal
CALL
op Code operand
here are 3ty pes ot tnstru chons cwe Use o micopsoco SsoY-
) One
byte iistruebon - In
histype ot nstsuchon inpimaa-
tioo about Hhe
is contained i a
ope rabon and locabon
Single byte.
MOV A, C
1n'struetion haa code 79H.
noco
9H s an8bit
(one byte)
nation abut operabon C mov) andformat ohich have
ation iioY-
locabon C C to A
(11) To byte Register).
iistruction- he two byte instrucho n have
nstruchio n have
2
field3 -a) ap code field
b) Data |Address field
Exp MVI A, 50H
Hhe above
iistTuchon have2 opcode 3E H hich tells
US hat mmidiate data has o be movtd
A h e instruchon also R to regI'steL
so he specities he data 50H
nstsuchon has 2 bytes 3EH, and
(ii) Three byte 1istruetion - 50H)
opcode dafa
tin
ting fom suehn MOV MA and so
on
Rules tor label-
) Label must be t o 6 charaeter long
*)9t contains letfers from A to z and di'aits from O fo 9.
) No speciol choracters con be used.
muot oith a ete
be start
Registers CA, 3,c, O, etc) and operabon codLs ( ADD
Mov etc) Can bot be vsed as lasel
k)One Space & lelt betoeen Hhe 1abel and op code