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8085 Microprocessor Architecture Overview

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0% found this document useful (0 votes)
107 views32 pages

8085 Microprocessor Architecture Overview

Uploaded by

tarun
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd

Block Dg Tom of Bo95 MCTOpDe ssoT-

INTA
RST6.5 TRAP
sID
INTRRSTS5 STS soD

Interrupt Cont Serial IIO


ontol

8 bi deto buS

Accumulotor
L (bit)
Temp Insucthon|
(8bit) RetBbr+)
Mu

Z
(
Inst E
De (81
Code
ALU
(8
Srock peoin
16 b
Progrom Can
Trming ad Conhol Uait
Teveent|Dec
CL
2CL DMA Rmt odaws
Lpteh (1GDit)
CLE Coia Status Reset
oUT

TUITIAU Address
Dota Aderss
READYALESo HLDA RESET OUTT 8u1fevta) Bufler (8bit
51 MOLD
Ro
WR Io
Ais-Ag AD-ADo
RESET 1IN

)w2, 8, C.D. E,H,L Ove a bi Geneal purpese gsterg.


o85 PN DTam -3

X1 4 Vec
x2 HOLD

RESET OUT HDA


SoD 37 CLK (OuT)
SID RESET I
34
TRAP 3s READY
RST 7 5
34 10
RST 65 33

RST5S 32
INTR 31

INTA 1 3 ALE
A DO 12 29 SO

AD 13 28 Ais
AD2 4 27 Aly
AD3 1s 26 F Ag3
AD4 16 2s Ai
ADS 17 A
24
AD 1 23 Ao

AD7 19 22 A9
GND 20 2

SoD saal out dala

SO Senas In dal

CLK clock,
Address late Enable
ALE
Salient features ot Bo85 MicopsDe Ss
1) 9+ is an 8bit PsocesSor cwhich con ocrept and process 8 bikdets
2) 9t has 8 bit inteanal dat bus. ( Do D

3) 9t opeatcs on +5V powe Su pply

4) 9t Can opesate fsom 3 MH2 to 5MH2 clock sequeny


5) 9t has 16 address Tines ( Ao - Ais) , so t can acce ss 64KB

of memo
6) 9t psovides 8 bit I/% adde sses to access 23 (2s6) Ilo ports.

*) 9t Suppost 4 diflerent tpes of hstruehons.


Slower 8 bits f address bus CAo -AT) s multiplexed oiHh dta bus
CDo-D) to edce the numbe of extena pins but extena
hardusane ( Latch) is regued to seperafe dats and address lines.
9) 9t has 8 bit reasters ( A, Flag , Tnstruetion negiste ) and

6 bit egisters PC, sP) ohich are speciaL puspo se regisBers.

puspose regilers B, C, D,E, H )


lo) 9+ has 6 Genera
11) 9t psovides five handesore Intesupts INTR, TRAP, RST 5.5,
RST 6:5 and RST 7:s.
sesial Communication
ability using SID and sOD Pin
2) 9t hus

Architecture Des Cption of, 308S


funchone
has 5 onits
The SoS 5 up
ond log ica n i t CALU) 4) Tnstruchon Rogislar and
1) A r i h m e t i c Instruchon decode
2) General purpose Regislers
5) Contoi Unit
3) speual puspose Ragiskrs

+ Logical Unit (ALU) -2 this Unit Can perform


1 Aihmetic
addition
* ) 8 gnd 16 bit binory
oith or hout bevroul
) & b i t Subtra chon
adoinon
BCD
*) 2 digat
bit logica AND, OR, EX-OR , NOT and shit opehatien

ALU s accumulator osient Unit that meons dusing [Link]'on or


opehatibn (auhmefic o logical) one of Hhe opeaA muo+ be in
accumulatoA oot
Gene purpose Registers- A Register is a colleeten ot &
O-type Hip-tlop wih povollel i ond
pavall out
opeohion. geeral popose risters o e usad to
he
Store Hhe data hat it
9nd he
beng used by *e pogrom ndea executiom
Teult obtoined fown it

Regishevs B,C.D,E, H, L ore H genem pwrose


Tegists i 8o85 hese ngisrs ote also knon as seRATM
PAD In almost Gll Hhe
ai hnetne ond logias opeston *e
Tgistea ar used as he zecond oprand, hile accumulatoy
,

s At operad
Ahough
genrral pupose regicters ov 9 bAaside
but hey con be used os 6 bit rgistes by
Co.E) and (,L-)
combming B,e)
Hhey ave alko knonas B DE end H ,
poir
POT cuTing 16 b*
has
ope ratian. Among ol e s e poirs HEpeT
speial Sgiticone In some
of Bos menoH Telard operahans|
HL pir is used as o
emoty poiten C addrss of
wemo loration).
Emp Mov A, M
cshre A
Ace umulator
Memoy locahon
hinsruehor sig fies hot thonsfe he data stovedd
inmemary loation to
location i be
arumulato nood Hhe emory
memory e

H 29H
spoufrecdbHL
ond L
poi
01H hen

28 Mo1 2B01H
Coddesof
memory locahon) 29o4M
2803
28e2
A 5M 56H29o1H
28o0H
Accumulatov- ACcUulato is en & bit registes hreh is
w*

most inportont i s t e r . 9 is used to sto 8 bit


date ond to
prform ovihmene ond
logsea opre hons he olP
ot an
OTihmetic
lagit op ohon s olso stored i
ov
acunulab.
Hhe
Bo95 mievoprocessoY Communicates wih
elevies iput etpt
only hough Hhe occumulator
oam Counte ( 16
bit coide) 9 fs an 16 bit regist
hieh s vSd to
Sequence ot execuhioon of specity he
insthuekons Hhis Tgiahe o
he
points to the addres6 ot the next nstruchon tu be
In otev wors he
executel
to
funehon of prD2Yom Count is
point he
memory oddrsc rom ashich ne »t
fetche when a
byte
byte is to be

Scrementee by being fetched he


one to fnaicate Hhe next
progron Coten
memoy locatiom.
Stack Pointe - stocK s a
pa ot shich
hich Con be vsed
oy La in first out ( memory vted
hese me LIFO) fashion to access
moty locations , we neod a access
or
aives us Hhe addrss o raiste sheh iditates
13 used fer hese Stack pointe 1ocahons.
hiss
purpose and is 16 bit i d e
pointe
The
a seies
pToRTommer Con neseve and Gllocate
of memovy locations to be usd as a
aceovdingly intialige he StocK and
StoCK and
) I n all staek pointer registe
micvoprocessor bosed SstemS
mainly used o Syatems , the tne stoek
stock ss
store he return
addreSS ot he
hen a subrouhine i called. mon
main
prog9
pr

stack Pointer Registe


(16bi
Xxxx H_
STACK
Portion
ot
MemeTy
on 8 b Regfstes ,wheh is not
Instruetion Registe- con not De aeees sed
Pro moble and
byhe uses nStuehen gis1e and i*sruerion decoden

ore e tunchona paat ot ALU henevn a instruction is fetele


renmemory , t is looded in the insuehon vgister in me
binery form. Hhen nstruchbn decoden convets his infotm-
ation acrordi to h e
rquiemm ot ALu
n additon , * * r ore 2 mperoy r8'steYS
and Z . ohich oe controlled internolly and not ova labie
for use acress.

Flog Registes - The Hoa 1s en ebit giste usd to shon


Hhe
Stotus of cont orithmete o r lonrea
Operation. cech bit ot flag gister is indeendem of nch
others hese bits con be set or reset indivsuolly acto
ding to the ecent opraton performed

s Z AC x P x c
B Bs B4 B3 B2 B1 Bo

sign o Negatve feg (s)- we all koou 1 signd bney


numbe system t MSB oF ony
umber 1 n he number is Negatvee andf MSB is O
hen he numbe s positive Hhe
flog idi cates hat
Hhe recent Orihmetie operoton rsults a potitive numu
or negatie numbea

MS8 of aceumulatoY =
1 Hhen S=
MS8 of orrumulatovr ohen S o

et perfovm Swbstatt r'on of 5 om 6oN


Exp
Minuend 60H 01lo ooooH
Substrqhend C5H 11oo 0101 M
taen 2 Compliment ot C5H ond hen odded
o0o0 As MSB of Acc 1,i+)
A OO
toMe S 1,whth
Iiditate he resust ii Ace
MSB Neq
Zero Fag (z)-s Tnis f g ndicates Hhat the result of he

w Tecet operation is 3eo


it oll he bits ot accumulator orr gero e e A shos ooH
hen
1 oherwise witi be O
Exp Add FF (H) twith o1(H)
FF 1111 11

1 0 oo oooo
Cotent of areumulator
So cary
atev he addun'on operohen Z wit be 1
Auxltor Ceny (AC)- Te
auxiloy Corty log is set
when n
1e auzlliory cav*y genla
process ot orihmehe opei ohon, ( AC
durin
duTi BCD arithmetie operanon
is
gneatrd
and
e binoy Subshroerm op)
hen a
Cay 3 2enerated from 8s bt and
+o B4 bit
hi's CoTry is also knousn
posses
os haf Coy
Exp Add OF (M)Sih_o1)
OF() oo00 T
O1 (H) oooigoo1 B3 bit aeneaies a Cany
heh i4
passes *
o010000
B4
So AC'
Paity Flag (P) The pavity +lag is set f he Content
ot accumulaor ate qny rihmtc
oper aton had eren
no ot 1s
Exp Aet ofter eny oprarlon A o01 1olo (®)
a n o ot
1s 4 (evan) So P 1
w Flag C)-covy fig is set f co anerated
trom bit Hhis flg also indicates
he value of borYOL t Substrachon opera hen.
Ep 3 (H) a oo oo
D2 ( ) o oolo
1 0o ot 09
cavy kon 7h b so C 1
Buses 8oSS
1) Data Bus-) 8085 has 8 bit dats bus to tronste binory 10fomatm
rom uP to memory/Io devices ond Vice-Versa
D a t a bud is mutiplexed uoith address bud ( ADo - A D=) to seduce he
umbea of cxteLna pins i wp IC.
Data bus s bidirectibnal

2) Address bus -

These ore gsoup of wjses that CovTies address only.


Address bus 1s unidirectionaL Cfsom up to Memosy/tO)
be
8085 h a l6 bit address bus (Ao - Ais) . s o hese l6 lines Con
used to access 64 KB mememY ( o00H- FFFFH).
*)lowes osde Address bus s multiplexed coih data bus( ADe- A D )
order buo s dedicated bus.
ond highe
hese buC
*)Dusing he first (16t) cleck cycle of mony machine Cycles,
are used to carsy address of Hhe memosy l TO devrices .
ALE

Multiplexes bus
AddresS
ADo-AD Bus Ao A
74LS373
Latch

Highe Orce Address bus


Oqtg bus
Do-D4
As- A15 Ag-AS

3) onto Bus -
)This bus 1s Used to gererate timing and Control Signals fos
Contsolling the assoiated memoTY ond peiphera devies ,
Sorme of he Con tsol sLgnals are

i Io M RD NR V) ALE

TolM when IO M 1 the micsopsoess exchange elatg


cwith external pemphera device.
C IO deice selecteed)

T0 M =0, he micsopsore s Sir ecchange datg


CiHhmemorY
MemorY selected)
RD ( Read
w
* 9 t is an active low signa indicating ead by P
cwonts to Tead dats fro
f RD = o ,
hat means Mp
seleclod I O or memoTY

Ro =O also indicetes he date Flow from Io Mem to P


NR-(WTite)
*) 9t is on ochive low sangl undicating wite ope fatian b P.
wants to write cdata (send)
*) When NR o , that meonss P
onto selected memoTy Or LO dev ICe

ndicaTe s data flou from up to mem/IO

ALE ( Address Latch Enable) -2


k) 9t is an octive high sgnal
In T1
lemultiplex low osdeà bus ADo- AD
* ) 9 t is used to
machioe cyele
First clock CHcle) of opcode fe teh

When ALE = 1 ,
ADo-ADa Ao- A
Do- Da
ALE =O, ADo- AD
va ious operahoms
These lines are used to describe
Status Signa( So S1) -
Remank
So status
SL
Halt No OpeAation
up writes cdata
WTite
O
P reads d a a
Read
fetches thstructhon fsom ccde men
Fetch up

Io/M D MEMR
KD

NR D MEM W

IOR
8085
MP
TOW

Fi'g Geoeration of Contsol signols


S So Io/M Function
Halt
O Memory write
O Memory Heod
1L opcode fetch
Halt
1 Ilo wTite
1
Ilo Read
1 1
Intemupt Ackoouledge
Othe Stgnols speüfication_of.8085 -

INTR- *)9t son active HiGH Stnal qenerated by exte nal deices
When INTR 1 that means external device wonts t o
Communicade asi h 3085

INTA - *9t is an active LOW Sga generated by 8oBS


Nhen INTA = O, thot means processor s eady to
Communicate oih extenal peripheral devnice.

RESET IN *) 9t is an active LON Sgnol


that mean
**RESET IN =O, PG content oiln et resef
PC oooO H

RESET OUT- *) 9t 1s an active HIGH SLgna

* ) I RESET OUT = 1 that omeans all he Connectec devices


coill get qeset.

READY8 *)9+ 1s an active HiGH siga.

)Tf READY = i , hat means eateal peiphena derice 1s


eady to exchenge daa.
READY= O Hhat means 8035 hes t s woit for READY
,

to go high.
*This Signal is mainly Used by sloia pesiphera devjces

HOLD- *) 9t s an act/ve HIGH DMA Sgol generated by extesnal cevices.

HOLD= 1 , Hhat erterna d e i e wants to


mean

Conrol Hhe Sstem buses. qddress , ocitg buo).


*HOLD S1ga remains high dusing Hhe data troosfe:
DA- Hold Acknou ledge (HLDA) s an active H1GH C genenaled

bt 808S.
*)HLDA = 1 mean ss
8085 is Teady to tonsfea Hhe ontro
Of Sstem bues

HLDA (O bccomc LOr ohen HOLD Signal 20es doud 6


the Complete data transfe>).
Restant
Tntonupts - RST 75, RST 6.5, RST 5.5))
A he 3 are active HIGH SignolsS
*)All the 3 are Vec tored 9ntexsuet, that meas when o y

Interupt aoes HIGH the program toill transfer to followin9


memoty location o Coce memor
(TRAP o024 H Highest Priosity
Vectoved RST 7.S5 3C H
Tntesupt RST 6.S o034 H
RST S S- O0 2C H
Non-Vecte rcd INTR Address psovided Lowest Psiotity
Intersup by hard ware

TRAP- *) 9t 1s an active HiGH Stgna


K 9 t is a Ton maskable Intessupt
*)This in tesupt is used during emergency Situntion such as
POLwe failute emesqeny shut eff

Sesial Tlo Slgrals

SoD (Sesal Out data) - This pin is used to send data Serially
as pe Hhe Ran. SIM (Set Toterwupt Maok)
Inshsuchon ezecuhion
51D (Seiol Input data)i This pio is Uscd to acrept senal data ao pes
the execuhon o RIM struehm
*

Tntersupts
Tterrupt is a
Signal ot a
psocrss initiated by extesnal
device to nfoTm Hhe processor hat it is ready o Communic
ate he
-

psocess ispUrel asynehronoUs , means it Can


enerated be
ony time oithout
intesrupt vequests Teference to the System clock Thee
ave
elassified into 2 CategoTes
Maskable tnterTUpt here ore 4 maskable
*)
Non-maskable intenrupt one ntesrupts inS8)
non-maskable intevrupts in 2085)
Maskable Intersupt( INT RST55, RST6 5,RST 75) ,

Non Vectored
TNT) Vectoved Interrupt
RST 5.5
65
Non- MMaskable Tntersupt- TRAP
(VectoredIntesruPt)
*) Non- Vectosed
Tntessupt *equire an externol horduore
to
upply Hhe Location fsom cwhere execuHon Has
to be
Testarted
*) Vectoved
întesrupt have Vector AddCss ho
spe ty he
Call locat ion

exp RST 5.5 have Vector


addresS 2cH
cohen RST 55 s nitiatec he
prsoo ssoY cillestort its
prrossing fronm memory locati'on oo2c).
RST (Restavt) Intevsopt- There ave 8 RST insruchons t
8085 Hhese are 1
byte CALL
IÁstruc
tions hat transters He prroqrom execuhon toa specifed loca
ton on enoy (stashng from oo H). he specified loation
sCalled he Vecto address of RST s'na hsuctbon.
Restart insructons vector address -

RST nghsuchon Binay code Hex Code CALL oCATIoN


HEX
D7 De Ds D+ Da Da D, Ds C Calcolatad by 8xn)
RSTO
C 8xO O Ooo H
RST1 o oI CF 8x O O 08 H
RST 2
D 8x2 Oo10 H
RST3
o DF 8x3 O o18 H
RST4
o o E7 8xy= O O20 H
RST5
EF 8x5 O 028H
RSTG
F4
RST +
FF 8*7= o O38 H
111
Hex code
elenotes Hhe
CALL
opcode for
for RST
RST I'nssucbon
I'nsucßon
Location denotes the
Lo
lLocaton
caton of memosy
PTOom exeeurion is hanstevved.
to wh1'ch
to eohieh
Exp det at
any instant of thme the
h e poqrom
PC
Mnemon its
psoqrom
312o(HA) Commert
RST 5
Restst 5
che RST 5 1s
executed he
Fsom 312o(4) to
content of pcwill
Contept pe will
so he
Vector aedress
address of RSTS chonge.
chonge
De content of Pc caheh
ohièh is os28
os28 H
coill
coill be 2028
be
PC a028 H.
H

oo28 H)
oo29 CH) and So on. he
som hnis no program coill start
locotiom. exacobing
Ho he intexd upt prouSS tekes place -
x

det a device intesru ptss


Hhe imie5oproC ssoY USina RST
interrpt. 7:5
because he RST 7.5 ts vectorecd
otessUpt, micToprdOSsOY
Knows 1ó which
,
memost Locahon it has lo ao to get he 1sRCIn
tesrupt
tessupt Se»istce soutoe) address. RST 7 5 had vecor addess
O03cH) So
hat o
microprooss oes to o03c(HJ locabon and in

cation tt coill get a JMP nshruchon his JMP


ns-
uchon will
aive
he acua cddress of SR
*TSRC intessupt sewce Tooboe) is a
IS Stoed in
Hhe memoTy. Every
proaram uh'eh
Code memo interrupt has its ISR stOTecl i

Main progtam 0plo JMP


Ooll OO
oo12 15
oo13
3516 X*_
357 RST 2 8x2=16= 001o(H))

3518

This Content aoill


be stoved 15c0 XX
STACK dusing executn of RST2 ISol XX
1So2 RET
SP 24O0
2400 5%3
35 23FF

18 23FE
Code MemOTY

STACK Memory
Block diogvom for Intesrupt
w System t 8o95
5V Vectov Addves
AL
RST5-

C
Mask
RST:S
D To external
Hard&ore of
o03C CH)

Reset RST 7.55


RST 51
Recognise

J RsST 65
Mask
RST 65
D -0034+ CH)
70038 H

LRST 55 Mask o02c CH)


RST5.5 o028

TRAP o024H)
oo2-0 H
EL S
00 0 H
DI
Reset R o o0OH
Any fnterwph
Recogni'se Tnteopt Engble FlipFlap) Get RST
Code from
Ecernal
N INTR |Hardove

*) RST 45 is Edge sensitive intessupt , So to Btore its Tesponce


DElip-Flop is vsecl
RST 65 and RST55 a r e level sensitive or level triggee
ET stands fos Enable.
interrupt
k DI stonds for disable intertupts.
)Symbol Lrepresants dge tsiggeving andL indicates
arel triggesing
External Herd coove to handle interrpt
RST 2 has a vectoy addre sS = 8 x2 16 = Ooo1 o o o

= o 1 o CH)

opcode of RST2 coill be"= 11 o16 1 1 13


DCH
So cshen device
a
interuptsRSTZ , dvring Hhe executibn MP
Should 9et he code D9 n
ALU his code 1s generatrd b exlei
hard wore.(for eoch ntesrupt Hhere is hardeoave to
opcode
a
generate

INTR
INTR
Intesrupti^g|
device
B025 MPU
TNTA U EN +5

D% -www-
www
www.
w-
ww.
www
www
Do ww

IR 5V
RST2 Code qeneration Harduwave
Code generated by hadore = Dq Ds Ds O4Da Da9 Do
1 o 101 1 1
this s Hhe opcode of RST2 So RST2Jill be executed. he PC
will get he veckor address of RST 2
cohich isS
oolo(H) oites
ececuting RST2 ,Processo% wil) execute fom locat lem oolo CH) .
Machine Control Tnstruetion for Interuptsg-
() Enoble Intemupt-CEI): this a single byte fnstvuchon. which
Sets he Intevtupt enable flip flop
by vsing his nstruction S cwill get 1 tn Inter opt Enoble F.F: so
he devices can
interrupt
C1) Disable Interupt ( DI) - This s a 1 byte instruchon
which
IS Used to disable
Chen Hhe intezrupt prosss
we înset or orite DI tà oUY
of Oi no PTogTam Hhen ahter execuhHor
intervupt
,
t
eoterrained by proces soY. So
devices
interrupts , it is not Seaviced by Bo85. ithe exkemal
U) Set Intesropt MASK C
SIM) his instruction fs osed 3 fon
different functions -
*)Used to Set maok fov
RST7-5, RST 65, RST 5.5
Used to rebet RST
75 flip flop intervopfs.
s e to
Impliment sesial Input |output hrough SiD ond soD.
fovmo fov SIM
fnstruct ion
B7 Bs Bs B4 B B2 Bi Bo

sop sOE x R7s|MsE M75 M6s Mss


Reset Not
f o masking available
RST 5
1 Maski'ng is avoi loble meons
Hhen RsT 75 ntersu pt is masKed
Is gnoned

Maok Set Enade


fo, bits Bo-B2 are ignord
hen Bo-82 can be masked
Senal Out Enab)e it1, Bit B (s transfesrto
Senal output datalatch
*)To mask any ineT
upt , awe hove to f1rst engble Hhe maskng
procesS b MSE =
'1
Then if e wont tornask RST 75 hen
M7 5 1
RST 6S hen m 6:S=I
RST 5-5 Hhen M55 1
When sIM i'nstruction s exe Cuted Hhe 8bit dato of qceumulatoY iS
ronsferYed to
8 bits of SIM CBo-B#). so
have to place h we
8 bits 1 qccu mulator as
pen own Aqui'rement eefore gvna o
executhga SIM tnsthuctb.
exp write instruetionm to engble RST 5
logic o on sop pin . 5,RST 65 nd tsanefe
Ans to Enabe
RST. 5.5 and 6-5 we fivst place MSE= 1
M6'5O
M5 5 =o J so Hhat they are avoilable to inteupt
we hove to take
logce o fom soD pinSo soD
SOD (B4)-- O
O (B4)
and sOE CB6) 1
RST 7-5 s not
1equired so mask if by pbcna M7S*
and RST 7 S 1

SoD SOE X RT5 MSE M7m6sMss


O 1 1 1 1 O 5C OY

code e
put X =O
Code we Put X= 11
MVI A,5c CH)D
SIM
EI
HLT

Sexial output of data hroogh SoD -

8o85
* Nhe SiM sr.
s erecuted S2
ill be closed
SIM
s1
sOD Pin" * t soE = 1 Hhen S1
coil be clo sed
datg on
ond L
(8)soD
of Acc. will Cend to
sop SOE sOD pin

Accumulatov
4 Read Iterrupt MadK instruchion ( RIM)- Tnis înstuchèn is osed to
Tead the &tatus of vaniou
pending intesrupts and also used to recieve data Sevialls onsID p

foTmat ot RIM i'nstructhion


B B5 B4 B3 2 Bo

SID
17516s|I55| TE M75 M6:s MSs
i t 1 Hhen it tells
itany of one bit is Hhat RST 55 is
MasKed
1Hhen it shotos het
the particulan intevY i t ? means RST6:Sismask
upt is pendingt'e
LH i means RST 7S iS maoked.
oterropt is not Seawice Hhen Tntrrrupt Enable lip Flopi
Set
et.

bit
> Sestalinput data C Datare uered on siD pin ot 885 ill be
plad on his pomtom).

8o85
RIM
data bit on SID
Suitch (itcsillbecloged Pin of 809S
when RIM 's ¬xecud

sD B4 BaeB Bo
ACC
87

Eap t agter execuction o RIM fnstsuchion Aceumulatur had AGc).


tohat informacbo n uwe cuill
get fosn .
Sol
B RSTSsisenable
RST 6.5 is maDke
RST 65 s
RST7:s amasked
L IE0 means all
pandint which are masked
he
intesruptsS
are disabled
RST S.S is nst
RST 7S not
pending
pendina
Bnary bit 1 1rectered fom 610 pin
8085 Machine Cycle and Timing Diagam
X

BoB5 has 7 different type of mochine cyecles


) Opcode fetch iv) Ilo Head vi) Bus Tdle
1) MemoTy Yea V) zlo write
D Memory uDTIte vi) Interupt Acknouoledge
1) Opcode Fetch Cycle -: let 64H opcode is placed at Code Memory
location 2080H 8085 has to
tetch his opeode fsom memeTy. this opeation
ll get ezecuted 4-T states cohich are ezplained 64H 30
as

T1 stote K) PC will place Hhe qddress on


qddresS bUD Ag-AIS = 30H qnd Ao-A7 20H
)ALE = 1 , by S0855 MoKe Io|M= O So Hhat
)
memoTy 2ets activa ted.

Opcode Fetch
T1 T2 T3 T4
CLK

Ag-Ai5 X30H
Decodin9
AD-AD X20H 64H
ALE

TolM TolM=o
RO
Ro-0

T2 State - *) Make ALE =0 (Deachivate)


*) put RD O to enable Hhe required locaion 3020 H ond
place he data 64H on dat bus.

ae< Bos5 places He content of dats buo(6 uH) into IR


Tegiste
x)Deactivate Rb 6gna to disable memory location

T4 sate *)AP decod es he op code using Tnshuchon decode


necessary signals ane sent by conol unit
*)One byte Instoucthions like Mov AB ANA ,ADD R
INC Reg are executed 1 T4 ctate .
Memoy Read Machine Ctcle
Code Mem.
MVI C, 45H

*)First 4T 5tates will be of opCode Fetch, whicb


OA H 36 0DH
4SH 3601H
IS also called Mochine Cycle i
)Ate 4hT state he decode sill 1oform
Control unit Hhat immediat byte has to be moved
Trom Code memoTy to Rogisle c

Opcode Fetch Memory Reacl-


T T 16 T7
TI T2
CLK

Ag-AIs X 36 H 36H

AP-ADX00H OAH o1H 45H


ALE

Iol M 1o/M-O 1o/M=O


RD

Iol Mo to select operahon fom momort


T5- During TS ALE 1
3601 address will be
ADo-AD, >Ao-A7
Ag-A1sS floated on he Qddrss bos.
at he end of TS ALE =O ( disabled) and multiplexed bus (AD-AR)

ill get trisl l d High Impedance Z).


T During Ts RD 0 to get dats out fsom memet.
T Data (45H) wil get stored 1 gisl c.
at Hhe end of T RD 1
To/M 1
MemorY Wite Machine Cycie let HL 8 6 0 1
Code Mem
A-4SHH
MVI M, A 32H 3600

K X 360ol

*First Machine CHcle ( 4T) ill be of optode fetch:


*ATes opcode fch , conhrol unit get the to formatio
that tmmediate datg byte 45H hasto be stored det
whose address will be
1 Memory
provi de by HL pair
4SH 8601
45
Opcode Fetch Memory Nrite
T1 T2 T3 T T T6
CLK

Ag-As 36 H Reg H 86 H

L:0H
ADo Xo0 H 32H (opcode)) O1H Ay5H|Cdata)
ADT Decode
ALE

Io M Io/M=-0 1o/M=0.
RD

WR

*Ts Address of dats Memot oill be pævmdas by HL poiv


H 86 Ag~AIS
L0 Ap-A ALE=1 , 10|m = O
)Ts-e Dae 4SH wi) be plg Cod on datg bus RD = 1 WR =O
*) NR = o oill achivat memory locah'en 360.
dat cill get writen on locahn 86olH.
)T8
Addressing Modes o 808S
The way of specîfying data that has to be ope^ated by an instuc-
tion is koown as gddre ssing mcede.
Tn 8085 , here are 5 types of addre ssing moddes
1) Tmmediate Addressing mode
2) Registe Addre ss ing mode
3) Direct addressig mode
4)Registes Tndirect addre sing mede
5) Tmplied Tmplicit addressing moele

Teeiare AddresSing Mede Sourte operonc is aluoys data.


*) dota con be eithen of i byte o7 2 byte .

Exp MVI C, 45H Smove dotq 45H nto YegistenC


LxI H, 210OH move data 21cOH into HL pair
TMP 180OH4 Jump to address 1goo H

Registe Addre ssing Mocde- *) source and destinotion operand should


beregiste.
Exp MOV A, B move Hhe data of registes B into re. A
ADD yego B wi he Cootent
8 Add Hhe Content of
ofreg A and place he esult in reg. A

Direct Addressing Mode-*)In Hhis mode address of Hhe data dill


be specify sihin the istuchon
l6oH
Exp LDA 160OH lcad he Content of memoTy locaton
into occumulator

Hhe data of address 35H into Acc


IN 35H Copy

In his addre ssing mode , data s


Indirect Addvessing Mode-
available Insíde he
memoTy and h e addr.

Specified by a registepir C HL, BC oT DE).


of he memory coill be
of memoTy locaHion
Mov 6, M move Hhe dotq
Exp
pointed by H-paiv Into reg. B.
location
LDAX 3 move Hhe dato of memoty
poin ted by BC reg paiY 10to acCumulalar.
Implied Implicit Addressing Mede-i No operond specif'ed tö He
inshsuction
I n most of he inssuchon, default operand is Accumulator
accumuaov
Exp CMA Compi ment bitsof
RRC Rotate qcumulator bjts Tlght by one
positioy
INSTRUCTLONS OF 8o85
Instruction s a
binavy pottesn desined by Hhe
he manufoetore of
paticular mieroprou ssov to
pesforma speeifie taok Bo85
has F4 nstsuchons Colled nstruchion set
, he ohole
set of 8o05 miesopsocessor Con be divided nstruc hon
toto 3
general,
Sections
) Infosmation movement Instsucton-
C Data movement) hese tnstruchons
ase fusther divited
into 2 Toups
o) Groupo
b) Group 1

InfoTmatio moititat ion Inshsuchon (Group


Control Instruchion s (voup Group 2)
2)
3)
Infovmation move ment
Instructiom S
oup O
- Instruchions t Hhis allows Hhe
group follousin
peration
a) Immediate Data move met
b)Inerement] decrement ot
c)Loading seg'ste
d)
stosing. of Tegi'sters
Shifting and Complimenting of Contents
of accumulato
Group 1 -% This is the
lorgest
w 9soup ot tnstruetion and
fs Called MOV gToup hese qre Used
to move
he nfosmation fsom
he
SoUce to destination
BoUTCe and
destination may
Ilo devices and
memoTy
be
T*qiste
Byte brgahi sation for aroup O- Byte Oraanisalion tetls
usheF houo Hhe 1shsuch'on
byls are toxmed. what s
Ishruchon. The
he81mifjcance of each bit t the
Byte Ovanisahon is also Crillerd or knon ag3
devatjon op-Code
- - o o 0 o
I
o -
O o o -o
m

D. 3 I mo o S

A
0
qs MovI s Gro up ó istsuchon so Ond will be
D7 Dc Oo
Register B d'cates Ds De Pae 000
as Hhe immidiate
So we
operation ís parfprmed o9 shgle *gister
hove oa D Do
So
130
op- cods wil1 beeome
D, De Ds P4 D3 DaD Do
6H
O6H ndu'cades he op- code for 1istsuchon MVI G, 91H
Exp INX B3
as
as
TncTemant register paiv B-c
Incre ment
belongs to gvoop 8 so Ce have D De = 00
B-c egister pair codo= oo
1erement opeation i's to be
pertosmeel on
regisien pai
B o11
D Dc Ds P4 P3 D2 D Do
o O1 1 O3 H

T is added by defaut
Reg'ster pair Codo

f coe hove LNX H Hhen

10 C. O 11 23H
defoutt addihion of o dusingNX
* Default valu may be O or 1 Some tnshruchems it s
and i some it i's 1' Hhese valves avre cho sen bp defeut
Tnstruchons of Goup d-
MVI moveimmid iate LDA Lcad RLC 1Rotation of
LxI Load immidiate STA Stove
RRC Accumulatoy
INR Inesement DAD add Re airto HL. datg
DAA
RAL
INX finCYemert Reg Raiv
DCR deee ment CMA Complimat A RARJ
STC set cavY
DCX decrement [Link]
CMe
LDAX Compliment Cavry
.Load from RaPoi NoP mo
operahon
STAX Stove som [Link] RIM
LHLD Load from Reeieve or Send Seviál data through
HLpai SIM SID and soD pió
Byte Ovgonisation of Goup 1 Insruchons -2 This 1roup
roup 13
13 the
he
azest aroup ohich
moves 1itormaton from one souTce to oHhe SouTce or destinabion.
this is also
Toup called MOv qroup.
D Ds Ds Dy 3 D2 Da Do

R2 R1 Ro S2 L S So

code fovN Sending Rzistes


Recievin
Group1 Registe
R2 RRo and S2s So ave Hhe Yecieving ad
Sendiog TegisteYs.
Ra Ra Ro
(s2S1 So) Regi'ste Register Paiv Code
o o o
B B-C
C DE 01
o1o D HL 1 O
11
1 O
E sp 11
H
1 O1 L
11 o
M (memory)
11
A
P CAccumu latov)

Exp MOV B,C


Hhis nstruchior moves the binory data tsom registea c +
Reg'sdea8.

41 H

Group 1 Code fo
Code fov
Sending Roale c
Reeiering Register '8'
Exp MOV M, D

+2 H
Group 1 Codefov Code for D
M
12
6yte Organisatio fov Group'2 Instruetions - This group is called
arithmetic and
logical 3roup comparilon of 2
registerc avve also one by
his qroup intsuchons

D Ds D Dy D3 Da D Do
1 o Aa AAo
S2| S So
Code fov ALU operaton
roup 2
Reiste tofornation

S2 S1 So are Hhe
registers hich ere source of data .
he
Code foY ifferet Taisiers are same as
1 qroup 1
Aa A Ao
ADDITI ON CADD)
O 1 Add coih camy
CADc)
Subshachon
CSUB)
Subsrachon cih borow ( SBB)
o8ta AND
Exclosive -
OR CxOR)
Logtad OR
1 1
Compone
Exp> ADD B

4oo ooololol 80 H

Code for Code fov


addition Register B
Io Hhis
instruchon souTce 1s defined asB but setond
not
is not depned. when 2 opeond
ope
Operand will be Accumulatorrand
a not
aefned , Hhe defoult
Hhis (A)
1stTuction oill
Exp perfotm(AtB).
CMP H

O1 oo BC H
code tor
Codeos
Compore eisr H
o 0 0 o 3
o o
O
O

3 HH .

5 (
Exp TNZ Address -e. JNZ 2000 H
he instruction says ump t rot zevo to oddress 2000H.

1 o olo|oLo] = c2 H

conduho naumnp
Conditon 1s
tnot Zero
Exp CALL 2440 H

1 o 4 o1 co H

Uncondubonal
CALL

*)In roup 3 nstsuctons , Some are designed by he tmanu-


factures qnd here: is no Concept behind Code foSmation
AIHhough
AlHhouh hey are fosmed using 80me logic but as fas as
lerel of
his coUTse s Concerne Hhrs do es not maHe
alot at all for Some nssuehons
InstructIdn Fotmat 15
--X-

Ay lnstruetion or data wovd s used to


Convey infov mati'on
ot operation to be
perform ed ( Known as op-Code) n d h e -
address of memo
sY locetions oT rgisters Containing he data (
Known as
ope rond )on ohich operatibn is to be
perfo1 med.
'nstruction

op Code operand
here are 3ty pes ot tnstru chons cwe Use o micopsoco SsoY-
) One
byte iistruebon - In
histype ot nstsuchon inpimaa-
tioo about Hhe
is contained i a
ope rabon and locabon
Single byte.
MOV A, C
1n'struetion haa code 79H.
noco
9H s an8bit
(one byte)
nation abut operabon C mov) andformat ohich have
ation iioY-
locabon C C to A
(11) To byte Register).
iistruction- he two byte instrucho n have
nstruchio n have
2
field3 -a) ap code field
b) Data |Address field
Exp MVI A, 50H
Hhe above
iistTuchon have2 opcode 3E H hich tells
US hat mmidiate data has o be movtd
A h e instruchon also R to regI'steL
so he specities he data 50H
nstsuchon has 2 bytes 3EH, and
(ii) Three byte 1istruetion - 50H)
opcode dafa

see byte nsruction also have 2


trelds- a) opcodu freld C by te) ond
b) Data Address) field
Exp CALL 2000H
Hhs hstruchon hab opcod! c2 H cohich speides he CALL
OpaTation rest two byis are used by address held
byte a = 20 H
byte 3= 00 H
2056 H STA 2oSo H
xp LXT, ete.
6

he Complere fo mat of hstuchon durng pTogramming s


( Label Operatron perand C Command)

Hhe frelds bracketp are optiona l e hey Can be ose


or can not be used dependa upoy uses
Each field Seperated by a spacs
cwih other field.
Commandb a r e Hhe field ahich Use Oses to
Specity e
operaf io execuad by hshuchon. a semi-colm must be
Used Fo spe c f* Command
Label - he Label
w gtves a
speitic name to ao nshucba
and Hhis nomne Can become he operdd for otHer
rnstrucHons.
Exp LOcation abel OPCode OPer@ndd
10 LXI H, FC22(H)
20 MVI C, 0s()
30 LOOP MOV M,A
INX H
50
DCR C

( his progra LOOP Label is osed ttoe cant to

execute he 3 1stsuchns belouo MVI hen e


ConJust
Call Hhe label e
CALL LoOP
by his hstruchon
byhis he proqrom automob cally stovt execu'-

tin
ting fom suehn MOV MA and so
on
Rules tor label-
) Label must be t o 6 charaeter long
*)9t contains letfers from A to z and di'aits from O fo 9.
) No speciol choracters con be used.
muot oith a ete
be start
Registers CA, 3,c, O, etc) and operabon codLs ( ADD
Mov etc) Can bot be vsed as lasel
k)One Space & lelt betoeen Hhe 1abel and op code

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