By:

Dr. Anil Swarnkar Assistant Professor Department of Electrical Engineering, MNIT, Jaipur
E-mail id: [email protected] Mobile: 98292-88581

What is Microprocessor

VLSI technology of ICs made it possible to design the complete circuit of ALU (Arithmetic Logic Unit) and CU (Control Unit) within a single chip, which comprises the main processing part, called Central Processing Unit (CPU), of computer system. This chip was named Microprocessor.

Importance of Microprocessors
Microprocessors/microcontrollers are not used only in computer systems but may be used in many control applications and devices used in our daily life. For such applications use of advanced microprocessors may be a costly affair, hence smaller processors like 8085/86, or microcontrollers with limited features may be more suitable and cost effective.

Temperature Control System

8085 Microprocessor

Accumulator (A)
It is an 8-bit register, which is the most important part of the arithmetic and logic unit (ALU). It is used to store 8-bit data. The results of arithmetical and logical operations are stored in the accumulator. It is also used to receive data from input port to microprocessor and to send data to output port from microprocessor. It is referred as register A in the program.

General Purpose Registers

Registers B, C, D, E, H and L are 8-bit general-purpose

registers. These registers store 8-bit data temporarily for processing. Some time it is required to store 16-bit data. In 8085 microprocessor, BC, DE and HL are used as register pairs to store 16-bit data. Hence there are 6 general-purpose 8-bit registers and they can be used as 3 pairs as 16-bit registers.

Flag Register (F)

Flag register is also an 8-bit register. Out of 8-bits, five bits are defined as flags to indicate status of the accumulator (with some exceptions), hence it is also called status register. Flags are flip-flops, which can be set or reset. After any arithmetical/logical operation some or all flags are modified according to the result of operation. Flag register, showing the bit position reserved for various flags

Program Counter (PC)

It is a 16-bit register. It is a memory pointer. It stores the memory address of the next byte of the program is to be executed

Stack Pointer (SP)

It is also a 16-bit register and a memory pointer similar to Program Counter. It holds the memory address of the top of the stack.

Bus Organisation
There are three sets of busses in 8085microprocessor. Address bus, Data bus and Control bus

Basic Operations of 8085-microprocessor

Opcode Fetch: Reading and decoding operation code

of an instruction. Memory Read: Reading data from memory. Memory Write: Writing data into memory. I/O Read: Accepting data from Input Port. I/O Write: Sending data to Output Port.

Memory Read Operation

Pins and Signals

Higher Order Address Bus
Multiplexed Address/data Bus Control signals

Status signals
Power supply and clock frequency Interrupt signals

Other externally initiated signals

Serial Input/Output ports

Pins and Signals of 8085-microprocessor

Assembly Language Instructions

An instruction is a binary pattern, which when applied

to the microprocessor digital circuit (architecture) - a specific task is performed. The entire group of instructions of particular microprocessor is called its instruction set. In 8085microprocessor each instruction code is of 8-bits (1 byte), hence there may 28 (=256) different binary patterns; therefore total 256 instructions in its instruction set.

Classification of Instructions
Data copy operations
Input/Output operations Arithmetic operations Logical operations Branch operations Machine control operations Stack Operations

Data Copy Operations

These instructions are used to copy data
From one register to another register 8/16-bit data directly from the instruction to any

register Data from any register to memory Data from memory to any register

MOV (Move) instruction

Copies the contents of the source into destination.
MOV destination, source
Format 1: MOV Rd, Rs From one register to another register, i.e., Rd Rs

Example: MOV B, C

Format 2: MOV M, R From any register to memory. Memory address is specified by the contents of HL pair, i.e. [HL] R Example: MOV M, D

Format 3: MOV R, M From memory to any register, i.e., R [HL] Example: MOV B, M

MVI (Move Immediate) instruction

This instruction is used to copy 8-bit data specified in the instruction is

directly into the register (R) or Memory location specified by HL pair. Format 1: MVI R, 8-bit data Format 2: MVI M, 8-bit data
Example: MVI A, 21H

LXI (Load Register-pair Immediate) instruction

This instruction is used to copy 16-bit data specified in the instruction is

directly into the register pair (Rp). Format: LXI Rp, 16-bit data
Example: LXI B, 3E21H

LDAX (Load Accumulator Indirect) Instruction

This instruction is used to copy data from memory location pointed by

register pair (only BC or DE pair) to the Accumulator (A). HL pair cannot be used in this instruction. Format: LDAX Rp
A [Rp]
Example: LDAX B

Other Data Copy Instructions

STAX (Store Accumulator Indirect) STAX Rp LDA (Load Accumulator Direct) LDA 16-bit address STA (Store Accumulator Direct) STA 16-bit address

Other Data Copy Instructions

LHLD (Load HL pair Direct) instruction LHLD 16-bit address This instruction is used to load HL register pair by data stored at memory address specified in the instruction and the next address. SHLD (Store HL pair Direct) instruction SHLD 16-bit address This instruction is used to store the contents of HL register pair to memory address specified in the instruction and the next address.

 XCHG (Exchange) instruction XCHG HL DE

INPUT/OUTPUT OPERATIONS
IN (Input) instruction IN 8-bit port address OUT (output) instruction OUT 8-bit port address

ARITHMETIC OPERATIONS
ADD instruction ADD R AA+R ADD M A A + [HL] ADI (Add Immediate) instruction ADI 8-bit data A A + (8-bit data) ADC (Add with Carry) instruction ADC R A A + R + CY ADC M A A + [HL] + CY ACI (Add Immediate with Carry) instruction ACI 8-bit data DAD (Double Add) instruction DAD Rp HL HL + Rp
Flags are modified according to the result.

Ex.: Execution of ADD B instruction

ARITHMETIC OPERATIONS (continued ...)

SUB (Subtract) instruction
SUB R
SUB M SUI 8-bit data SBB R SBB M

AAR A A [HL]
A A 8-bit data A A (R + Borrow) A A ([HL] + Borrow) A A (data + Borrow)

SUI (Subtract Immediate) instruction SBB (Subtract with Borrow) instruction

SBI 8-bit data

All Flags are modified according to the result.

ARITHMETIC OPERATIONS (continued ...)

INR (Increment) instruction
INR R
INR M

RR+1 [HL] [HL] + 1

RR1 [HL] [HL] 1 Rp Rp + 1 Rp Rp 1

DCR (Decrement) Instruction

DCR R

DCR M

INX (Increment Register Pair) instruction

INX Rp

DCX (Decrement register pair) instruction

DCX Rp

Flags?

LOGICAL OPERATIONS
ANA (Logical AND with Accumulator) instruction

AA&R ANA M A A & [HL] ANI (AND Immediate with Accumulator) instruction ANI 8-bit data A A & (8-bit data)
ANA R

S, Z, and P are modified according to the result. CY is always reset. AC is always set.

LOGICAL OPERATIONS (continued...)

ORA (Logical OR with Accumulator) instruction

AA|R ORA M A A | [HL] ORI (OR Immediate with Accumulator) instruction ORI 8-bit data
ORA R

S, Z, and P are modified according to the result. CY and AC are always reset.

LOGICAL OPERATIONS (continued...)

XRA (Exclusive-OR with Accumulator) instruction
XRA R XRA M XRI (Exclusive-OR Immediate with Accumulator)

instruction XRI 8-bit data

S, Z, and P are modified according to the result. CY and AC are always reset

LOGICAL OPERATIONS (continued...)

CMA (Complement Accumulator) instruction
Format: CMA Complements the contents of the Accumulator (A). i.e., In the Accumulator all ones are converted to zeros and all zeros are converted to ones.

A A

LOGICAL OPERATIONS (continued...)

CMP (Complement) instruction CMP R The contents of the register R are compared with the

contents of the Accumulator (A). Actually, the comparison is done by subtracting the contents of the register R from the contents of the Accumulator (A). The contents of the register R and the Accumulator do not change. All flags are modified similar to subtraction.

Compare Instruction
Although, all flags are modified, but the conclusion can be

made only by CY and Z flag, as shown below:

If A > R; CY and Z flags are reset. If A = R; Z flag is set and CY flag is reset. If A < R; CY is set and Z flag is reset.

More compare instructions Compare A with the contents of memory

CMP M
CPI (Compare Immediate) instruction

CPI 8-bit data

Logical Instructions (continued...)

RAL (Rotate Accumulator Left through Carry) instruction Format: RAL

Logical Instructions (continued...)

RLC (Rotate Accumulator Left) instruction

Format:

RLC

Logical Instructions (continued...)

RAR (Rotate Accumulator Right through Carry)

instruction Format: RAR

Logical Instructions (continued...)

RRC (Rotate Accumulator Right) instruction

Format:

RRC

BRANCH OPERATIONS
Jump instructions
Unconditional Jump instruction Format: JMP 16-bit memory address
Conditional Jumps instructions JC (Jump on Carry) JNC (Jump on No Carry) JZ (Jump on Zero) JNZ (Jump on No Zero) JP (Jump on Plus) JM (Jump on Minus) JPE (Jump on Parity Even) JPO (Jump on Parity Odd)

BRANCH OPERATIONS (continued..)

Unconditional Call instruction Format: CALL 16-bit memory address Conditional Call Instructions

CC (Call on Carry) CNC (Call on No Carry) CZ (Call on Zero) CNZ (Call on No Zero) CP (Call on Plus) CM (Call on Minus) CPE (Call on Parity Even) CPO (Call on Parity Odd)

BRANCH OPERATIONS (continued..)

Unconditional Return Instruction

Format:

RET

Conditional Return Instructions

RC (Return on Carry) RNC (Return on No Carry) RZ (Return on Zero) RNZ (Return on No Zero) RP (Return on Plus) RM (Return on Minus) RPE (Return on Parity Even) RPO (Return on Parity Odd)

BRANCH OPERATIONS (continued..) RST (Restart) instructions

Format:

RST

Where n may be 0-7.

Restart Instructions RST 0 RST 1 RST 2 RST 3 RST 4 RST 5 RST 6 RST 7 Called Locations 0000H 0008H 0010H 0018H 0020H 0028H 0030H 0038H

PCHL (Load PC with HL) instruction Format: PCHL This is a special instruction, which copies the contents of HL register pair into the Program Counter (PC) register. Hence the program execution is transferred to the memory location specified by HL register pair.

MACHINE CONTROL INSTRUCTIONS

HLT (Halt) instruction
Format:

HLT NOP STC CMC

NOP (No Operation) instruction

Format:

STC (Set Carry) instruction

Format:

CMC (Complement Carry) instruction

Format:

EI, DI, SIM and RIM insructions

STACK OPERATIONS
Initialise Stack Pointer
LXI SP, 16 bit

PUSH instruction
PUSH Rp PUSH PSW

POP instruction
POP Rp POP PSW

XTHL (Exchange Top of the stack with HL) instruction

L <-> [SP]; H <-> [SP+1]

SPHL (Load Stack Pointer with HL)

SP <- HL

INSTRUCTION SIZE
According to the size 8085 instructions are classified into following three groups:
One Byte Instructions

Two Byte Instructions

Three Byte Instructions

OPCODE FORMAT
The instructions, which use registers or register pairs as their operands, have following codes somewhere in their opcode byte.
Registers B C D E
H L A M (memory)

Code 000 001 010 011

100 101 111 110

Register Pairs BC DE HL AF (PSW) or SP

Codes 00 01 10 11

MOV instruction
Opcode format of MOV instruction is as follows:

MOV

Rd,

Rs

Example: opcode of MOV B, C is

0 1 0 0 0 0 0 1 = 41H

Opcodes of Various MOV instructions

B C D E H L M A B 40 48 50 58 60 68 70 78 C 41 49 51 59 61 69 71 79

Source Registers D E H 42 43 44 4A 4B 4C 52 53 54 5A 5B 5C 62 63 64 6A 6B 6C 72 73 74 7A 7B 7C

L 45 4D 55 5D 65 6D 75 7D

M 46 4E 56 5E 66 6E 7E

A 47 4F 57 5F 67 6F 77 7F

Destination Registers

Opcode format of ADD instruction: 1 0 0 0 0 R R R

Opcode format of SUB instruction: 1 0 0 1 0 R R R

ADDRESSING MODES
Register Addressing MOV C, B Immediate Addressing MVI A, 33H Direct Addressing STA 3050H Indirect Addressing MOV B, M

Assembly Language Programming

Write an assembly language program to add two 8-bit numbers stored in register A and register B. Display the result at output port 01H.
Memory Address 2000H 2001H 2002H 2003H 2004H 2005H Mnemonics MVI A, 20H Hex Code 3EH 20H 06H 30H 80H D3H Remarks Store 20H in register A.

MVI B, 30H

Store 30H in register B.

ADD B OUT 01H HLT

2006H 2007H

01H 76H

Add contents of register B with A and store the result in A. Send the contents of A to output port 01H. Stop the program.

Write an assembly language program to add two 8-bit numbers stored in register A and register B. Store the result at the memory location 3000H using STA instruction.
Memory Address 2000H 2001H 2002H 2003H 2004H Mnemonics Hex Code 3EH 20H 06H 30H 80H
Remarks

MVI A, 20H MVI B, 30H ADD B

Store 20H in register A. Store 30H in register B. Add contents of register B with A and store the result in A. Store the contents of A (i.e. result) at the memory location 3000H. Stop the program.

2005H 2006H 2007H 2008H

STA 3000H

HLT

32H 00H 30H 76H

What is Masking? Assume that 37H is stored in the Accumulator. Mask high-order 4-bits of the given data and display the result on the output port 02H.
Memory Address Mnemonics Hex Code
Remarks

2000H
2001H 2002H 2003H

MVI A, 37H
ANI 0FH

3EH
37H E6H 0FH

Store 37H in register A.

AND the contents of A with 0FH. (Masking high-order 4-bits)

2004H
2005H 2006H

OUT 02H
HLT

D3H
02H 76H

Display the contents of A on output port 02H.

Stop the program.

Add two 8-bit numbers stored in memory location 2050H and 2051H and store the result at memory location 2052H.
Memory Address 2000H 2001H 2002H 2003H 2004H Mnemonics LXI H, 2050H Hex Code Remarks 21H 50H 20H 7EH 23H Load memory address of the first number in HL register pair.

MOV A, M INX H

2005H 2006H 2007H 2008H 2009H

ADD M STA 2052H

HLT

86H 32H 52H 20H 76H

Copy first number into A. Increment the contents of HL pair. HL pair now pointing to second number. Add first & second numbers. Store the result at memory location 2052H.
Stop the program.

Write an assembly language program to find the largest of three numbers stored in the memory location 2050H, 2051H and 2052H, assuming that all three numbers are unequal.
START

Read A, B, C

Yes (CY=0)

A>B?

No (CY=1)

A>C? Yes (CY=0)

No (CY=1)

No (CY=1)

B>C? Yes (CY=0)

Display A

Display C

Display B

STOP

Write an assembly language program to find the largest of the given list of n data bytes stored in the memory starting from memory location 2071H. Count of data bytes in the list (i.e. n) is stored at memory location 2070H.
START Initialise Memory Pointer Initialise Counter C A=0

Read number from the list store in B

A>B?

No Store larger number in A

Yes No

Decrement Counter C

C=0?

Yes Display Highest number

STOP

Memory Address 2000H

Label

Mnemonics LXI H, 2070H

Hex Code 21H

Remarks Initialise the HL register pair with the memory address 2070H of the count.

2001H 2002H 2003H 2004H 2005H 2006H 2007H 2008H 2009H 200AH 200BH 200CH SKIP: LOOP:

MOV C, M XRA A INX H MOV B, M CMP B JNC SKIP

70H 20H 4EH AFH 23H 46H B8H D2H 0CH 20H 78H 23H

Copy count from memory to register C. Clear the Accumulator, which will store the largest number. Increment memory pointer to address 2071H, which is the address of the first number. Copy number stored at address pointed by HL. Compare A with B. All flags are modified. If Carry flag is not set (B<A) then goto memory location 200CH.

MOV A, B INX H

If B>A. Store larger number in A. Increment memory pointer to the address of the next number. Decrement the counter. Repeat the process from location 2006H if counter is not zero.

200DH
200EH 200FH 2010H 2011H 2012H 2013H

DCR C
JNZ LOOP

0DH
C2H 06H 20H D3H 01H 76H

OUT 01H

HLT

When counter reaches zero. Loop is terminated. A contains the largest number, which is displayed at Port 01H. Stop the program.

Write an assembly language program to add the given list of n data bytes stored in the memory starting from memory location 3000H. Store the 8-bit sum in the memory location 3050H. Where n may be any number but for this case choose n=10.
Memory Label Address 2000H Mnemonics LXI H, 3000H Hex Code 21H
Remarks

Store the starting address of the list of data bytes in HL register pair.

2001H 2002H 2003H

2004H 2005H 2006H 2007H 2008H 2009H 200AH 200BH 200CH 200DH 200EH 200FH LOOP:

MVI C, 0AH

00H 30H 0EH

0AH AFH 86H 23H 0DH C2H 06H 20H 32H 50H 30H 76H

Initialise the counter with 0AH (= 10 in decimal).

XRA A ADD M INX H DCR C JNZ LOOP

Clear Accumulator. Add the data stored at memory location pointed by HL pair with A. Increment the memory pointer. Now, pointing to the next number. Decrement the counter. Repeat the process, until the conter is zero.

STA 3050H

Store the sum (available in A) at memory location 3050H.

HLT

Stop the program.

Write an assembly language program to add the given list of n data bytes stored in the memory starting from memory location 3050H. Store the 16bit sum in the memory location 3070H (lower byte) and 3071H (higher byte). Where n may be any number but for this case choose n=25.
Memory Address 2000H 2001H 2002H 2003H 2004H 2005H 2006H 2007H 2008H 2009H 200AH 200BH 200CH 200DH 200EH 200FH 2010H 2011H 2012H 2013H 2014H 2015H 2016H 2017H 2018H Label Mnemonics LXI H, 3050H Hex Code 21H 50H 30H 0EH 19H AFH 47H 86H D2H 0CH 20H 04H 23H 0DH C2H 07H 20H 32H 70H 30H 78H 32H 71H 30H 76H Remarks Store the starting address of the list of data bytes in HL register pair.

MVI C, 19H

Initialise the counter with 19H (= 25 in decimal).

XRA A MOV B, A LOOP: ADD M JNC SKIP

Clear the Accumulator. (A=00H) Clear the register B. (B=00H). Add the data stored at memory location pointed by HL pair with A. If Carry flags is not set, goto memory location 200CH.

SKIP:

INR B INX H DCR C JNZ LOOP

If Carry flag is set, B is incremented by one. Increment the memory pointer. Now, pointing to the next number. Decrement the counter. Repeat the process, until the conter is zero.

STA 3070H

Store the low-order byte of the sum (available in A) at memory location 3070H.

MOV A, B STA 3071H

Copy high-order byte of the sum to A. Store the high-order byte of the sum at memory location 3071H.

HLT

Stop the program.

Write an assembly language program to add the set of data bytes stored in the memory starting form 2050H. The end of data string is indicated by 00H. Result may be larger than FFH. Display the sum at port 1 and port 2.
Memory Address 2000H 2001H 2002H 2003H 2004H 2005H 2006H 2007H 2008H 2009H 200AH 200BH 200CH 200DH 200EH 200FH 2010H 2011H 2012H 2013H 2014H 2015H 2016H Label Mnemonics LXI H, 2050H Hex Code 21H 50H 20H AFH 4FH 7EH FEH 00H CAH 15H 20H 81H D2H 10H 20H 14H 4FH 23H C3H 05H 20H 78H D3H Remarks Store the starting address of the list of data bytes in HL register pair.

LOOP:

XRA A MOV C, A MOV A, M CPI 00H JZ DISPLAY

Clear the Accumulator. (A=00H) Clear the register C. (C=00H). Read first number in the Accumulator. Check whether the number is 00H or not. If it is 00H then goto 2015H to display the sum.

ADD C JNC SKIP

Otherwise Add the number in A with previous sum in C. Result is stored in A. If Carry flags is not set, goto memory location 200CH.

SKIP:

INR B MOV C, A INX H JMP LOOP

If Carry flag is set, B is incremented by one. Save the low-order sum in C. Increment the memory pointer. Now, pointing to the next number. Repeat the process.

DISPLAY:

MOV A, B OUT PORT1 MOV A, C OUT PORT2 HLT

Copy high-order sum in A. Display it at PORT 1. Copy low-order sum in A. Display it at PORT 2. Stop the program.

2017H 2018H 2019H

201AH 201BH

PORT1 79H D3H

PORT2 76H

Write an assembly language program to find the sum of positive numbers only and ignore negative numbers from the list of numbers. The length of the list is in memory location 2050H and the series itself begins from memory location 2051H. Store the 8-bit sum at the memory location 3070H.
Memory Address 2000H 2001H 2002H 2003H 2004H 2005H 2006H 2007H 2008H 2009H 200AH 200BH 200CH 200DH 200EH 200FH 2010H 2011H 2012H 2013H 2014H 2015H 2016H 2017H 2018H REJECT: LOOP: Label Mnemonics LXI H, 2050H Hex Code 21H 50H 20H 4EH AFH 47H 23H 7EH 07H DAH 0EH 20H 0FH 80H 47H 23H 0DH C2H 06H 20H 78H 32H 70H 30H 76H Remarks Initialise Memory Pointer with the memory address of the count.

MOV C, M XRA A MOV B, A INX H MOV A, M RLC JC REJECT

Store Count in C. Clear Accumulator. Clear B, which will be used to store the sum. Increment memory pointer. Copy data stored in the memory location pointed by HL register pair into A. Rotate Accumulator Left to put D7 bit in Carry flag. If Carry flag is set by RLC instruction, i.e., the number in Accumulator was negative. Reject the number and jump to 200EH.

RRC ADD B MOV B, A INX H DCR C JNZ LOOP

If Carry flag is not set. Rotate right the Accumulator to get the original number in the Accumulator. Add the positive number with the previous sum stored in B. Store the new sum in B Increment the memory pointer. Decrement counter. Repeat the process from 2007H, until counter reaches zero.

MOV A, B STA 3070H

Copy the final sum from B to A. Store the contents of A in memory location 3070H.

HLT

Stop the program.

Write an assembly language program to copy a block of data bytes from one memory location starting from 2051H to another section of memory starting from 3051H. Number of bytes to be copied is given at memory location 2050H.
Memory Address 2000H Label Mnemonics LXI H, 2050H Hex Code 21H Remarks Initialise memory pointer with the address of the memory location where the count is stored.

2001H 2002H 2003H

LXI D, 3051H

50H 20H 11H

Store the starting memory address of the destination in DE register pair.

2004H 2005H 2006H 2007H 2008H 2009H 200AH 200BH 200CH 200DH 200EH 200FH 2010H LOOP:

MOV C, M INX H MOV A, M STAX D INX H INX D DCR C JNZ LOOP

51H 30H 4EH 23H 7EH 12H 23H 13H 0DH C2H 08H 20H 76H

Store the count from memory location pointed by HL pair to C. Increment memory pointer; now pointing to starting memory address of the source. Copy source data from the memory location pointed by HL pair into A. Copy data in A to destination memory location pointed by DE pair. Increment source address. Increment destination address. Decrement counter. Repeat the process from 2008H, until counter reaches zero.

HLT

Stop the program.

Write an assembly language program to exchange a block of data bytes stored in the memory starting from 2051H with a block of data bytes stored at another section of memory starting from 3051H. Number of bytes to be exchanged is given at memory location 2050H.
Memory Address 2000H Label Mnemonics LXI H, 2050H Hex Code 21H Remarks Initialise memory pointer with the address of the memory location where the count is stored.

2001H 2002H 2003H

LXI D, 3051H

50H 20H 11H

Store the starting memory address of the destination in DE register pair.

2004H 2005H 2006H 2007H 2008H 2009H 200AH 200BH 200CH 200DH LOOP:

MOV C, M INX H MOV A, M MOV B, A LDAX D MOV M, A MOV A, B STAX D

51H 30H 4EH 23H 7EH 47H 1AH 77H 78H 12D

Store the count from memory location pointed by HL pair to C. Increment memory pointer; now pointing to starting memory address of the source. Read source data into A. Save it in B. Read destination data in A. Store destination data at source location pointed by HL pair. Get source data in A. Store source data at destination location pointed by DE pair.

200EH 200FH 2010H 2011H

2012H 2013H 2014H

INX H INX D DCR C JNZ LOOP

23H 13H 0DH C2H

08H 20H 76H

Increment source pointer. Increment destination pointer. Decrement counter. Repeat the process from 2009H, until counter reaches zero.

HLT

Stop the program.

Write an assembly language program for shifting of block of data from memory locations 3000H 3009H to new memory locations 3050H 3059H in reverse order. i.e., data from 3000H will be moved to 3059H and so on.
Memory Address 2000H Label Mnemonics Hex Code 21H Remarks

LXI H, 3000H

Initialise the source pointer (i.e., HL pair) with the starting address of the source data

2001H 2002H 2003H

LXI D, 3059H

00H 30H 11H

Initialise destination pointer (i.e., DE pair) with the last address of the destination

2004H 2005H 2006H

MVI C, 0AH

59H 30H 0EH

Initialise the counter with 0AH (= 10 in decimal) as given in the question.

2007H 2008H 2009H 200AH 200BH 200CH 200DH 200EH 200FH 2010H

LOOP:

MOV A, M STAX D INX H DCX D DCR C JNZ LOOP

0AH 7EH 12H 23H 1BH 0DH C2H 08H 20H 76H

Read the source data from the memory location pointed by HL pair. Store at destination address pointed by DE pair. Increment source pointer. Decrement destination pointer. Decrement counter. Repeat the process from 2008H, until counter reaches zero.

HLT

Stop the program.

Write an 8085 assembly program to check if the Input string of characters (in ASCII codes) stored at location 2050H to 205FH is equal to a string stored at location 2100H to 210FH (in ASCII codes). If two strings are same, display 1 at Port 1, otherwise 0.
Memory Address 2000H Label Mnemonics LXI D, 2050H Hex Code 11H Remarks Initialise DE pair with the starting address of first data set.

2001H 2002H 2003H

2004H 2005H 2006H 2007H 2008H 2009H 200AH 200BH 200CH 200DH 200EH 200FH 2010H 2011H 2012H 2013H 2014H 2015H 2016H 2017H 2018H 2019H

LXI H, 2100H

50H 20H 21H

00H 21H 0EH 10H 06H 00H 1AH BEH C2H 16H 20H 23H 13H 0DH C2H 09H 20H 3EH 01H 78H D3H 01H 76H

Initialise HL pair with the starting address of second data set.

MVI C, 10H

Initialise counter with 10H (= 16 in decimal).

MVI B, 00H

Initialise B with 00H.

LOOP:

LDAX D CMP M JNZ EXIT

Read data of the first set from the memory location pointed by DE pair into A. Compare data in A with respective data of the second set pointed by HL pair. If Zero flag is not set, i.e., data does not match then jump to 2017H, where 00H from B is copied to A and displayed.

INX H INX D DCR C JNZ LOOP

Otherwise increment HL pair. Increment DE pair. Decrement counter. Repeat the process from 200AH, until counter reaches zero.

MVI B, 01H

Store 01 in B, if data set match is successful.

EXIT:

MOV A, B OUT 01H HLT

Copy contents of B in A. Display the contents to A. Stop the program.

Write an assembly language program to search a data byte, stored at memory location 3000H in the list of 100 data bytes stored in the memory starting from location 3001H. If the data byte is found, display 01H and if not found display 00H, on the output port 82H.
Memory Address 2000H 2001H 2002H 2003H 2004H 2005H 2006H 2007H 2008H 2009H 200AH 200BH 200CH 200DH 200EH 200FH 2010H 2011H 2012H 2013H 2014H Label Mnemonics LXI H, 3000H Hex Code 21H 00H 30H 7EH 06H 01H 0EH 64H 23H BEH CAH 14H 20H 23H 0DH C2H 09H 20H 06H 00H 78H
Remarks

HL pair is initialised with the memory address 3000H, where the data byte to be searched is stored.

MOV A, M MVI B, 01H

Copy the data byte to be searched into A. Store 01H in B. Register B is used to store the value to be displayed.

MVI C, 64H

Initialise the counter with 64H (=100 in decimal) as given in the question. Increment the memory pointer; now pointing to first data in the list. Compare the data byte to be searched (in A) with data in the list at memory location pointed by HL pair. If zero flag is set, i.e., match is found, then stop the comparison and jump to memory location 2014H. Otherwise increment HL pair. Decrement counter Repeat the process from 2009H, until counter reaches zero.

LOOP:

INX H CMP M JZ END

INX H DCR C JNZ LOOP

MVI B, 00H

Store 00H in B.

END:

MOV A, B

Copy the contents of B in A.

2015H
2016H 2017H

OUT 82H
HLT

D3H
82H 76H

Display the contents of A.

Stop the program.

Write a program to multiply two 8-bit numbers. Multiplicand is extended to 16-bit and stored in the two consecutive memory locations 2050H and 2051H. The multiplier is stored at 2052H. Store the 16-bit product at two consecutive memory locations 2053H and 2054H.
Memory Address 2000H 2001H 2002H 2003H 2004H Label Mnemonics LHLD 2050H Hex Code 2AH 50H 20H EBH 3AH Remarks Load HL pair with 16-bit multiplicand stored at 2050H and 2051H.

XCHG LDA 2052H

Exchange the contents of HL with DE pair. Multiplicand is now in DE pair. Load 8-bit multiplier into Accumulator.

2005H 2006H 2007H

LXI H, 0000H

52H 20H 21H

Copy 0000H in HL pair.

2008H 2009H 200AH 200BH 200CH 200DH 200EH 200FH 2010H 2011H 2012H 2013H 2014H 2015H 2016H 2017H 2018H 2019H

MVI C, 08H

00H 00H 0EH 08H 29H 17H D2H 12H 20H 19H 0DH C2H 0CH 20H 22H 53H 20H 76H

Initialise counter with 08H.

LOOP:

DAD H RAL JNC SKIP

Add HL with HL to shift the contents of HL left by one position. Shift the contents of Accumulator left by one position. If Carry flag is not set skip following DAD D instruction.

SKIP:

DAD D DCR C
JNZ LOOP

Add DE with HL. Store result in HL. Decrement counter.

Repeat the process from 200CH, until counter reaches zero.

SHLD 2053H

Store result in HL to the memory locations 2053H & 2054H.

HLT

Stop the program.

Write an assembly language program to divide a 16-bit dividend, stored in memory locations 2051H & 2052H, by an 8-bit divisor, stored in memory location 2053H. After division the quotient must be stored in memory location 2054H and remainder in memory location 2055H.
Memory Address 2000H 2001H 2002H 2003H 2004H 2005H 2006H 2007H 2008H 2009H 200AH 200BH 200CH 200DH 200EH 200FH 2010H 2011H 2012H 2013H 2014H 2015H 2016H 2017H 2018H Label Mnemonics LHLD 2051H Hex Code 2AH 51H 20H 3AH 53H 20H 47H 0EH 08H 29H 7CH 90H DAH 0FH 20H 67H 2CH 0DH C2H 09H 20H 22H 54H 20H 76H
Remarks

Load 16-bit dividend in HL register pair from the memory locations 2051H & 2052H

LDA 2053H

Load 8-bit divisor into A from memory location 2053H.

MOV B, A MVI C, 08H

Copy A into B. Initialise Counter with 08H.

LOOP:

DAD H MOV A, H SUB B JC SKIP

Shift Dividend and quotient left by one position. Copy high-order byte of the dividend in A Subtract divisor form high-order byte of the dividend. If high-order byte of the dividend is less than divisor then go to 200FH.

MOV H, A INR L DCR C JNZ LOOP

Otherwise copy high-order into H. Increment the quotient by one. Decrement the count. Repeat the process from 2009H, until counter reaches zero.

SKIP:

SHLD 2054H

Store the result in Hl pair at memory locations 2054H & 2055H

HLT

Stop the program.

Write an assembly language program to perform addition of two Hexadecimal Numbers as given below: 9A5B8938H & 8BC34AD1H
Memory Address 2000H 2001H 2002H 2003H 2004H 2005H 2006H 2007H 2008H 2009H Label Mnemonics LXI H, 3000H Hex Code 21H 00H 30H 11H 50H 30H 0EH 04H AFH 1AH Remarks Load starting address of the first set of bytes in HL register pair.

LXI D, 3051H

Load starting address of the second set of bytes in DE register pair.

MVI C, 04 XRA A LDAX D

Load the counter with 4, as 4 bytes in each number given in the question. Clear the Accumulator and Carry Flag. Load accumulator with the first byte of the second number, stored in the memory location pointed by DE pair. Add Accumulator with the first byte of the first number with carry. Store the result in the memory pointed by the HL pair. Overwriting the first number. Increment the memory pointer of the first number. Increment the memory pointer of the second number. Decrement the counter. Repeat the process from 2009H, until counter reaches zero. Stop the program.

LOOP:

200AH 200BH 200CH 200DH 200EH 200FH 2010H 2011H 2012H

ADC M MOV M, A INX H INX D DCR C JNC LOOP

8EH 77H 23H 13H 0DH C2H 09H 20H 76H

HLT

Write an assembly language program to sort the list of bytes, in ascending order, stored in the memory starting from 2061H. The count of the bytes in the list is stored at memory location 2060H.
Memory Address 2000H
2001H 2002H 2003H 2004H 2005H 2006H 2007H 2008H 2009H 200AH 200BH 200CH 200DH 200EH 200FH 2010H 2011H 2012H 2013H 2014H 2015H 2016H 2017H 2018H 2019H 201AH 201BH 201CH 201DH 201EH CHECK: DOPASS:

Label

Mnemonics
LXI H, 2060H

Hex Code 21H

60H 20H 4EH 0DH 21H 61H 20H 51H 7EH 23H 46H 2BH B8H D2H 15H 20H 70H 23H 77H 2BH 23H 15H C2H 09H 20H 0DH C2H 05H 20H 76H

Remarks
Load the HL pair with the memory address where the count of the list is stored.

MOV C, M DCR C LXI H, 2061H

Store the count in C (counter 1). Decrement Counter 1. Initialise HL pair with the memory address of the first number in the list.

MOV D, C MOV A, M INX H MOV B, M DCX H CMP B JNC NOSWAP

Copy counter 1 into counter 2. Read one number into the accumulator. Increment HL pair pointing to next number in the list. Copy next number in register B. Decrement HL register pair to get the previous address. Compare two adjacent numbers. If later number is smaller, then no swap.

MOV M, B INX H MOV M, A DCX H INX H DCR D JNZ CHECK

Swapping.

NOSWAP:

Decrement counter 2. Repeat process from 2009H, until counter 2 is not zero.

DCR C JNZ DOPASS

Decrement counter 1. Repeat for next pass, until counter 1 is not zero.

HLT

Stop the program.

Stack
Stack is a part of Read/Write memory (RAM) used to store data or binary information temporarily during the execution of the program. The part of the R/W memory, used as a stack, is defined by the programmer. It works on the concept of Last In Fist Out (LIFO).

Stack and Stack Pointer

Microprocessor and R/W Memory are two separate chips. As explained above, Stack is the part of R/W memory.
But the Stack Pointer is a 16-bit register in microprocessor, used to store the memory address of the top of the stack, i.e., pointing to the top location of the stack.

Instructions related to Stack

LXI SP, 16 bit PUSH Rp e.g., PUSH B [SP-1] B; [SP-2] C

PUSH PSW

Instructions related to Stack (conti)

POP Rp

e.g., POP D E [SP]; D [SP+1]

POP PSW XTHL (Exchange Top of the stack with HL)

instruction L <-> [SP]; H<->[SP+1] SPHL instruction SP HL

Subroutine
A subroutine is a sub-program (or set of instructions) to perform a specific task, which is written separately from the main program but may be used once or more than once by the main program.
Subroutine once written may also be used in any program.

Instructions required for using subroutine

CALL 16-bit memory address
RET Conditional Call CC & CNC CZ & CNZ CP & CM CPE & CPO

Conditional Return RC & RNC RZ & RNZ RP & RM RPE & RPO

Difference between CALL & JMP?

Timing & Time Delay

Important Terms T-State One subdivision of the operation performed in one clock period is defined as T-state. These subdivisions are internal states synchronised with the system clock, and each T-state is precisely equal to one clock period. The terms T-state and clock period are often used synonymously.

Machine Cycle Time required to complete one operation of accessing memory, I/O, or acknowledge an external request is defined as Machine cycle or Machine Operation. One machine cycle may have 3 to 6 TStates. Various machine cycles in 8085microprocessor are:

Opcode Fetch Memory Read Memory Write Input/Output Read Input/Output Write Interrupt Acknowledge Halt Hold Reset

Instruction Cycle Time required to complete the execution of an instruction is defined as Instruction Cycle. One instruction cycle consists of 1 to 6 machine cycles in 8085-microprocessor.

Opcode Fetch Machine Cycle

Memory Read Machine Cycle

Memory Write Machine Cycle

I/O Read Machine Cycle

I/O Write Machine Cycle

Time Delay
There are two main techniques for providing timedelay:
Software technique Hardware technique (using Intel 8253/8254)

The disadvantages of Software Tech. are: Not accurate. The time delay depends on the T-states of instructions used. Hence cannot be used in real time applications. Misuse of microprocessor. The microprocessor is busy in simply decrementing the register. Calculation of time-delay is tedious. Hardware technique requires additional hardware, i.e., Intel 8253 or 8254 (Programmable Interval Timer). The only disadvantage of this technique is the additional cost for the extra chip. The advantages are More accurate, hence can be used for real time application. Microprocessor is free to perform other function.

Time Delay Using 8-bit register

Memory Address 2050H 2051H 2052H 2053H 2054H 2055H LOOP: DCR B JNZ LOOP 52H 20H Label Mnemonics MVI B, FFH Hex Code 06H FFH Decrement Register B. Repeat until B reaches zero. 4 10/7 Remarks Load Register B with FFH. T-states 7

If the clock frequency of the system is (f) = 2 MHz The Clock period (T) = 1/f = 1/3 x 10-6 = 0.33 s

Time delay to execute the statement outside loop, i.e., MVI instruction DO= 7 T-states x 0.33 s = 2.31 s Time delay to execute the loop (DL) Time period (T) = 0.33 s
Loop T-states instruction)

= Time period (T) x Loop T-states x Number loaded in the register in decimal

= 4 T-states (for DCR instruction) + 10 T-states (for JNZ

= 14 T-states

Number loaded in the register = FFH = 25510 Hence, DL = 0.33 x 14 x 255 = 1178.1 s 1.2 ms Actual Time delay in loop: DLA = DL (3 T-states x T) = 1178.1 s 3 x 0.33 = 1177.11 s Hence total delay = DO + DLA = 2.31 s + 1177.11 s = 1179.42 s 1.2 ms

Interfacing Memory
Primary Memory ROM RAM (R/W) Secondary Memory Hard Disk CD etc.

Memory Address & Contents

Memory with 8 Registers

Two Memory Chips With Chip Select Pin

Register Addresses
Registers A3 CS Chip 0 R0 R1 R2 R3 R4 R5 R6 R7 Chip 1 R0 R1 R2 R3 R4 R5 0 0 0 0 0 0 0 0 1 1 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 A2 A1 Register Select 0 0 1 1 0 0 1 1 0 0 1 1 0 0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 A0 Address in Hexadecimal =00H =01H =02H =03H =04H =05H =06H =07H =08H =09H =10H =11H =12H =13H

R6
R7

1
1

1
1

1
1

0
1

=14H
=15H

Interfacing of 8085 with a memory chip of 256 registers: addresses rage from 0000H to 00FFH

Interfacing All 64K Locations of Memory

Interfacing I/O Ports

To interact with the real world, microprocessor needs to read data from input devices and send data to output devices. Input/Output devices are connected to microprocessor through Input/Output Ports. There are two ways of data transfer in 8085-microprocessor. One is parallel I/O mode, in which eight bits in a group are transferred from microprocessor to outside world and vice versa. Another is serial I/O mode, in which a single bit is transferred using single data line. In this chapter, we will concentrate only on parallel mode of data transfer. In parallel I/O mode, there are two techniques by which the devices may be interfaced with 8085-microprocessor. Peripheral mapped I/O Memory mapped I/O

Interfacing I/O Ports (Peripheral Mapped)

Interfacing Input Port

Interfacing an Output Port

Absolute & Multiple-Address Decoding

When all 8 address lines are decoded to generate one

unique output pulse IOSEL, as in the above two examples (Ex. 7.3 and Ex. 7.4), in which the Input/Output device is selected only with one particular address, called Absolute Decoding. Such decoding requires more hardware, hence costly. To reduce the hardware cost, only few address lines (not all 8) may be used for decoding. This type decoding is called Multiple-Address Decoding, as the used Input/Output device will have multiple addresses.

Interfacing I/O Ports with Memory Mapped Tech.

Interrupts
Software Interrupts RST0, RST1, ., RST7 Hardware Interrupts TRAP (non-maskable, Vectored) RST7.5, RST6.5, RST5.5 (Maskable, Vectored) INTR (Maskable, non-Vectored)

Software Interrupts (Restart Instructions)

Restart Instructions Hex Code Call Location

RST0 RST1

C7H CFH

0000H 0008H

RST2
RST3 RST4

D7H
DFH E7H

0010H
0018H 0020H

RST5
RST6 RST7

EFH
F7H FFH

0028H
0030H 0038H

Hardware Interrupts
Hardware Interrupts Call Locations Priority Trigger Level

TRAP RST 5.5 RST 6.5 RST 7.5 INTR

0024H 002CH 0034H 003CH Non-vectored

1 4 3 2 5

Level & Edge Level Level Edge Level

Instructions related to Interrupts

EI Enable Interrupts
DI Disable Interrupts SIM Set Interrupt Mask RIM Read Interrupt Mask

SIM Instruction Format

D7 SOD D6 SDE D5 X D4 R7.5 D3 MSE D2 M7.5 D1 M6.5 D0 M5.5

RIM Instruction Format

D7 SID D6 P7.5 D5 P6.5 D4 P5.5 D3 IE D2 M7.5 D1 M6.5 D0 M5.5