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8085 Microprocessor Memory Interfacing

The document discusses interfacing the 8085 microprocessor with memory and I/O devices, emphasizing the importance of input and output for data processing. It outlines the types of interfacing, specifically memory interfacing, and details the structure, requirements, and key components involved in the process. Additionally, it describes the steps for memory interfacing, including address decoding, chip selection, bus connection, and signal generation.

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0% found this document useful (0 votes)
11 views4 pages

8085 Microprocessor Memory Interfacing

The document discusses interfacing the 8085 microprocessor with memory and I/O devices, emphasizing the importance of input and output for data processing. It outlines the types of interfacing, specifically memory interfacing, and details the structure, requirements, and key components involved in the process. Additionally, it describes the steps for memory interfacing, including address decoding, chip selection, bus connection, and signal generation.

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Aps School
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© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Module-5

Interfacing the 8085 microprocessor: A microprocessor is the CPU of a computer. A


microprocessor can perform some operation on a data and give the output. But to perform the
operation we need an input to enter the data and an output to display the results of the operation.
So we are using a keyboard and monitor as Input and output along with the processor.
Microprocessors engineering involves a lot of other concepts and we also interface memory
elements like ROM, EPROM to access the memory.

Interfacing Types: There are two types of interfacing in context of the 8085 Microprocessor.
Memory Interfacing & I/O Interfacing.

1. Memory Interfacing: Memory is an integral part of a microprocessor system, and in this


section, we will discuss how to interface a memory device with the microprocessor. The Memory
Interfacing in 8085 is used to access memory quite frequently to read instruction codes and data
stored in memory. This read/write operations are monitored by control signals. The
microprocessor activates these signals when it wants to read from and write into memory. In the
last section we have already seen the memory read and memory write machine cycles, and status
of the RD, WR and IO/M status signals for read/write operation. In the following section we will
see memory structure and its requirements, concepts in Memory Interfacing in 8085 and
interfacing examples.

Memory Structure and its Requirements: As mentioned earlier, read/write memories consist of
an array of registers, in which each register has unique address. The size of the memory is N x M
as shown in Figure below where N is the number of registers and M is the word length, in
number of bits.

Basic Concepts in Memory Interfacing: For Memory Interfacing in 8085, following important
points are to be kept in mind.
1. Microprocessor 8085 can access 64Kbytes memory since address bus is 16-bit. But it is not
always necessary to use full 64Kbytes address space. The total memory size depends upon the
application.
2. Generally EPROM (or EPROMs) is used as a program memory and RAM (or RAMs) as a
data memory. When both, EPROM and RAM are used, the total address space 64Kbytes is
shared by them.
3. The capacity of program memory and data memory depends on the application.
4. It is not always necessary to select 1 EPROM and 1 RAM. We can have multiple EPROMs
and multiple RAMs as per the requirement of application.
5. We can place EPROM/RAM anywhere in full 64 Kbytes address space. But program memory
(EPROM) should be located from address 0000H since reset address of 8085 microprocessor is
0000H.
6. It is not always necessary to locate EPROM and RAM in consecutive memory For example: If
the mapping of EPROM is from 0000H to OFFFH, it is not must to locate RAM from 1000H.
We can locate it anywhere between 1000H and FFFFH. Where to locate memory component
totally depends on the application.

Key components and signals


 Address Lines: The 8085 has 16 address lines (A0-𝐴15) which allow it to access up to 2 16
(64KB) of memory. The higher-order address lines (A 8–A15) are used for address
decoding to select the correct memory chip, while the lower-order lines (A 0–A7 and
sometimes A8–A13) are used to select a specific memory location within the chip.
 Data Lines: The 8085 has an 8-bit bidirectional data bus (𝐷0–D7) which is connected to
the data pins of the memory chips.
 Control Signals: The 8085 uses control signals to manage data transfer:

 IO/M: This signal indicates whether the operation is for I/O or memory. When it's
low, the operation is for memory.
 RD (Read): This active-low signal is used for memory read operations, enabling
the output of data from the selected memory location.
 WR (Write): This active-low signal is used for memory write operations, enabling
the writing of data to the selected memory location.


Steps for memory interfacing

1. Address Decoding:

 Use the higher-order address lines to generate a chip select (CS) signal for the
specific memory chip.
 This is often done using logic gates (like NAND gates) or decoders (like a 3-to-8
decoder, e.g., 74LS138) to select one of many memory chips based on a specific

 For example, to select a 16KB RAM, address lines 𝐴14 and A15 could be used
address range.

with a NAND gate to generate the chip select signal.


2. Chip Selection:
 Connect the generated chip select signal to the chip select (CS) or output enable
(OE) pin of the memory chip.
 Connect the processor's RD signal to the memory chip's OE pin for reading and
the WR signal to the memory chip's write enable (WE) pin for writing.
3. Bus Connection:
 Connect the memory chip's address pins to the corresponding address lines of the
8085.
 Connect the memory chip's data pins to the 8085's data bus.
4. Signal Generation:
 The 8085's IO/M, RD, and WR signals are combined through logic gates to create
the MEMR (Memory Read) and MEMW (Memory Write) signals, which are then
sent to the memory chip's control pins.

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