Interfacing memory and i/o ports

8086 Microprocessor

Memory
Processor Memory
▪ Registers inside a microcomputer
▪ Store data and results temporarily
▪ No speed disparity
▪ Cost 

Primary or Main Memory

▪ Storage area which can be directly accessed by
Memory microprocessor
▪ Store programs and data prior to execution
Store Programs
▪ Should not have speed disparity with processor 
and Data
Semi Conductor memories using CMOS technology
▪ ROM, EPROM, Static RAM, DRAM

Secondary Memory
▪ Storage media comprising of slow devices such as
magnetic tapes and disks
▪ Hold large data files and programs: Operating
system, compilers, databases, permanent programs
etc.
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8086 Microprocessor

Memory organization in 8086

Memory IC’s : Byte oriented

8086 : 16-bit

Word : Stored by two consecutive memory

locations; for LSB and MSB

Address of word : Address of LSB

Bank 0 : A0 = 0  Even addressed

memory bank

Bank 1 : 𝑩𝑯𝑬 = 0  Odd

addressed memory bank

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8086 Microprocessor

Memory organization in 8086

Operation A0 Data Lines Used

1 Read/ Write byte at an even address 1 0 D7 – D0

2 Read/ Write byte at an odd address 0 1 D15 – D8

3 Read/ Write word at an even address 0 0 D15 – D0

4 Read/ Write word at an odd address 0 1 D15 – D0 in first operation byte from
odd bank is transferred

1 0 D7 – D0 in first operation byte from

odd bank is transferred
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8086 Microprocessor

Memory organization in 8086

Available memory space = EPROM + RAM

Allot equal address space in odd and even bank for

both EPROM and RAM

Can be implemented in two IC’s (one for even and

other for odd) or in multiple IC’s

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8086 Microprocessor

Interfacing SRAM and EPROM

Memory interface  Read from and write in to
a set of semiconductor memory IC chip

EPROM  Read operations

RAM  Read and Write

In order to perform read/ write operations,

Memory access time  read / write time of the

processor

Chip Select (CS) signal has to be generated

Control signals for read / write operations

Allot address for each memory location

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8086 Microprocessor

Interfacing SRAM
Typical Semiconductor IC Chip
and EPROM

No of Memory capacity Range of address

Address pins in hexa
In Decimal In kilo In hexa

20 220= 10,48,576 1024 k = 1M 100000 00000

to
FFFFF

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8086 Microprocessor

Interfacing
Memory map of 8086
SRAM and EPROM
EPROM’s are mapped at FFFFFH
 Facilitate automatic execution of monitor programs and creation of
interrupt vector table

RAM are mapped at the beginning; 00000H is allotted to RAM

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8086 Microprocessor

Interfacing SRAM and EPROM

Monitor Programs
 Programing 8279 for keyboard scanning and display refreshing

 Programming peripheral IC’s 8259, 8257, 8255, 8251, 8254 etc

 Initialization of stack

 Display a message on display (output)

 Initializing interrupt vector table

Note : 8279 Programmable keyboard/ display controller

8257 DMA controller
8259 Programmable interrupt controller
8255 Programmable peripheral interface
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8086 Microprocessor

Interfacing I/O and peripheral devices

I/O devices
 For communication between microprocessor and outside world

 Keyboards, CRT displays, Printers, Compact Discs etc.

 Ports / Buffer IC’s

Microprocessor I/ O devices
(interface circuitry)

 Data transfer types

Memory mapped
Programmed I/ O
Data transfer is accomplished I/O mapped
through an I/O port controlled by
software

Interrupt driven I/ O
I/O device interrupts the processor and
initiate data transfer
Direct memory access
Data transfer is achieved by bypassing
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the microprocessor
8086 Microprocessor

8086 and 8088 comparison

Memory mapping I/O mapping
20 bit address are provided for I/O devices 8-bit or 16-bit addresses are provided for I/O
devices

The I/O ports or peripherals can be treated like Only IN and OUT instructions can be used for data
memory locations and so all instructions related transfer between I/O device and processor
to memory can be used for data transmission
between I/O device and processor

Data can be moved from any register to ports Data transfer takes place only between
and vice versa accumulator and ports
When memory mapping is used for I/O devices, Full memory space can be used for addressing
full memory address space cannot be used for memory.
addressing memory.
 Suitable for systems which require large
 Useful only for small systems where memory memory capacity
requirement is less

For accessing the memory mapped devices, the For accessing the I/O mapped devices, the
processor executes memory read or write cycle. processor executes I/O read or write cycle.

 M / 𝐈𝐎 is asserted high  M / 𝐈𝐎 is asserted low

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