Tutorial Shift Register
Objective Question
1. Based on how binary information is entered or shifted out, shift registers are classified
into _______ categories.
(A) 2
(B) 3
(C) 4
(D) 5
Ans: C
Explanation: Based on how binary information is entered or shifted out, shift registers are
classified into 4 categories, SISO, SIPO, PISO, PIPO.
2. Data can be changed from special code to temporal code by using
(A) Shift registers
(B) counters
(C) Combinational circuits
(D) A/D converters.
Ans: A
Data can be changed from special code to temporal code by using Shift Registers.(A
Register in which data gets shifted towards left or right when clock pulses are applied is
known as a Shift Register.)
3. Shifting a register content to left by one bit position is equivalent to
(A) division by two.
(B) addition by two.
(C) multiplication by two.
(D) subtraction by two.
Ans:C
4. What type of register would have a complete binary number shifted in one bit at a
time and have all the stored bits shifted out one at a time?
(A) Parallel-in Parallel-out
(B) Parallel-in Serial-out
(C) Serial-in Parallel-out
(D) Serial-in Serial-out
Ans: C
Explanation: Serial-in Serial-out register would have a complete binary number shifted in
one bit at a time and have all the stored bits shifted out one at a time.
5. In shift register, each bit is updated on a
(A) clock transition
(B) input signal
(C) output signal
(D) source voltage
Ans: A
6. What is the difference between a shift-right register and a shift-left register?
(A) There is no difference.
(B) The direction data of the shift.
(C) Input and output of shift register.
(D) The types of shift.
Ans: B
Subjective Question
1. Using D-Flip flops and waveforms explain the working of a 4-bit SISO shift register.
(10 Marks)
Ans:
Serial In - Serial Out Shift Register: Fig.9(a) shows a 4 bit serial in - serial out shift
register consisting of four D flip flops FF0 , FF1 , FF2 and FF3. As shown it is a positive
edge triggered device. The working of this register for the data 1010 is given in the
following steps.
Logic Diagram of 4-bit Serial In – Serial Out Shift Register
1. Bit 0 is entered into data input line. D0 = 0, first clock pulse is applied, FF0 is reset
and stores 0.
2. Next bit 1 is entered. Q0 = 0, since Q0 is connected to D1, D1 becomes 0.
3. Second clock pulse is applied, the 1 on the input line is shifted into FF0 because FF0
sets. The 0 which was stored in FF0 is shifted into FF1.
4. Next bit 0 is entered and third clock pulse applied. 0 is entered into FF0, 1 stored in
FF0 is shifted to FF1 and 0 stored in FF1 is shifted to FF2.
5. Last bit 1 is entered and 4th clock pulse applied. 1 is entered into FF0, 0 stored in
FF0 is shifted to FF1, 1 stored in FF1 is shifted to FF2 and 0 stored in FF2 is shifted
to FF3. This completes the serial entry of 4 bit data into the register. Now the LSB 0 is
on the output Q3.
6. Clock pulse 5 is applied. LSB 0 is shifted out. The next bit 1 appears on Q3 output.
7. Clock pulse 6 is applied. The 1 on Q3 is shifted out and 0 appears on Q3 output.
8. Clock pulse 7 is applied. 0 on Q3 is shifted out. Now 1 appears on Q3 output.
9. Clock pulse 8 is applied. 1 on Q3 is shifted out.
10. When the bits are being shifted out (on CLK pulse 5 to 8) more data bits can be
entered in.
2. What is a shift register? Can a shift register be used as a counter? If yes, explain how?
(2 marks)
Ans:
Shift Register: A register in which data gets shifted towards left or right when clock pulses
are applied is known as a Shift Register. A shift register can be used as a counter. If the
output of a shift register is fed back to serial input, then the shift register can be used as a
Ring Counter.
3. What is shift register? And explain the working principle of the shift register. (4 marks)
A shift register is a digital memory circuit found in calculators, computers, and data-
processing systems. Bits (binary digits) enter the shift register at one end and emerge from
the other end. The two ends are called left and right. Flip flops, also known as bistable
gates, store and process the data. A register consists of a group of flip-flops and gates that
effect their transition. The flip flops hold the binary information and the gates control when
and how new information is transformed into the register.
4. Illustrate and explain a shift register from SR flip flop. (15 marks)
S-R Flip-Flop Shift Register: Shift registers can be built by using SR flip-flops..Figure
below shows the 4-bit shift register, which uses RS flip-flops.
It uses Four SR Flip-Flops in cascade and the inputs to the last three flip-flops in the chain
receive complementary inputs, that is if S = 0, R = 1 and if S = 1, R = 0. The first flip-flop
has complementary S and R inputs and, therefore, it behaves like a D-type flip-flop.
Because of the Inverter in the clock line, data will be transferred to flip-flop outputs on the
positive going edge of the clock pulse.
There are two inputs A and B. Any one of the inputs can be used. Since a 1 input at A or B
will be a 1 input at S of the first flip-flop, as a result of double complementation, a positive
going clock pulse will produce an output of 1 at Q of the first flip-flop. Normally both A
and B inputs of the NAND gate are connected together when data is being fed and the
NAND is not required to serve as a gate.
5. List out types of shift register and some applications of Shift Register. (4 marks)
Ans:
Types of Shift Registers:
(i) Serial-In Serial-Out (SISO) Shift Register
(ii) Serial-In Parallel Out (SIPO) Shift Register
(iii) Parallel-In Serial Out (PISO) Shift Register
(iv) Parallel-In Parallel Out (PIPO) Shift Register
Applications of Shift Registers:
(i) Serial to Parallel Converter
(ii) Parallel to Serial Converter
(iii) Delay line
(iv) Ring Counter
(v) Twisted-ring Counter
(vi) Sequence Generator
6. Explain how a shift register can be used as a ring counter giving the wave forms at the
output of the flipflops. (15 marks)
Shift Register as a Ring Counter: A Ring Counter is a Circular Shift Register with
only one flip-flop being set at any particular time; all other are cleared. The single bit
is shifted from one flip-flop to the other to produce the sequence of timing signals.
Fig.9(b) shows a 4-bit shift register connected as a ring counter. The initial value of
the register is 1000, which produces the variable T0. The single bit is shifted right
with every clock pulse and circulates back from T3 to T0. Each flip-flop is in the 1
state once every four clock pulses and produces one of the four timing signals shown
in Fig.9(c). Each output becomes 1 after the negative-edge transition of a clock pulse
and remains 1 during the next clock pulse.
7. Describe the operation of parallel in parallel out (PIPO) shift register. (15 marks)
As the name suggests, in parallel in parallel out (PIPO), inputs are given in
parallel, and outputs are also taken in parallel fashion. For synchronization
same clock pulse is connected to all flipflops. Thus any state change will take
place simultaneously. Clear inputs are also connected to all flip-flops. So that
the register can be cleared if required.
