8051 Microcontroller
8051 Microcontroller
Microcontroller
Presented By,
Er. Swapnil Kaware,
B.E. (Electronics),
[email protected]
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Salient Features
(1). 8 bit microcontroller originally developed by Intel in 1980.
(2). High-performance CMOS Technology.
(3). Contains Total 40 pins.
(4). Address bus is of 16 bit & data bus is of 8 bit.
(5). 4K bytes internal ROM (program).
(6). 128 bytes internal RAM (data).
(7). Four 8-bit I/O ports.
(8). Two 16-bit timers.
(9). Serial interface Communication.
(10). 64K external code & data memory space.
(11). 210 bit-addressable locations.
(12). Internal memory consists of on-chip ROM and on-chip data RAM.
(13). 8051 implements a separate memory space for programs (code) and data.
(14). Operating frequency is 24MHz-33MHz.
(15). +5V Regulated DC power supply is required to operate .
(16). It has four 8 bit ports, total 32 I/O lines.
(17). RAM, ROM, I/O ports, one serial port and timers are all on-chip.
(18). 6-interrupts (2 are external with 2 priority levels).
(19). Low-power Idle and Power-down Modes.
(20). Full duplex UART.
(21). 8051 has 21 special function registers (SFRs).
Internal Architecture
Oscillator Circuit:(1). The 8051 requires an external oscillator circuit.
(2). The oscillator circuit usually runs around 12MHz.
(3). The crystal generates 12M pulses in one second.
(4). The pulse is used to synchronize the system
operation in a controlled pace.
(5). An 8051 machine cycle consists of 12 crystal pulses
(clock cycle).
(6). Used for synchronizing internal operations.
(7). Pins XTAL1 & XTAL2 have been used.
(8). The length of machine cycle depends on the
frequency of the crystal oscillator connected to 8051.
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Internal Memory
(1). 8051 implements a separate memory space for programs (code) and
data.
(2). Both code and data may be internal, however, both expand using
external components to a maximum of 64K code memory and 64K data
memory.
(3). Internal memory consists of on-chip ROM and on-chip data RAM.
(4). On-chip RAM contains a rich arrangement of general purpose storage,
bit addressable storage, register banks, and special function registers.
(5). In the 8051, the registers and input/output ports are memory mapped
and accessible like any other memory location.
(6). In the 8051, the stack resides within the internal RAM, rather than in
external RAM.
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ACC
B
PSW
SP
DPTR
IP
PMODE
PCON
TMODE
TCON etc.
Special Function
Registers
B Register
(1). B register or accumulator B is used along
with the accumulator for multiply and divide
operations.
(2). MUL AB: multiplies 8 bit unsigned values in A
and B. and leaves the 16 bit result in A (low
byte) and B (high byte).
(3). DIV AB: divided A by B, leaving the integer
result in A and remainder in B.
(4). B register is bit-addressable.
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Stack Pointer
(1). Stack pointer (SP) is an 8-bit register at address 81H.
(2). It contains the address of the data item currently on
top of the stack.
(3). Stack operations include pushing data on the stack
andpopping data off the stack.
(4). Pushing increments SP before writing the data
(5). Popping from the stack reads the data and
decrements the SP
(6). 8051 stack is kept in the internal RAM
(7). Depending on the initial value of the SP, stack can
have different sizes
(8). Example: MOV SP,#5FH
(9). On 8051 this would limit the stack to 32 bytes since
the uppermost address of on chip RAM is 7FH.
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I/O Ports
(1). One of the major features of a microcontroller is the
versatility built into the I/O circuits that connect the
microcontroller to the outside world .
(2). To be commercially viable, the 8051 had to incorporate as
many I/O functions as were technically and economically
possible.
(3). One of the most useful features of the 8051 is four
bidirectional I/O ports.
(4). Each port has an 8-bit latch in the SFR space as mentioned
earlier.
(5). To reduce the overall package pin count, the 8051 employs
multiple functions for each port.
(6). Each port also has an output drive and an input buffer.
(7). These ports can be used to general purpose I/O, as an
address and data lines.
(8). The four 8-bit I/O ports P0, P1, P2 and P3 each uses 8 pins
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I/O Ports
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PORT 0
(1). Port 0 is 8-bitbidirectional I/O port.
(2). Port 0 pins can be used as high-impedance
inputs.
(3). Port 0 is also the multiplexed low-order address
and data bus during accesses to external program
and data memory.
(4). We r using pins no. from 32 to 39.
(5). When used as an output the pin latches are
programmed to 0.
(5). When used as an input the pin latches are
programmed to 1.
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PORT 1
(1). Port 1 is an 8-bit bidirectional I/0 port.
(2). We r using pins no. from 1 to 9.
(3). Port 1 have no dual functions.
(4). When used as an output the pin
latches are programmed to 0.
(5). When used as an input the pin latches
are programmed to 1.
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PORT 2
(1). Port 2 is an 8-bit bidirectional I/O port.
(2). Port 2 emits the high-order address byte during fetches
from external program memory and during accesses to
external data memory that use 16-bit addresses (MOVX
@DPTR).
(3). When used as an output the pin latches are
programmed to 0.
(4). When used as an input the pin latches are
programmed to 1.
(5). We r using pins no. from 21 to 28.
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PORT 3
(1). Port 3 is an 8-bit bi-directional I/0 port.
(2). We r using pins no. from 10 to 17.
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22
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Interrupts
Whenever any device needs its service, the device notifies the
microcontroller by sending it an interrupt signal.
Interrupts Priorities
Interrupt
Destinations
Interrup
t
Address
(Hex)
IE0
0003H
TF0
000BH
IE1
0013H
TF1
001BH
SERIAL
0023H
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27
28
END OF
SESSION
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