Chapter-2
Combinational Logic Circuit
(Marks 14)
What is Combinational Circuit?
Some of the characteristics of combinational circuits are following −
● The output of combinational circuit at any instant of time, depends only on the levels present at
input terminals.
● The combinational circuit do not use any memory. The previous state of input does not have any
effect on the present state of the circuit.
● A combinational circuit can have an n number of inputs and m number of outputs.
Block diagram
Representation of Logic Expressions
Logic expressions can be represented in one of the two forms:
[Link]- Sum of Product form
E.g. Y= AB + AC + BC
2. POS - Product of Sum form
E.g. Y= (A+ B)(B +C)(A+C)
Standard and Canonical SOP and POS forms
Canonical forms In this form each term in a equation must
:-
contain all the available input variables.
[Link] SOP Form Y= A B C + A B C + A BC
Each product term consists of all the input variables in complemented or uncomplemented
form.
Canonical POS Form Y=( A + B +C ).( A + B + C)
Each sum term consists of all the input variables in complemented or uncomplemented form.
Standard and Canonical SOP and POS forms
Canonical forms In this form each term in a equation must
:-
contain all the available input variables.
[Link] SOP Form Y= A B C + A B C + A BC
Each product term consists of all the input variables in complemented or uncomplemented
form.
Canonical POS Form Y=( A + B +C ).( A + B + C)
Each sum term consists of all the input variables in complemented or uncomplemented form.
Standard Forms:-
In this form each term may contain one, two or any number of input variables.
It is not necessary that each term should contain all the variables.
e.g. Y = A B + A B C +A BC Standard SOP Form
Y = (A + B)(B+ C ) Standard POS Form
Sr. No. Expression Type
1 Y=AB+ABC +ABC Standard SOP
2 Y=AB+AB +A B Canonical SOP
3 Y = ( A + B ) .( A + B ) . ( A + B ) Canonical POS
4 Y = ( A + B ) .( A + B + C ) Standard POS
SOP -------> Canonical SOP or Standard SOP
Steps to be followed:-
Step 1: For each term in the given standard SOP expression,
find the missing variable.
Step 2: Then AND this term with the term formed by ORing
the missing variable and its complement.
Step 3: Simplify the expression to get the Canonical SOP
expression.
E.g. Convert the expression Y = A B + A C + B C
Into the canonical SOP form.
POS -----> Canonical POS or Standard POS
Steps to be followed:-
Step 1: For each term in the given standard POS expression,
find the missing variable.
Step 2: Then OR this term with the term formed by ANDing
the missing variable and its complement.
Step 3: Simplify the expression to get the Canonical POS
expression.
E.g. Convert the expression
Y = (A + B).( A + C ).( B + C ) into the canonical POS form.
Concept of Minterms and Maxterms
Q. Define minterm and maxterm. Give example.
Minterm :- Each individual term in canonical SOP form is called as
minterms.
Maxterm :- Each individual term in canonical POS form is called as
maxterms.
Canonical SOP Y=A B C + A B C + A B C
Canonical POS Y = (A + B) .( A + B )
Variables Minterms Maxterms
A B mi Mi
0 0 m0 = A B M0 = A + B
0 1 m1 = A B M1 = A + B
1 0 m2 = A B M3 = A + B
1 1 m3 = A B M4 = A + B
● Above table gives the minterms and maxterms for two variables i.e. A, B
● The number of minterms and maxterms is 2n where n is number of
variables.
● In above table n=2, so number of minterms and maxterms will be 22 = 4
● Each minterm is represented by mi where i=0,1,..........2n -1
● Each maxterm is represented by Mi
Minterms and Maxterms for 3 variables
Representation of Logical Expression using Minterms and
Maxterms
1. Y = A B C + A B C + A B C
m7 m3 m4
Y = m7 + m3 + m4 = m m(3,4,7)
Where Denotes sum of products
2. Y= ( A + B + C) .(A + B + C ) . ( A + B + C)
M2 M0 M6
Y = M2 M0 M6
Y= M ( 0, 2,6)
Where Denotes product of sum
To write Canonical SOP Expression for a given Truth Table
Step 1: From the given truth table, consider only those
combinations of inputs which produce an output Y =1
Step 2 : Write down a product term in terms of input variables for
such combinations.
Step 3 : OR all these product terms produced in step 2 to get the
canonical SOP.
Given Truth Table
A B Y
0 0 0
0 1 1 Y1 = A B
1 0 1 Y2 = A B
1 1 0
Y = Y1 + Y2 = A B + A B <----Canonical SOP Expression
Y = m1 + m2 = m(1,2)
To write Canonical POS Expression for a given Truth Table
Step 1: From the given truth table, consider only those
combinations of inputs which produce an output Y =0
Step 2 : Write down a sum term for such combinations.
Step 3 : AND all these sum terms produced in step 2 to get the
canonical POS.
Given Truth Table
A B Y
0 0 0 Y1 = A + B
0 1 1
1 0 1
1 1 0 Y2 = A + B
Y = Y1 . Y2 = (A + B) .( A +B) <----Canonical POS Expression
Y= (0, 3)
K-MAP(Karnaugh-Map) Simplification
Q. What is K-map?
● This is another simplification technique to reduce the boolean
equation.
● It is a graphical method of simplifying a boolean equation.
● It is made up of rectangular boxes.
● K-map can be written for 2,3,4.......upto 6 variables.
● The K-map is drawn for output Y and the input variables are used for
making the entries in the boxes.
K-MAP Structure
- The structure of 2 input variable is shown in figure.
- This K-map is drawn for output Y and two input variables A and B.
- Values for A and B are 00,01,10,11
- A 2 variable K-map consists of 22 = 4 rectangular boxes.
- Inside these boxes we have to enter the values of output Y for different
combinations of input A and B.
A A
2 Variable K-MAP B
B
Relation between a truth table and K-map entries
Truth Table 2 Variable K-map
A B Y
B B
0 0 0 A B 0 1
0 1 0 A 0 0 0
1 0 0 A 1 0 1
1 1 1
Referring to above truth table inside the boxes of K-map we
have to enter the values of output Y corresponding to various
combinations of A and B
Truth Table
A B C Y 3 Variable K-map
0 0 0 1 BC
0 0 1 0 00 01 11 10
A
0 1 0 0 0 1 0 1 0 OR
0 1 1 1 1 0 1 1 0
1 0 0 0
1 0 1 1 AB
1 1 0 0 C 00 01 11 10
1 1 1 1 0 1 0 0 0
1 0 1 1 1
4 Variable K-map
CD AB
00 01 11 10 00 01 11 10
AB CD
00 00
01 01
11 11
10 10
Adder(Binary Adder) :- An adder is a digital circuit that performs addition
of numbers.
A B
Adder
C S
Carry Sum
●
Types of Adder
1. Half Adder
2. Full Adder
1. Half Adder :-
● It is a combinationational logic circuit with two inputs and two
outputs.
● This circuit has two outpurs such as “carry”and “sum”
● The block daigram of half adder is as shown in fig.
Sum(S)
A
Half Adder
B Carry(C)
● The half adder circuit is supposed to add two single bit binary numbers A and
B.
● The truth table of half adder is as shown in following fig.
● Design Half Adder using K-map
K-map for sum and carry outputs are as shown in following figures.
Boolean expressions for sum(S) and carry(C) output are obtained from K-
maps are as follows:
● Disadvantage of half adder is that addition of three bits is not possible to
perform.
● Hence the half adder circuit is as shown in following figure as
●
Logic Diagram for Half adder circuit is as shown in figure.
●
● Realization of Half Adder using only NAND Gates:-
Sum(S) = A B + A B
Carry (C) = AB
●
Full Adder
● To overcome the drawback of half adder , a 3 single bit adder circuit
called Full adder is developed
● Full Adder is the adder which adds three inputs and produces two outputs.
● The first two inputs are A and B and the third input is an input carry as C-IN.
● The output carry is designated as C-OUT and the normal output is designated as
S which is SUM.
Block Diagram
Truth table of Full Adder :-
K-map for Sum(S) and Carry
● Logic diagram for Full Adder is as shown in following fig.
● Full Adder using two half adders:- Design a full adder using half
adder
● Half Subtractor :-
● It is a combinational circuit with two inputs and two outputs(difference
and borrow) as shown in fig.
●
Truth Table
K-map for difference and borrow outputs :-
● Logic diagram for Half Subtractor is as shown in following
fig.
● Half subtractor using Basic Gates :-
● Half subtractor using NAND Gates :-
● Multiplexer :- It is a combinational circuit with more than one
input line, one output line and more than one select line.
●
●
In figure, there are n-data inputs(D0, D1,------Dn-1), one output Y and m
select inputs, S0,S1,----Sm-1
●
Multiplexer is a digital circuit which selects one of the n data inputs and
routes(connects) it to the output.
●
The selection of one of the n inputs is done with the help of select
inputs.
●
E is called as strobe or enable input which is generally active low
terminal.
Need of Multiplexers: Describe Necessity of Multiplexer.
● In most of the electronics systems, the digital data is available from
more than one sources. It is necessary to route this data over a
single line.
● Under such situation we require a circuit which selects one of the
many sources at a time.
● Such circuit is nothing but the multiplexer which has many inputs,
one output and some select inputs.
● Multiplexer improves the reliability of the digital system because it
reduces the number of external wired connections.
Advantages of Multiplexers:
● It reduces the number of wires required to be used.
● It reduces the circuit complexity and cost.
● We can implement many combinational circuits using MUX.
● It simplifies the logic design.
● It does not need the k-map for simplification.
●
● Multiplexers are classified into four types:
●
2-1 multiplexer ( 1select line)
● 4-1 multiplexer (2 select lines)
●
8-1 multiplexer(3 select lines)
● 16-1 multiplexer (4 select lines)
1) 2:1 Multiplexer :- Draw the symbol and write the truth table
of 2:1 MUX.
A 2-to-1 multiplexer consists of two inputs D0 and D1, one select input S
and one output Y. Depends on the select signal, the output is connected to
either of the inputs.
Block Diagram
● Thus, the Boolean expression for the output becomes D0 when S=0
and output is D1 when S=1.
● From the truth table the Boolean expression of the output is given as
Truth Table
Select S D1 D0 Output Y
0 1 1
1 1 1
●
Realization of 2:1 MUX using gates :-
4:1 Multiplexer :-
● 4 :1 Multiplexer has four data inputs D3, D2, D1 & D0, two selection
lines s1 & s0 and one output Y.
● The block diagram of 4 :1 Multiplexer is shown in the following figure.
Truth table:
● The truth table tells us that if S1 S0 =00, the data bit D0 is selected
and routed to output
● Y = D0............when S1S0 = 00
● Similarly if S1S0=01, the D1 is selected and Y= D1 When S1S0 =01
● Y= D2 for S1SO=10 and Y=D3 for S1S0=11
Boolean Expression:-
● From the truth table, it is shown that boolean expression for 4:1 MUX
is :
Y = D0 S1 S0 + D1 S1 S0 + D2 S1 S0 +D3 S1 S0
Applications of Multiplexer:-
● It is used as a data selector to select one out of many data
inputs.
● It is used for simplification of logic design.
● It is used in designing combinational circuit.
● To minimize the number of connections in a logic circuit.
●
Implementation of expression using multiplexer
●
Represent following expression using Multiplexer:
Y= m (0,1,2,4,6,11,13,15)
● Demultiplexer :-
● It performs the reverse operation of a multiplexer i.e. It receives one
input and distributes it over several outputs.
● It has only one input, n outputs and m select inputs.
● At a time only one output line is selected by the select lines and the
input is routed to the selected output line.
Data Input Y0
Din
Demultiplexer Y1
Enable E
Yn-1
Sm-1 Sm-2 S0
●
Types of Demultiplexer :-
De-multiplexers are classified into four types
●
1:2 demultiplexer (1 select line)
● 1:4 demultiplexer (2 select lines)
●
1:8 demultiplexer (3 select lines)
●
1:16 demultiplexer (4 select lines)
1:2 demultiplexer (1 select line):-
● The block diagram is as in fig. It has one data input D in , one select
input S0 , one enable(E) input and two outputs Y0 and Y1
Din
Block Diagram
●
Truth table of Demux 1:2 :-
Enable(E) Select(S0) Outputs
Y1 Y0
1 0 0 Din
1 1 Din 0
Din is connected to Y0 if S0 =0, similarly Din is connected to Y1 if S0=1
Boolean Expression
Y1 = ES0Din
Y0 = E S0 Din
Logical Diagram for 1:2 Demux using basic gates:
E
1:4 Demultiplexer :-
Block Diagram
1:4 Demultiplexer :-
Truth Table
1:4 Demultiplexer :-
Boolean Expression
Y0 = S1 S0 E Din
Y1 = S1 S0 E Din
Y2 = S1 S0 E Din
Y3 = S1 S0 E Din
Logical Diagram for 1:4 Demultiplexer using Basic gates :-
Applications of Demultiplexer :-
1. As a decoder
2. As a one to many switch
3. For implementation of Boolean expressions.
Comparision of Multiplexer and Demultiplexer :-
