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Register Transfer Language in Computer Architecture

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0% found this document useful (0 votes)
27 views54 pages

Register Transfer Language in Computer Architecture

Lecture notes.
Copyright
© © All Rights Reserved
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Available Formats
Download as PPT, PDF, TXT or read online on Scribd

Computer Organization and Architecture

(CoSc 2022)

Chapter 4: Register Transfer Language and Micro Operations


Outline
4.1. Introduction

4.2. Register transfer languages


4.3. Bus and memory transfer
4.4. Arithmetic and logic operations
4.5. Shift micro operations
Introduction

3
Introduction

4
Register transfer languages
 Digital System: An interconnection of hardware
modules that do a certain task on the information.
 Registers + Operations performed on the data stored
in them = Digital Module
 Modules are interconnected with common data and
control paths to form a digital computer system

5
Register Transfer Language
 Microoperations: operations executed on data stored in
one or more registers.
 For any function of the computer, a sequence of

microoperations is used to describe it


 The result of the operation may be:

 replace the previous binary information of a register or


 transferred to another register

Shift Right Operation


101101110011 010110111001
6
Register Transfer Language
 The internal hardware organization of a digital
computer is defined by specifying:

The set of registers it contains and their function

The sequence of microoperations performed on the binary information
stored in the registers

The control that initiates the sequence of microoperations
 Registers + Microoperations Hardware + Control
Functions = Digital Computer

7
Register Transfer Language
 Register Transfer Language (RTL) : a symbolic
notation to describe the microoperation transfers among
registers
Next steps:
 Define symbols for various types of microoperations,
 Describe the hardware that implements these microoperations

8
Register transfer languages
 Register Transfer Language, RTL, (sometimes
called register transfer notation) is a powerful
high level method of describing the
architecture of a circuit.
 VHDL code and schematics are often created
from RTL.
 RTL describes the transfer of data from register
to register, known as microinstructions or
microoperations.

9
Bus and Memory Transfers
 Paths must be provided to transfer information from
one register to another
 A Common Bus System is a scheme for transferring
information between registers in a multiple-register
configuration
 A bus: set of common lines, one for each bit of a
register, through which binary information is transferred
one at a time
 Control signals determine which register is selected by
the bus during each particular register transfer

10
Bus and Memory Transfers

11
Bus and Memory Transfers
 The transfer of information from a bus into one of many
destination registers is done:
 By connecting the bus lines to the inputs of all destination
registers and then:
 activating the load control of the particular destination
register selected
 We write: R2 ← C to symbolize that the content of
register C is loaded into the register R2 using the
common system bus
 It is equivalent to: BUS ←C, (select C)
R2 ←BUS (Load R2)

12
Bus and Memory Transfers
Three-State Bus Buffers
 A bus system can be constructed with three-state
buffer gates instead of multiplexers
 A three-state buffer is a digital circuit that exhibits
three states: logic-0, logic-1, and high-impedance
(Hi-Z)

Three-State Buffer

13
Bus and Memory Transfers
Three-State Bus Buffers

14
Bus and Memory Transfers
Three-State Bus Buffers

15
Bus and Memory Transfers
Memory Transfer
Memory read : Transfer from memory

Memory write : Transfer to memory

Data being read or wrote is called a memory word (called

M)
It is necessary to specify the address of M when writing

/reading memory
This is done by enclosing the address in square brackets

following the letter M


Example: M[0016] : the memory contents at address

0x0016
16
Bus and Memory Transfers
Memory Transfer
Assume that the address of a memory unit is stored in a

register called the Address Register AR


Lets represent a Data Register with DR, then:

Read: DR ← M[AR]

Write: M[AR] ← DR

17
Bus and Memory Transfers
Memory Transfer

18
Arithmetic Microoperations
 The microoperations most often encountered in digital
computers are classified into four categories:
 Register transfer microoperations
 Arithmetic microoperations (on numeric data stored in the
registers)
 Logic microoperations (bit manipulations on non-numeric
data)
 Shift microoperations

19
Arithmetic Microoperations
 The basic arithmetic microoperations are:
 addition, subtraction, increment, decrement, and shift
 Addition Microoperation:
R3 ←R1+R2
 Subtraction Microoperation:
R3 ←R1-R2 or : 1’s
complement
R3 ←R1+R2+1

20
Arithmetic Microoperations
 One’s Complement Microoperation:
R2 ←R2
 Two’s Complement Microoperation:
R2 ←R2+1
 Increment Microoperation:
R2 ←R2+1
 Decrement Microoperation:
R2 ←R2-1

21
Half Adder/Full Adder

22
Arithmetic Microoperations Binary Adder

23
Arithmetic Microoperations Binary Adder-
Subtractor

24
Arithmetic Microoperations Binary Adder-
Subtractor
 For unsigned numbers, this gives A – B if A≥B or the
2’s complement of (B – A) if A < B
(example: 3 – 5 = -2= 1110)
 For signed numbers, the result is A – B provided that

there is no overflow. (example : -3 – 5= -8)

25
Arithmetic Microoperations Binary Adder-
Subtractor
 What is the range of unsigned numbers that can be
represented in 4 bits?
 What is the range of signed numbers that can be
represented in 4 bits?
 Repeat for n-bit?!

26
Arithmetic Microoperations Binary
Incrementer

27
Arithmetic Microoperations Binary
Incrementer
 Binary Incrementer can also be implemented using a
counter
 A binary decrementer can be implemented by adding
1111 to the desired register each time!

28
Arithmetic Microoperations Arithmetic Circuit
 This circuit performs seven distinct arithmetic
operations and the basic component of it is the parallel
adder
 The output of the binary adder is calculated from the
following arithmetic sum:
 D = A + Y + Cin

29
Arithmetic Microoperations Arithmetic
Circuit

30
Logic Microoperations
OR Microoperation

31
Logic Microoperations
AND Microoperation

32
Logic Microoperations
Complement (NOT) Microoperation

33
Logic Microoperations
XOR (Exclusive-OR) Microoperation

34
Logic Microoperations
Other Logic Microoperations
Selective-set Operation
 Used to force selected bits of a register into logic-1 by

using the OR operation

35
Logic Microoperations
Other Logic Microoperations
Selective-complement (toggling) Operation
Used to force selected bits of a register to be

complemented by using the XOR operation

36
Logic Microoperations
Other Logic Microoperations
Insert Operation
Step1: mask the desired bits

Step2: OR them with the desired value

Example: suppose R1 = 0110 1010, and we desire to


replace the leftmost 4 bits (0110) with 1001 then:
 Step1: 0110 1010  0000 1111
 Step2: 0000 1010  1001 0000
  R1 = 1001 1010

37
Logic Microoperations
Other Logic Microoperations
NAND Microoperation

38
Logic Microoperations
Other Logic Microoperations
NOR Microoperation

39
Logic Microoperations
 Other Logic Microoperations
Set (Preset) Microoperation
 Force all bits into 1’s by ORing them with a value in

which all its bits are being assigned to logic-1


 Example: 100110  111111 = 111111
2 2 2

Clear (Reset) Microoperation


 Force all bits into 0’s by ANDing them with a value in

which all its bits are being assigned to logic-0


 Example: 100110  000000 = 000000
2 2 2

40
Logic Microoperations
Hardware Implementation
The hardware implementation of logic microoperations

requires that logic gates be inserted for each bit or pair of


bits in the registers to perform the required logic function
Most computers use only four (AND, OR, XOR, and

NOT) from which all others can be derived.

41
Logic Microoperations
 Hardware Implementation

Figure B
42
Shift Microoperations
 Used for serial transfer of data
 Also used in conjunction with arithmetic, logic, and
other data-processing operations
 The contents of the register can be shifted to the left or
to the right
 As being shifted, the first flip-flop receives its binary
information from the serial input
 Three types of shift: Logical, Circular, and Arithmetic

43
Shift Microoperations

**Note that the bit ri is the bit at position (i) of the register

44
Shift Microoperations
Logical Shifts
Transfers 0 through the serial input

45
Shift Microoperations
Circular Shifts (Rotate Operation)
Circulates the bits of the register around the two ends

without loss of information

46
Shift Microoperations
Arithmetic Shifts
Shifts a signed binary number to the left or right

An arithmetic shift-left multiplies a signed binary number

by 2: ashl (00100): 01000


An arithmetic shift-right divides the number by 2

ashr (00100) : 00010


An overflow may occur in arithmetic shift-left, and

occurs when the sign bit is changed (sign reversal)

47
Shift Microoperations
 Arithmetic Shifts

48
Shift Microoperations
Arithmetic Shifts
An overflow flip-flop V can be used to detect an
s
arithmetic shift-left overflow

49
Shift Microoperations
 Example: Assume R1=11001110, then:
 Arithmetic shift right once : R1 = 11100111
 Arithmetic shift right twice : R1 = 11110011
 Arithmetic shift left once : R1 = 10011100
 Arithmetic shift left twice : R1 = 00111000
 Logical shift right once : R1 = 01100111
 Logical shift left once : R1 = 10011100
 Circular shift right once : R1 = 01100111
 Circular shift left once : R1 = 10011101

50
Shift Microoperations
Hardware Implementation
A possible choice for a shift unit would be a bidirectional

shift register with parallel load (refer to Fig 2-9). Has


drawbacks:
 Needs two pulses (the clock and the shift signal pulse)
 Not efficient in a processor unit where multiple number of
registers share a common bus
It is more efficient to implement the shift operation with
a combinational circuit

51
Shift Microoperations
Hardware Implementation

52
Arithmetic Logic Shift Unit
 Instead of having individual registers performing the
microoperations directly, computer systems employ a
number of storage registers connected to a common
operational unit called an Arithmetic Logic Unit (ALU)

53
Arithmetic Logic Shift Unit

54

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