Asim Junaid
Ms physics
Silicon on
Insulator
SOI
What is SOI?
• SOI-Silicon-on Insulator
• Silicon-on-insulator (SOI) is a semiconductor structure
consisting of a layer of single crystalline silicon
separated from the bulk substrate by a thin layer of
insulator.
• Si layer on top of an insulator layer to build active
devices and circuits.
• The insulator layer is usually made of SiO2
Reason for SOI
• Replacement for SOS Because SOS are
• Commerically expensive
• Need to extend Moore's Law
• Commercial Availability of SOI wafers
Use in digital and analog
circuits
• SOI technology is useful for implementing high-
speed op-amps - given its low Vt.
• Higher transconductance (especially of FD) implies
higher gain.
• Lower power consumption compared to bulk
devices at low current level.
Advantages of SOI
• Reduced Source and Drain to Substrate Capacitance.
• Capacitance acting as reactance which will hindering the current
• Absence of Latchup.
• A latch-up is a type of short circuit which can occur in an integrated
circuit
• Lower Passive current.
• Denser Layout→ Low cost.
• High Speed
• Low Power
• Easy Device IsolatioAdvantages
Disadvantages of SOI
• Major bottleneck is high manufacturing costs of the
wafer.
• Floating-body effects impede extensive usage of
SOI.to interfere with SOI or slow the progress of SOI
• Device integration - dopant reaction with the oxide
surface.
• Electrical differences between SOI and bulk devices.
SOI Fabrications
• Bond and Etch Back
• SIMOX (Separation by IMplantation Of oxygen)
• SIMON(Separation by IMplantation
• Of Nitrogen)
Fully Depleted SOI
• FDSOI technology offers a promising answer to these
challenges. Fully Depleted Silicon on Insulator, or FDSOI, is a
planar process technology that delivers the benefits of reduced
silicon geometries while simplifying the manufacturing process.
This process technology relies on two primary innovations.
First, an ultra-thin layer of insulator, called the buried oxide
(BOX), is positioned on top of the base silicon. Then, a very thin
silicon film is used to form a transistor channel. Due to the thin
film silicon structure, there is no need to dope the channel,
thus making the transistor “fully depleted.”
• This is what you expect.
• FDSOI MOSFET
• Depleted channel.
Partially Depleted SOI
• In a partially depleted SOI device,
• the body is thick enough such that
• only part of the body region is depleted
• across the bias range of operation.
• What if active Si layer is thick?
• Body in the res floating Fating body effect.
Practical Application
• 1987 • IBIS's commercial SIMOX wafers
• 1988 (3" - 6")
• 1989 • HP's 2GHz CMOS circuit
• March 2004 • TI's commercial 64k SRAM
• End 2004 • Apple's Xserve G5
• AMD 90nm processor
Novel SOI DEVICES
• Dual gate SOI.
• SOI Single electron transistors.
Negative Resist -SOI
• EBL.
• Plasma oxidation.
• Etching of amorphous silicon (Electron cyclotron
resonance)
• BOX removal.
Negative Resist Silicon
• EBL
• Plasma oxidation
• Electron cyclotron resonance chlorine
etching of silicon.
SOI SET
TEM Image of
Trenches
Summary
• Future devices will involve SOI.
• SOI provides certain benefits over bulk CMOS for
smaller gate lengths.
• SOI SETS may become a promising technology in
the future.
Thank you
