Digital System Design Syllabus

UNIT-II: Boolean function representations: Canonical and

Standard forms, Karnaugh map up to 5 variables, Don„t care
combinations.
Boolean Function Representations
Boolean function can be Represented by
1) Canonical Form
2) Standard Form
Canonical Form – In Boolean algebra,Boolean function can be expressed
as Canonical Form known as Minterm and Maxterm .
In Minterm, we look for the functions where the output results in “1”
while in Maxterm we look for function where the output results in “0”.
We perform Sum of minterm also known as Sum of products (SOP) .
We perform Product of Maxterm also known as Product of sum (POS).
Boolean functions expressed as a sum of minterms or product of
maxterms are said to be in canonical form.
Boolean Function Representations
Standard Form – A Boolean variable can be expressed in either
true form or complemented form. In standard form Boolean
function will contain all the variables in either true form or
complemented form while in canonical number of variables
depends on the output of SOP or POS.
A Boolean function can be expressed algebraically from a given
truth table by forming a :

1) Minterm for each combination of the variables that produces

a 1 in the function and then taking the AND of all those terms.
2) Maxterm for each combination of the variables that produces
a 0 in the function and then taking the OR of all those terms.
Truth table representing minterm and
maxterm
• Example – Express the Boolean function F = A + B’C as standard sum
of minterms.
• A = A(B + B’) = AB + AB’
This function is still missing one variable, so
A = AB(C + C’) + AB'(C + C’) = ABC + ABC’+ AB’C + AB’C’
The second term B’C is missing one variable; hence,
B’C = B’C(A + A’) = AB’C + A’B’C
Combining all terms, we have
F = A + B’C = ABC + ABC’ + AB’C + AB’C’ + AB’C + A’B’C
But AB’C appears twice, and
according to theorem 1 (x + x = x), it is possible to remove one of
those occurrences. Rearranging the minterms in ascending order, we
finally obtain
F = A’B’C + AB’C’ + AB’C + ABC’ + ABC
= m1 + m4 + m5 + m6 + m7
SOP is represented as ∑(1, 4, 5, 6, 7)
• Example – Express the Boolean function F = xy + x’z as a product
of maxterms
• Solution –
F = xy + x’z
= (xy + x’)(xy + z)
= (x + x’)(y + x’)(x + z)(y + z)
= (x’ + y)(x + z)(y + z)
x’ + y = x’ + y + zz’
= (x’+ y + z)(x’ + y + z’) x + z
= x + z + yy’
= (x + y + z)(x + y’ + z) y + z
= y + z + xx’
= (x + y + z)(x’ + y + z)
F = (x + y + z)(x + y’ + z)(x’ + y + z)(x’ + y + z’)
= M0*M2*M4*M5
• POS is represented as π(0, 2, 4, 5)
• Example – F(A, B, C) = Sigma(1, 4, 5, 6, 7)
F'(A, B, C) = Sigma(0, 2, 3) = m0 + m2 + m3
Now, if we take the complement of F’ by DeMorgan’s theorem,
we obtain F in a different form:
F = (m0 + m2 + m3)’
= m0’m2’m3′
= M0*M2*M3
= PI(0, 2, 3)
• Example – Convert Boolean expression in standard form
F=y’+xz’+xyz
• Solution – F = (x+x’)y'(z+z’)+x(y+y’)z’ +xyz
F = xy’z+ xy’z’+x’y’z+x’y’z’+ xyz’+xy’z’+xyz
 Digital Circuits - K-Map Method

• Previously, we have simplified the Boolean

functions using Boolean postulates and theorems. It
is a time consuming process and we have to re-
write the simplified expressions after each step.
• To overcome this difficulty, Karnaugh introduced a
method for simplification of Boolean functions in an
easy way. This method is known as Karnaugh map
method or K-map method. It is a graphical method,
which consists of 2n cells for ‘n’ variables. The
adjacent cells are differed only in single bit position.
 K-Maps for 2 Variables

• 2 Variable K-Map
• The number of cells in 2 variable K-map is four,
since the number of variables is two. The
following figure shows 2 variable K-Map.
• here is only one possibility of grouping 4
adjacent min terms.
• The possible combinations of grouping 2
adjacent min terms are {(m0, m1), (m2, m3),
(m0, m2) and (m1, m3)}.
 2-Variable Map -- Example
• f(x1,x2) = x1’x2’+ x1’x2 + x1x2’
= m0 + m 1 + m 2
= x1 ’ + x 2 ’ x2
• 1s placed in K-map for specified
minterms m0, m1, m2 x1 0 1
• Grouping (ORing) of 1s allows 0 1
simplification
• What (simpler) function is 0 1 1
represented by each dashed
2 3
rectangle?
– x1 ’ = m 0 + m 1 1 1 0
– x2 ’ = m 0 + m 2
• Note m0 covered twice
 3 variable K-Map.

• 3 Variable K-Map
• The number of cells in 3 variable K-map is
eight, since the number of variables is three.
The following figure shows 3 variable K-Map.
 Three-Variable Map (cont.)
minterm

The types of structures that are

either minterms or are
generated by repeated
application of the minimization
theorem on a three variable map
are shown at right.
Groups of 1, 2, 4, 8 are possible.

group of 2 terms

group of 4 terms
 Simplification
• Enter minterms of the Boolean function into
the map, then group terms
• Example: f(a,b,c) = a’c + abc + bc’
• Result: f(a,b,c) = a’c+ b
abc
1 1 1
1 1
1 1 1
1 1
 More Examples
yz
X 00 01 11 10

• f1(x, y, z) = ∑ m(2,3,5,7) 0 1 1
1 1 1
 f1(x, y, z) = x’y + xz

• f2(x, y, z) = ∑ m (0,1,2,3,6)
1 1 1 1
f (x, y, z) = x’+yz’
2 1
• There is only one possibility of grouping 8 adjacent min
terms.
• The possible combinations of grouping 4 adjacent min
terms are {(m0, m1, m3, m2), (m4, m5, m7, m6), (m0, m1, m4,
m5), (m1, m3, m5, m7), (m3, m2, m7, m6) and (m2, m0, m6, m4)}.
• The possible combinations of grouping 2 adjacent min
terms are {(m0, m1), (m1, m3), (m3, m2), (m2, m0), (m4, m5),
(m5, m7), (m7, m6), (m6, m4), (m0, m4), (m1, m5), (m3, m7) and
(m2, m6)}.
• If x=0, then 3 variable K-map becomes 2 variable K-map.
 4 Variable K-Map

• The number of cells in 4 variable K-map is

sixteen, since the number of variables is four.
The following figure shows 4 variable K-Map.
 Four-variable Map Simplification
• One square represents a minterm of 4 literals.
• A rectangle of 2 adjacent squares represents a
product term of 3 literals.
• A rectangle of 4 squares represents a product term of
2 literals.
• A rectangle of 8 squares represents a product term of
1 literal.
• A rectangle of 16 squares produces a function that is
equal to logic 1.
 Example
• Simplify the following Boolean function (A,B,C,D) =
∑m(0,1,2,4,5,7,8,9,10,12,13).
• First put the function g( ) into the map, and then
group as many 1s as possible.
ab cd

1 1 1 1 1 1

1 1 1 1 1 1

1 1 1 1

1 1 1 1 1 1

g(A,B,C,D) = c’+b’d’+a’bd
• There is only one possibility of grouping 16 adjacent min
terms.
• Let R1, R2, R3 and R4 represents the min terms of first row,
second row, third row and fourth row respectively.
Similarly, C1, C2, C3 and C4 represents the min terms of
first column, second column, third column and fourth
column respectively. The possible combinations of
grouping 8 adjacent min terms are {(R 1, R2), (R2, R3), (R3,
R4), (R4, R1), (C1, C2), (C2, C3), (C3, C4), (C4, C1)}.
• If w=0, then 4 variable K-map becomes 3 variable K-map.
 Don't Care Conditions
• There may be a combination of input values which
– will never occur
– if they do occur, the output is of no concern.
• The function value for such combinations is called a don't
care.
• They are denoted with x or –. Each x may be arbitrarily
assigned the value 0 or 1 in an implementation.
• Don’t cares can be used to further simplify a function
 Minimization using Don’t Cares
• Treat don't cares as if they are 1s to generate
PIs.
• Delete PI's that cover only don't care
minterms.
• Treat the covering of remaining don't care
minterms as optional in the selection process
(i.e. they may be, but need not be, covered).
 cd
ab 00 01 11 10
Example 00 0 1 0 1
01 1 1 0 1
• Simplify the function f(a,b,c,d) 11 0 0 x x
10 1 1 x x
whose K-map is shown at the
right. 0 1 0 1
• f = a’c’d+ab’+cd’+a’bc’ 1 1 0 1
0 0 x x
or 1 1 x x
• f = a’c’d+ab’+cd’+a’bd’
0 1 0 1
1 1 0 1
0 0 x x
1 1 x x
 cd
Another Example ab
x 1 0 0
1 x 0 x
• Simplify the function 1 x x 1

g(a,b,c,d) whose K-map is 0 x x 0

shown at right. x 1 0 0
• g = a’c’+ ab 1 x 0 x
1 x x 1
or
0 x x 0
• g = a’c’+b’d
x 1 0 0
1 x 0 x
1 x x 1
0 x x 0
 More Logic Gates

• NAND and NOR Gates

– NAND and NOR circuits
– Two-level Implementations
– Multilevel Implementations
• Exclusive-OR (XOR) Gates
– Odd Function
– Parity Generation and Checking
 More Logic Gates
• We can construct any combinational circuit with
AND, OR, and NOT gates

• Additional logic gates are used for practical reasons

BUFFER, NAND and NOR
 NAND Gate
• Known as a “universal” gate because ANY
digital circuit can be implemented with NAND
gates alone.
• To prove the above, it suffices to show that
AND, OR, and NOT can be implemented using
NAND gates only.
 NAND Gate Emulation
F = (X•X)’ X F = X’
X
= X’+X’
= X’

X X F X•Y
F = ((X•Y)’)’
Y Y
= (X’+Y’)’
= X’’•Y’’
= X•Y
X X
F = (X’•Y’)’ F = X+Y
= X’’+Y’’
Y Y
= X+Y
 NAND Circuits
• To easily derive a NAND implementation of a
boolean function:
– Find a simplified SOP
– SOP is an AND-OR circuit
– Change AND-OR circuit to a NAND circuit
– Use the alternative symbols below
 AND-OR (SOP) Emulation
Using NANDs

Two-level implementations

a) Original SOP
b) Implementation with NANDs
 AND-OR (SOP) Emulation
Using NANDs (cont.)

Verify:
(a) G = WXY + YZ
(b) G = ( (WXY)’ • (YZ)’ )’
= (WXY)’’ + (YZ)’’ = WXY + YZ
 SOP with NAND

(a) Original SOP

(b) Double inversion and grouping AND-NOT
(c) Replacement with NANDs
NOT-OR
 Two-Level NAND Gate Implementation -
Example

F (X,Y,Z) = m(0,6)
1. Express F in SOP form:
F = X’Y’Z’ + XYZ’
2. Obtain the AND-OR implementation for F.
3. Add bubbles and inverters to transform AND-
OR to NAND-NAND gates.
 Example (cont.)

Two-level implementation with NANDs

F = X’Y’Z’ + XYZ’
 Multilevel NAND Circuits
Starting from a multilevel circuit:
1. Convert all AND gates to NAND gates with AND-NOT
graphic symbols.
2. Convert all OR gates to NAND gates with NOT-OR
graphic symbols.
3. Check all the bubbles in the diagram. For every
bubble that is not counteracted by another bubble
along the same line, insert a NOT gate or
complement the input literal from its original
appearance.
 Example
Use NAND gates
and NOT gates to
implement
Z=E’F(AB+C’+D’)+GH
AB
AB+C’+D’
E’F(AB+C’+D’)
E’F(AB+C’+D’)+GH
Yet Another Example!
 NOR Gate
• Also a “universal” gate because ANY digital
circuit can be implemented with NOR gates
alone.
• This can be similarly proven as with the NAND
gate.
 NOR Circuits
• To easily derive a NOR implementation of a boolean
function:
– Find a simplified POS
– POS is an OR-AND circuit
– Change OR-AND circuit to a NOR circuit
– Use the alternative symbols below
 Two-Level NOR Gate Implementation -
Example
F(X,Y,Z) = m(0,6)
1. Express F’ in SOP form:
1. F’ = m(1,2,3,4,5,7)
= X’Y’Z + X’YZ’ + X’YZ + XY’Z’ + XY’Z + XYZ
2. F’ = XY’ + X’Y + Z
2. Take the complement of F’ to get F in the POS form:
F = (F’)' = (X'+Y)(X+Y')Z'
3. Obtain the OR-AND implementation for F.
4. Add bubbles and inverters to transform OR-AND
implementation to NOR-NOR implementation.
 Example (cont.)

Two-level implementation with NORs

F = (F’)' = (X'+Y)(X+Y')Z'
 XOR and XNOR
X Y F = XY
XOR: “not-equal” gate 0 0 0
0 1 1
X F 1 0 1
Y 1 1 0

X Y F = XY
XNOR: “equal” gate 0 0 1
0 1 0
X F
1 0 0
Y 1 1 1
 Exclusive-OR (XOR) Function
• XOR (also ) : the “not-equal” function
• XOR(X,Y) = X  Y = X’Y + XY’
• Identities:
– X0=X
– X  1 = X’
– XX=0
– X  X’ = 1
• Properties:
– XY=YX
– (X  Y)  W = X  ( Y  W)
 XOR function implementation
• XOR(a,b) = ab’ + a’b
• Straightforward: 5 gates
– 2 inverters, two 2-input ANDs, one 2-input OR
– 2 inverters & 3 2-input NANDs
• Nonstraightforward:
– 4 NAND gates
XOR circuit with 4 NANDs