Unit 4

IntroductIon to 8085 Assembly

lAnguAge progrAmmIng
Microprocessor - Overview
Microprocessor is a controlling unit of a micro-computer, fabricated on a small
chip capable of performing ALU (Arithmetic Logical Unit) operations and
communicating with the other devices connected to it.
Microprocessor consists of an ALU, register array, and a control unit. ALU performs
arithmetical and logical operations on the data received from the memory or an
input device. Register array consists of registers identified by letters like B, C, D, E,
H, L and accumulator. The control unit controls the flow of data and instructions
within the computer.

Block Diagram of a Basic Microcomputer

Image of 8085 Microprocessor:

Introduction:
The 8085 microprocessor is an 8-bit microprocessor that was developed by Intel
in the mid-1970s. It was widely used in the early days of personal computing and
was a popular choice for hobbyists and enthusiasts due to its simplicity and ease
of use. The architecture of the 8085 microprocessor consists of several key
components, including the accumulator, registers, program counter, stack pointer,
instruction register, flags register, data bus, address bus, and control bus.
The accumulator is an 8-bit register that is used to store arithmetic and logical
results. It is the most commonly used register in the 8085 microprocessor and is
used to perform arithmetic and logical operations such as addition, subtraction,
and bitwise operations.
It has the following configuration −
• 8-bit data bus
• 16-bit address bus, which can address up to 64KB
•A 16-bit program counter
•A 16-bit stack pointer
• Six 8-bit registers arranged in pairs: BC, DE, HL
• Requires +5V supply to operate at 3.2 MHZ single phase clock
It is used in washing machines, microwave ovens, mobile phones, etc.
***8085 Microprocessor – Functional Units
8085 consists of the following functional units −
Accumulator
It is an 8-bit register used to perform arithmetic, logical, I/O & LOAD/STORE
operations. It is connected to internal data bus & ALU.
Arithmetic and logic unit
As the name suggests, it performs arithmetic and logical operations like Addition,
Subtraction, AND, OR, etc. on 8-bit data.
General purpose register
There are 6 general purpose registers in 8085 processor, i.e. B, C, D, E, H & L. Each
register can hold 8-bit data.
These registers can work in pair to hold 16-bit data and their pairing combination
is like B-C, D-E & H-L.
Program counter
It is a 16-bit register used to store the memory address location of the next
instruction to be executed. Microprocessor increments the program whenever an
instruction is being executed, so that the program counter points to the memory
address of the next instruction that is going to be executed.
Stack pointer
It is also a 16-bit register works like stack, which is always
incremented/decremented by 2 during push & pop operations.
Temporary register
It is an 8-bit register, which holds the temporary data of arithmetic and logical
operations.
Flag register
It is an 8-bit register having five 1-bit flip-flops, which holds either 0 or 1
depending upon the result stored in the accumulator.
These are the set of 5 flip-flops −
• Sign (S)
• Zero (Z)
• Auxiliary Carry (AC)
• Parity (P)
• Carry (C)
Its bit position is shown in the following table −

D7 D6 D5 D4 D3 D2 D1 D0 S Z AC P CY

Instruction register and decoder

It is an 8-bit register. When an instruction is fetched from memory then it is stored
in the Instruction register. Instruction decoder decodes the information present in
the Instruction register.
Timing and control unit
It provides timing and control signal to the microprocessor to perform operations.
Following are the timing and control signals, which control external and internal
circuits −
• Control Signals: READY, RD’, WR’, ALE
• Status Signals: S0, S1, IO/M’
• DMA Signals: HOLD, HLDA
• RESET Signals: RESET IN, RESET OUT
Interrupt control
As the name suggests it controls the interrupts during a process. When a
microprocessor is executing a main program and whenever an interrupt occurs,
the microprocessor shifts the control from the main program to process the
incoming request. After the request is completed, the control goes back to the
main program.
There are 5 interrupt signals in 8085 microprocessor: INTR, RST 7.5, RST 6.5, RST
5.5, TRAP.
Serial Input/output control
It controls the serial data communication by using these two instructions: SID
(Serial input data) and SOD (Serial output data).
Address buffer and address-data buffer
The content stored in the stack pointer and program counter is loaded into the
address buffer and address-data buffer to communicate with the CPU. The
memory and I/O chips are connected to these buses; the CPU can exchange the
desired data with the memory and I/O chips.
Address bus and data bus
Data bus carries the data to be stored. It is bidirectional, whereas address bus
carries the location to where it should be stored and it is unidirectional. It is used
to transfer the data & Address I/O devices.

***Pin Configuration
 Fig: Pin diagram of Intel 8085 microprocessor

The descriptions of various pins are as follows:

Address Bus and Data Bus
o A8 : A15 (Output): These are address bus and are used for the most
significant bits of the memory address or 8-bits of I/O address.
o AD0 : AD7 (Input/output): These are time multiplexed address/data bus i.e.
they serve dual purpose. They are used for the least significant 8 bits of the
memory address or I/O address during the first cycle. Again they are used
for data during 2nd and 3rd clock cycles.
Control and Status Signals
oALE (Output): ALE stands for Address Latch Enable signal. ALE goes high
during first clock cycle of a machine cycle and enables the lower 8-bits of
the address to be latched either into the memory or external latch.
o IO/M (Output): It is a status signal which distinguishes whether the address
is for memory or I/O device. It is low active pin. When it is high indicates IO
operation and when it is low then it indicates memory operation.
 o S0, S1 (Output): These are status signals sent by the microprocessors to
distinguish the various types of operation given in table below:
Status codes for Intel 8085
S1 S0 Operations

0 0 HALT

0 1 WRITE

1 0 READ

1 1 FETCH

o RD (Output): RD is a signal to control READ operation. When it goes low,

the selected I/O device or memory is read.
o WR (Output): WR is a signal to control WRITE operation. When it goes low,
the data bus’s data is written into the selected memory or I/O location.
o READY (Input): It is used by the microprocessor to sense whether a
peripheral is ready to transfer a data or not. If READY is high, the peripheral
is ready. If it is low the microprocessor waits till it goes high.
Interrupts and Externally Initiated Signals
o HOLD (INPUT): HOLD indicates that another device is requesting for the use
of the address and data bus.
o HLDA (OUTPUT): HLDA is a signal for HOLD acknowledgement which
indicates that the HOLD request has been received. After the removal of
this request the HLDA goes low.
o INTR (Input): INTR is an Interrupt Request Signal. Among interrupts it has
the lowest priority. The INTR is enabled or disabled by software.
o INTA (Output): INTA is an interrupt acknowledgement sent by the
microprocessor after INTR is received.
o RST 5.5, 6.5, 7.5 and TRAP (Inputs): These all are interrupts. When any
interrupt is recognized the next instruction is executed from a fixed location
in the memory as given below:
 Line Location from which next instruction is picked up

TRAP 0024

RST 5.5 002C

RST 6.5 0034

RST 7.5 003C

RST 7.5, RST 6.5 and RST 5.5 are the restart interrupts which cause an internal
restart to be automatically inserted.
The TRAP has the highest priority among interrupts. The order of priority of
interrupts is as follows:
o TRAP (Highest priority)

o RST 7.5
o RST 6.5
o RST 5.5
o INTR (Lowest priority).
Reset Signals
o RESET IN (Input): It resets the program counter (PC) to 0. It also resets
interrupt enable and HLDA flip-flops. The CPU is held in reset condition till
RESET is not applied.
o RESET OUT (Output): RESET OUT indicates that the CPU is being reset.
Clock Signals

o X1, X2 (Input): X1 and X2 are terminals to be connected to an external

crystal oscillator which drives an internal circuitry of the microprocessor. It
is used to produce a suitable clock for the operation of microprocessor.
o CLK (Output): CLK is a clock output for user, which can be used for other
digital ICs. Its frequency is same at which processor operates.
Serial I/O Signals
 o SID (Input): SID is data line for serial input. The data on this line is loaded
into the seventh bit of the accumulator when RIM instruction is
executed.
o SOD (Output): SOD is a data line for serial output. The seventh bit of the
accumulator is output on SOD line when SIM instruction is executed.
Power Supply
Vcc : +5 Vlots supply
Vss : ground reference
Dr. N. Karuppiah & Dr. S. Ravivarman

1.5 Instruction Set

The 8085 instruction set can be classified into the following five functional
headings.
Data Transfer Instructions: Includes the instructions that moves (copies)
data between registers or between memory locations and registers. In all data
transfer operations, the content of source register is not altered. Hence the data
transfer is copying operation.
Arithmetic Instructions: Includes the instructions, which performs the
addition, subtraction, increment or decrement operations. The flag conditions
are altered after execution of an instruction in this group.
Logical Instructions: The instructions which performs the logical
operations like AND, OR, EXCLUSIVE-OR, complement, compare and rotate
instructions are grouped under this heading. The flag conditions are altered
after execution of an instruction in this group.
Branching Instructions: The instructions that are used to transfer the
program control from one memory location to another memory location are
grouped under this heading.
Machine Control Instructions: Includes the instructions related to
interrupts and the instruction used to halt program execution.

1.6 Data Transfer Instructions

∙ These instructions move data between registers, or between memory
and registers.
∙ These instructions copy data from source to destination.
∙ While copying, the contents of source are not modified.
Opcode Operand Description

MOV Rd, Rs Copy from source to destination.

M, Rs
Rd, M

MVI Rd, Data Move immediate 8-bit

M, Data
 LDA 16-bit address Load Accumulator

LDAX B/D Register Pair Load accumulator indirect

LXI Reg. pair, 16-bit data Load register pair immediate

STA 16-bit address Store accumulator direct

STAX Reg. pair Store accumulator indirect

XCHG None Exchange H-L with D-E

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Microprocessor and
Microcontroller
1.7 Arithmetic Instructions

These instructions perform arithmetic operations such as addition,

subtraction, increment, and decrement.
Opcode Operand Description

ADD R Add register or memory to accumulator

M

ADC R Add register or memory to accumulator with carry

M

ADI 8-bit data Add immediate to accumulator

ACI 8-bit data Add immediate to accumulator with carry

SUB R Subtract register or memory from accumulator

M

SUI 8-bit data Subtract immediate from accumulator

INR R Increment register or memory by 1

M

INX R Increment register pair by 1

DCR R Decrement register or memory by 1

M

DCX R Decrement register pair by 1

1.8 Logical Instructions

These instructions perform various logical operations with the contents of
the accumulator.
Opcode Operand Description
 CMP R Compare register or memory with accumulator
M

CMP R Compare register or memory with accumulator

M

CPI 8-bit data Compare immediate with accumulator

ANA R Logical AND register or memory with accumulator

M

ANI 8-bit data Logical AND immediate with accumulator

XRA R Exclusive OR register or memory with accumulator

M

ORA R Logical OR register or memory with accumulator

M

ORI 8-bit data Logical OR immediate with accumulator

XRA R Logical XOR register or memory with accumulator

M

XRI 8-bit data XOR immediate with accumulator

13
Dr. N. Karuppiah & Dr. S. Ravivarman

1.9 Branching Instructions

This group of instructions alters the sequence of program execution either
conditionally or unconditionally.
Opcode Operand Description

JMP 16-bit address Jump unconditionally

Jx 16-bit address Jump conditionally

1.10 Machine Control Instructions

These instructions control machine functions such as Halt, Interrupt, or do
nothing.
Opcode Operand Description

HLT None Halt

NOP None No operation

EI None The interrupt enable flip-flop is set and all interrupts

are enabled. No flags are affected.
 DI None The interrupt enable flip-flop is reset and all the
interrupts except the TRAP are disabled. No flags are
affected.

SIM None This is a multipurpose instruction and used to implement

the 8085 interrupts 7.5, 6.5, 5.5, and serial data output.

RIM None This is a multipurpose instruction used to read the status

of interrupts 7.5, 6.5, 5.5 and read serial data input bit.

Fig. 1.4 SIM Instruction

Fig. 1. 5 RIM Instruction

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Microprocessor and Microcontroller

1.11 Addressing Modes

Every instruction of a program has to operate on a data. The method of
specifying the data to be operated by the instruction is called Addressing. The
8085 has the following 5 different types of addressing.
∙ Immediate Addressing
∙ Direct Addressing
∙ Register Addressing
∙ Register Indirect Addressing
∙ Implied Addressing

Immediate Addressing
In immediate addressing mode, the data is specified in the instruction itself.
The data will be a part of the program instruction.
EX. MVI B, 3EH - Move the data 3EH given in the instruction to B register;
LXI SP, 2700H.

Direct Addressing
 In direct addressing mode, the address of the data is specified in the
instruction. The data will be in memory. In this addressing mode, the program
instructions and data can be stored in different memory.
EX. LDA 1050H - Load the data available in memory location 1050H in to
accumulator; SHLD 3000H

Register Addressing
In register addressing mode, the instruction specifies the name of the
register in which the data is available.
EX. MOV A, B - Move the content of B register to A register; SPHL; ADD C.

Register Indirect Addressing

In register indirect addressing mode, the instruction specifies the name of
the register in which the address of the data is available. Here the data will be in
memory and the address will be in the register pair.
EX. MOV A, M - The memory data addressed by H L pair is moved to A
register. LDAX B.

Implied Addressing
In implied addressing mode, the instruction itself specifies the data to be
operated. EX. CMA - Complement the content of accumulator; RAL

15
***Branching instructions in 8085 micro-processor
Branching instructions refer to the act of switching execution to a different
instruction sequence as a result of executing a branch instruction.
The three types of branching instructions are:

1. Jump (unconditional and conditional)

2. Call (unconditional and conditional)

3. Return (unconditional and conditional)

1. Jump Instructions – The jump instruction transfers the program sequence to

the memory address given in the operand based on the specified flag. Jump
instructions are 2 types: Unconditional Jump Instructions and Conditional Jump
Instructions.
(a) Unconditional Jump Instructions: Transfers the program sequence to the
described memory address.
 OPCOD OPERAND EXPLANATION EXAMPLE
E
JMP address Jumps to the address JMP 2050

(b) Conditional Jump Instructions: Transfers the program sequence to the

described memory address only if the condition in satisfied.

OPCOD OPERAND EXPLANATION EXAMPLE

E
JC address Jumps to the address if carry flag is 1 JC 2050

JNC address Jumps to the address if carry flag is 0 JNC 2050

JZ address Jumps to the address if zero flag is 1 JZ 2050

JNZ address Jumps to the address if zero flag is 0 JNZ 2050

JPE address Jumps to the address if parity flag is 1 JPE 2050

JPO address Jumps to the address if parity flag is 0 JPO 2050

 JM address Jumps to the address if sign flag is 1 JM 2050

JP address Jumps to the address if sign flag 0 JP 2050

2. Call Instructions – The call instruction transfers the program sequence to the
memory address given in the operand. Before transferring, the address of the next
instruction after CALL is pushed onto the stack. Call instructions are 2 types:
Unconditional Call Instructions and Conditional Call Instructions.
(a) Unconditional Call Instructions: It transfers the program sequence to the
memory address given in the operand.
OPCOD OPERAND EXPLANATION EXAMPLE
E
CALL address Unconditionally calls CALL 2050

(b) Conditional Call Instructions: Only if the condition is satisfied, the instructions
execute.
OPCOD OPERAND EXPLANATION EXAMPLE
E
CC address Call if carry flag is 1 CC 2050

CNC address Call if carry flag is 0 CNC 2050

CZ address Calls if zero flag is 1 CZ 2050

CNZ address Calls if zero flag is 0 CNZ 2050

CPE address Calls if parity flag is 1 CPE 2050

CPO address Calls if parity flag is 0 CPO 2050

 OPCOD OPERAND EXPLANATION EXAMPLE
E
CM address Calls if sign flag is 1 CM 2050

CP address Calls if sign flag is 0 CP 2050

3. Return Instructions – The return instruction transfers the program sequence

from the subroutine to the calling program. Return instructions are 2 types:
Unconditional Jump Instructions and Conditional Jump Instructions.
(a) Unconditional Return Instruction: The program sequence is transferred
unconditionally from the subroutine to the calling program.
OPCOD OPERAND EXPLANATION EXAMPLE
E
RET none Return from the subroutine unconditionally RET

(b) Conditional Return Instruction: The program sequence is transferred

unconditionally from the subroutine to the calling program only is the condition is
satisfied.
OPCOD OPERAND EXPLANATION EXAMPLE
E
RC none Return from the subroutine if carry RC
flag is 1

RNC none Return from the subroutine if carry RNC

flag is 0

RZ none Return from the subroutine if zero RZ

flag is 1
 OPCOD OPERAND EXPLANATION EXAMPLE
E
RNZ none Return from the subroutine if zero RNZ
flag is 0

RPE none Return from the subroutine if RPE

parity flag is 1

RPO none Return from the subroutine if RPO

parity flag is 0

RM none Returns from the subroutine if sign RM

flag is 1

RP none Returns from the subroutine if sign RP

flag is 0

***Types of Instruction based on Word Size in 8085 Microprocessor

"Word size" refers to the number of bits processed by a computer's CPU in one
go (these days, typically 32 bits or 64 bits).
The 8085-instruction set is classified into 3 categories by considering the length of
the instructions. In 8085, the length is measured in terms of “byte” rather than
“word” because 8085 microprocessor has 8-bit data bus. Three types of
instruction are: 1-byte instruction, 2-byte instruction, and 3-byte instruction.
1. One-byte instructions –
In 1-byte instruction, the opcode and the operand of an instruction are
represented in one byte.
• Example-1:
Task- Copy the contents of accumulator in register B.
Mnemonic- MOV B, A Opcode- MOV
Binary code- 0100 0111
Operand- B, A MOV B, A

Hex Code- 47H

01000111

• Example-2: Task- Add the contents of accumulator to the contents of

register B.
Mnemonic- ADD B
Opcode- ADD
Operand- B
Hex Code- 80H
Binary code- 1000 0000
• Example-3: Task- Invert (complement) each bit in the accumulator.
Mnemonic- CMA

Opcode- CMA
Operand- NA
Hex Code- 2FH
Binary code- 0010 1111
Note – The length of these instructions is 8-bit; each requires one memory
location. The mnemonic is always followed by a letter (or two letters) representing
the registers (such as A, B, C, D, E, H, L and SP).
2. Two-byte instructions –
Two-byte instruction is the type of instruction in which the first 8 bits indicates the
opcode and the next 8 bits indicates the operand.
• Example-1: Task- Load the hexadecimal data 32H in the accumulator.
Mnemonic- MVI A, 32H
Opcode- MVI
Operand- A, 32H
Hex Code- 3E
32
Binary code- 0011 1110
0011 0010
• Example-2: Task- Load
the hexadecimal data F2H
in the register B.
Mnemonic- MVI B, F2H

Opcode- MVI
Operand- B, F2H
Hex Code- 06
F2
Binary code- 0000 0110
1111 0010
Note – This type of instructions need two bytes to store the binary codes. The
mnemonic is always followed by 8-bit (byte) data.
3. Three-byte instructions –
Three-byte instruction is the type of instruction in which the first 8 bits indicates
the opcode and the next two bytes specify the 16-bit address. The low-order
address is represented in second byte and the high-order address is represented
in the third byte.
• Example-1: Task- Load contents of memory 2050H in the accumulator.
Mnemonic- LDA 2050H

Opcode- LDA Operand- 2050H Hex

LDA 50 20
Code- 3A
50
20
Binary code- 0011 1010
0101 0000
0010 0000
• Example-2: Task- Transfer the program sequence to the memory location
 2050H.
Mnemonic- JMP 2085H
Opcode- JMP Binary code- 1100 0011 1000
Operand- 2085H 0101
Hex Code- C3 0010 0000
85 JMP 85 20

20

Programming in 8085
Store 8-bit data in memory
Program
Store 8-bit data in memory using direct addressing
1. MVI A, 49H : "Store 49H in the accumulator"
2. STA 2501H : "Copy accumulator contents at address 2501H" 3.
HLT : "Stop"

Store 8-bit data in memory using indirect addressing

1. LXI H : "Load H-L pair with 2501H"
2. MVI M : "Store 49H in memory location pointed by H L
register pair (2501H)"
3. HLT : "Stop"
Add two 8-bit numbers
Example
(2501 H) = 99H
(2502 H) = 39H
Result (2503 H) = 99H + 39H = D2H
Since,
1 0 0 1 1 0 0 1 (99H)
+ 0 0 1 1 1 0 0 1 (39H)
1 1 0 1 0 0 1 0 (D2H)

Program
1. LXI H, 2501H : "Get address of first number in H-L pair. Now H
L points to 2501H"
2. MOV A, M : "Get first operand in accumulator"
3. INX H : "Increment content of H-L pair. Now, H-L points 2502H" 4.
ADD M : "Add first and second operand"

5. INX H : "H-L points 4002H"

6. MOV M, A : "Store result at 2503H"
7. HLT : "Stop"