AN3213

Getting Started with SAMRH71F20 Microcontroller Using

MPLAB-X and Harmony Framework

Introduction
® ®
This application note introduces you to the programming of the Radiation-Hardened Microchip Arm Cortex -M7
based SAMRH71F20 microcontroller using MPLAB-X IDE and Harmony Framework software tools.
It details a simple project taken from the Harmony examples library.
After going through this document, you must be able to successfully start a new project.

Prerequisite
To use this document efficiently, prior knowledge of SAMRH71 Datasheet and ARM Cortex-M7 Processor Technical
Reference Manual (describes the core registers separately) is helpful.

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Table of Contents
Introduction.....................................................................................................................................................1
1. Prerequisite.................................................................................................................................. 1

1. System Requirements.............................................................................................................................3
1.1. Hardware......................................................................................................................................3
1.2. Software....................................................................................................................................... 4
1.3. Serial Port Connection................................................................................................................. 4

2. Getting Started........................................................................................................................................ 5
2.1. Project Example Structure............................................................................................................5
2.2. Harmony Framework Structure.................................................................................................. 11

3. References............................................................................................................................................22

4. Revision History.................................................................................................................................... 23

The Microchip Website.................................................................................................................................24

Product Change Notification Service............................................................................................................24

Customer Support........................................................................................................................................ 24

Microchip Devices Code Protection Feature................................................................................................ 24

Legal Notice................................................................................................................................................. 25

Trademarks.................................................................................................................................................. 25

Quality Management System....................................................................................................................... 26

Worldwide Sales and Service.......................................................................................................................27

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System Requirements

1. System Requirements
Ensure that the cross-development environment is setup. For more information on its setup, see Getting Started with
SAMRH71F20 Evaluation Kit.
The following figure shows the cross-development environment.
Figure 1-1. SAMRH71F20 Development Environment

1.1 Hardware
The hardware requirements are:
• Computer with Windows OS
• One SAMRH71F20 evaluation kit (P/N: SAMRH71F20-EK)
• One 12 V-500 mA power supply
• One programmer/debugger device among the following ones:
– J32 programmer/debugger (P/N: DV164232)
Figure 1-2. J32 Programmer/Debugger (P/N: DV164232)

– ICD 4 In-Circuit Debugger (P/N: DV164045)

Figure 1-3. ICD 4 In-Circuit Debugger (P/N: DV164045)

– PICkit 4 In-Circuit Debugger (P/N: PG164140)

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Figure 1-4. PICkit 4 In-Circuit Debugger (P/N: PG164140)

The devices can be used with the following adapter.

• Debugger Adapter Board (P/N: AC102015)
Figure 1-5. Debugger Adapter Board (P/N: AC102015)

1.2 Software
This document has been developed using Windows Operating System. For Linux, MPLAB-X appears the same, but
any references to Windows tools, procedures and, directories differ.
The following software must be installed.
• MPLAB-X Integrated Development Environment
• MPLAB XC32/32++ Compiler
• MPLAB Harmony 3
The following package must be installed to use the Virtual COM port on the USB interface:
• CP210x_Universal_Windows_Driver

1.3 Serial Port Connection

A serial port is necessary to display the debug information (and typed input) in the terminal window on the PC.
Install the USB-to-UART Bridge VCP Driver, open a Serial Terminal like PuTTY, and apply the following COM
settings:
• 115200 baud rate
• Eight bits of data
• One stop bit
• No parity
• No flow control

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2. Getting Started
This section is composed of two sub-sections:
• The 2.1 Project Example Structure section further explores the PIO project that uses several important features
present on the device.
• The 2.2 Harmony Framework Structure section explains how to use Harmony Configurator for modifying the
project.

2.1 Project Example Structure

This section explains how the pio_led_on_off_interrupt project example, supplied in the Harmony
Framework, is structured.

2.1.1 Features
The demonstration program turns on the LED on the board when the user presses the dedicated button. This
switching takes place through an interrupt that is assigned to the push-button.
While this software may appear basic, it uses several peripherals, so it serves as a good starting point for introducing
the user with SAMRH71F20.

2.1.2 Peripherals
To perform the operations, the software example uses the following set of peripherals.
• Parallel Input/Output (PIO) controller
• Nested Vectored Interrupt Controller (NVIC)
LEDs and buttons on the board are connected to standard input/output pins of the chip, which are managed by the
chip’s PIO controller. The controller can generate an interrupt on a pin state change, which is used with the push
button.
Using the NVIC is required to manage interrupts. It allows the configuration of a separate vector for each source. A
function is used to handle the PIO interrupt.

2.1.3 Booting
The SAMRH71F20 device features 128 Kbytes of embedded Flash and more than 1 Mbyte of internal SRAM. User
applications can be compiled and downloaded to both memories. However, the example code support files have
been prepared only for downloading into the Flash.

2.1.4 LEDs
There are four general-purpose LEDs (green): LED3 (PF20), LED2 (PF19), LED1 (PB23), and LED0 (PB19). These
are toggled by driving their respective I/O lines. The example code toggles only LED0.

2.1.5 Push Buttons

There are three push buttons on the board, connected to I/O lines: PB2 (PC31), PB1 (PC30), and PB0 (PC29). The
example code employs only PB0 for switching LED0 on and off.

2.1.6 Implementation

[Link] Initialization Before main()

Most of the code of the embedded application is written in C. This makes the program easier to understand, more
portable and, modular.
Before the execution of the application code, following initializations (handled by MPLAB) happen.
1. Provides exception vectors
2. Initializes critical peripherals

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3. Initializes memory segments

The following example lists the overall sequence of events. The initialization requirements are described in the
following sections.

Example 2-1. Reset_Handler Initialization Process Flow

1. Calls the optional appl-provided _on_reset() function
2. Enables FPU if -mfloat-abi=softfp or -mfloat-abi=hard
3. Initializes TCM ECC
4. Initializes FlexRAM ECC
5. Initializes data
6. Sets the vector-table base address in FLASH
7. Initializes the C library
8. Enables the Instruction Cache
9. Enables the Data Cache
10. Calls the optional appl-provided _on_bootstrap() function
11. Branch to main();

[Link].1 Entry Point

For MPLAB, the PC points to the starting address of Reset_Handler at the beginning.
The purpose of the entry point is to:
• Set up a C environment
• Set the vector table base address
• Perform the low-level initialization
• Jump to the main application

[Link].2 Low-Level Initialization

The low-level initialization process starts by configuring critical peripherals:
• Main oscillator and its PLL
• MPU
• TCM
Among the files, bundled with each SAMRH71F20 example in the Harmony Framework, is a file named
startup_xc32.c, under the example's src/config/sam_rh71_ek/ directory.
This function steps through each of the actions listed in Example 2-1.
The initialization.c file, in the src/config/sam_rh71_ek/ directory, is used to:
• Identify the main RC clock
• Configure PLL
• Configure MCK
• Disable WDT
• Configure SUPC
• Configure PMC
• Configure PIO
The following sections explain why these peripherals are considered critical and detail the required operations to
configure them properly.

Low-Level Initialization: SYS_Initialize

SYS_Initialize is found in the src/config/sam_rh71_ek/initialization.c file. The purpose of
SYS_Initialize is to configure clocks and other peripherals. The first initialization involves the clocks.
Clock initialization occurs through the CLK_Initialize function, which calls the following functions (all contained in
the plib_clk.c file):

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• CLK_SlowClockInitialize();
• CLK_MainClockInitialize();
• CLK_PLLxClockInitialize();
• CLK_MasterClockInitialize();
• CLK_PeripheralClockInitialize();
After reset, the Main RC Oscillator is enabled with the 10 MHz frequency selected and it is selected as the source of
MAINCK. MAINCK is the default clock selected to start the system.
The Main Oscillator and its Phase Lock Loop A (PLLA) must be configured to run at full speed. Both can be
configured in the Power Management Controller (PMC). For details, see the SAMRH71F20 data sheet.
In the example, the processor clock and master clock are 100 MHz and 50 MHz respectively, by default. Example
values for the SAMRH71F20-EK Evaluation Board (10 MHz crystal) follow:
PMC_REGS->CKGR_PLLAR = CKGR_PLLAR_ONE_Msk |
CKGR_PLLAR_FREQ_VCO_VCO0 |
CKGR_PLLAR_PLLACOUNT(0x3F) |
CKGR_PLLAR_MULA(9) |
CKGR_PLLAR_DIVA(1);

Low-Level Initialization: Memory Protection Unit (MPU)

The SAMRH71F20 devices supply MPU with 16 zones as a component for memory protection. You can use the MPU
to enforce privilege rules, separate processes and enforce access rules.
The MPU_Initialize function (Figure 2-1) completes the memory mapping by setting MPU Region Base Address
Register (RBAR) and MPU Region Attribute and Size Register (RASR).
Within the HarmonyFramework\csp_apps_sam_rh71\apps\ directory, for more information, see the mpu
example. In the example, the plib_mpu.c file defines the MPU_Initialize function.
The MPU_RASR.ATTRS field defines the memory type, the cacheable and the shareable properties, and the access
and the privilege properties of the memory region.
The System Handler Control and State Register is settled to enable memory management fault, bus fault, and usage
fault exception. At the end of the function, an MPU region is enabled by setting the MPU Control register.
In this example, memory regions such as instruction tightly coupled memory (ITCM), internal Flash, data tightly
coupled memory (DTCM), SRAM, peripheral memory, and SDRAM are configured in this function. The SRAM, for
example, is divided into two parts with the same attributes. You can configure a new memory region or adjust the
attributes of some regions in the function, such as the cacheable properties.

Low-Level Initialization: Tightly Coupled Memory (TCM)

The SAMRH71F20 device embeds Tightly Coupled Memory (TCM) running at processor speed. Within the
HarmonyFramework\csp_apps_sam_rh71\apps\ directory see the tcm example for further information. In that
example, the startup_xc32.c file contains the TCM_Enable function and the other TCM functions.
ITCM has a single 64-bit interface, located at 0x0000 0000 (code region) and DTCM has a dual 32-bit interleaved
interface, located at 0x2000 0000 (data region).
ITCM is disabled by default at reset. DTCM is enabled by default at reset with a fixed size of 256 Kbytes. When
enabled, ITCM is located at 0x0000 0000, overlapping Flash. The Memory Protection Unit (MPU) can be used to
protect these areas as mentioned in the Low-Level Initialization: Memory Protection Unit (MPU). The ITCM and
DTCM are ECC protected. By default, ECC is enabled. Before enabling ITCM and DTCM, all the data must be
aligned with their ECC in memory. For more details, refer to application note dedicated to TCM.
After carrying out all of the above initialization actions, the program can jump to the main application.

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Figure 2-1. MPU_Initialize Generic Peripheral Usage

[Link].3 Initialization
Most peripherals are initialized by performing the following actions.
1. Disabling or reprogramming watchdog
2. Disabling or flushing cache if necessary
3. Configuring peripheral
4. Selecting and enabling peripheral clock
5. Enabling peripheral interrupt
6. Re-enabling cache if necessary

[Link] Disabling or Reprogramming Watchdog Timers (WDT)

[Link].1 Purpose
The WDT is used to prevent system lock-up if the software is trapped in a deadlock. It features a 32-bit down counter
that allows a watchdog period of up to 16 seconds (slow clock around 32 kHz). It can generate a general reset or a
processor reset only. In addition, it can be stopped while the processor is in Debug mode.
After a processor reset, the value of Watchdog Counter Value (WDV) is the maximum value of the counter with
the external reset generation enabled (bit WDT_MR_WDRSTEN_Msk at 1 after a backup reset). This means
that a default watchdog is running at reset, that is, at power-up. You can either disable the WDT by setting bit
RSWDT_MR_WDDIS_Msk or reprogramming the WDT to meet the maximum watchdog period as required.

[Link].2 Initialization
Following example disables the watchdog timer.

WDT_REGS->WDT_MR = WDT_MR_WDDIS_Msk;

[Link] Enabling Cache If Necessary

[Link].1 Purpose
The SAMRH71F20 device embeds 16 Kbytes of ICache and 16 Kbytes of DCache with Error Code Correction (ECC).
All caches are disabled at reset and by enabling cache improves the performance. You can turn on I-Cache and
D-Cache if necessary (enabled by default in the startup).

[Link].2 Initialization
Following example enables cache.

SCB_EnableICache();
SCB_EnableDCache()

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The following example shows the details of the SCB_EnableICache function.

__DSB();
__ISB();
SCB->ICIALLU = 0UL;
__DSB();
__ISB();
SCB->CCR |= (uint32_t)SCB_CCR_IC_Msk;
__DSB();
__ISB();

The Data Synchronization Barrier (DSB) and Instruction Synchronization Barrier (ISB) instructions flush data and
instruction cache, respectively. To make some regions cacheable, do the following:
1. Enable cache as described above in the application.
2. Set the attributes of the relevant regions as cacheable in the MPU_Initialize function (for more information,
see Low-Level Initialization: Memory Protection Unit (MPU)).
All the cache-related functions are contained in the core_cm7.h file within the packs sub-directory tree, under any
example's src directory.

[Link] Using the Nested Vectored Interrupt Controller (NVIC)

[Link].1 Purpose
The NVIC provides configurable interrupt handling abilities to the processor. It facilitates low-latency exception and
interrupt handling, and controls power management.
The NVIC supports up to 91 interrupts, each with up to 8 levels of priority. The user can change the priority of an
interrupt dynamically. The NVIC and the processor core interface are closely coupled, to enable low-latency Interrupt
processing and efficient processing of late arriving interrupts. The NVIC maintains knowledge of the stacked or
nested interrupts to enable tail-chaining of interrupts.

[Link].2 Initialization
The SAMRH71F20 device uses hardware to save and restore key context state on exception entry and exit. It uses
vector table to indicate the exception entry points. The vector table contains the initialization values for the stack
pointer and the entry point addresses of each exception handler. The vector table is defined as the constant of
exception_table for GNU toolchain.
In the interrupts.c file, part of the constant is shown in the following example:
__attribute__ ((section(".vectors")))
const DeviceVectors exception_table=
{
/* Configure Initial Stack Pointer, using linker-generated symbols */
.pvStack = (void*) (&_stack),
.pfnReset_Handler = ( void *)Reset_Handler,
.pfnNonMaskableInt_Handler = ( void *)NonMaskableInt_Handler,
.pfnHardFault_Handler = ( void *)HardFault_Handler,
.....
.pfnSysTick_Handler = ( void * )SysTick_Handler,
.....
.pfnTC0_CH0_Handler = ( void * )TC0_CH0_Handler,
.....
}

On reset, the processor initializes the vector table base address to an address 0x00000000. The software can find
the current location of the table, or relocate the table, using the Vector Table Offset Register (VTOR) as shown below
(see file startup_xc32.c).
pSrc = (uint32_t *) & __svectors;
SCB->VTOR = ((uint32_t) pSrc & SCB_VTOR_TBLOFF_Msk);

The __svectors symbol points to the vectors section that saves the vectors table. The SCB_VTOR_TBLOFF_Msk is
equal to 0xFFF FFF8 on SAMRH71F20 and bits [6:0] are RAZ (Read as Zero).
The VTOR holds the vector table address. The processor and the NVIC prioritize and handle all exceptions. All
exceptions are handled in Handler mode, and processor state is automatically stored on the stack on an exception,

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and automatically restored from the stack at the end of the Interrupt Service Routine (ISR). The vector is fetched in
parallel to the state saving, enabling efficient interrupt entry.
Configuring an interrupt source requires the following steps.
1. Implement interrupt handler if necessary.
Re-implement the interrupt handler in the vector table so that when the corresponding interrupt occurs, the
reimplemented interrupt handler is executed instead of the default interrupt handler.
2. Disable the interrupt if it was enabled.
An interrupt triggering before initialization might result in error. To disable the interrupt, the Interrupt Clear-
Enable Register (ICER) of the NVIC must be written with the interrupt source ID to mask it. The following
interface can be used directly.

static inline void

NVIC_DisableIRQ__STATIC_INLINE void__NVIC_DisableIRQ(IRQn_TypeIRQn)(IRQn_Type IRQn);

3. Clear any pending interrupt.

Setting the Interrupt Clear-Pending Register bit puts the corresponding pending interrupt in the inactive state.
It is also written with the interrupt source ID to mask it. The following interface can be used directly.

__STATIC_INLINE void
__NVIC_ClearPendingIRQ(IRQn_Type IRQn)

4. Configure the interrupt priority.

NVIC interrupts are prioritized by updating an 8-bit field within a 32-bit register (each register supporting four
interrupts). Priorities are maintained according to the Armv7-M prioritization scheme. The following interface
can be used directly.

__STATIC_INLINE void
__NVIC_SetPriority(IRQn_Type IRQn,uint32_t priority)

5. Enable the interrupt at peripheral level.

6. Enable the interrupt at NVIC level.
The interrupt source can be enabled, both on the peripheral (in a mode register usually) and in the Interrupt
Set-Enable Register (ISER) of the NVIC. On the side of NVIC, the following interface can be called directly.

__STATIC_INLINE void
__NVIC_EnableIRQ(IRQn_Type IRQn)

Refer to the core_cm7.h file for more interfaces about NVIC that can be used directly.

[Link] Using the PIO Controller

[Link].1 Purpose
The SAMRH71F20 supports several PIO controllers, each one controlling up to 32 lines. Each line can be assigned
to GPIO or one of the four peripheral functions: A, B, C, or D.
In this example, the PIO controller manages a single LED.

[Link].2 Configuring LEDs

The PIO connected to an LED must be configured as output, to turn it on or off. The PIOs control must be enabled in
PIO Enable Register (PIO_PER).
PIO direction is controlled by two registers: Output Enable Register (PIO_OER) and Output Disable Register
(PIO_ODR).
Note: There are individual internal pull-ups on each PIO pin. These pull-ups are enabled by default. As they are
not required for driving LEDs, they should be disabled, as this reduces power consumption. This is done in the PIO
Pull-Up Disable Register (PIO_PUDR).
In this example, LED is wired to PB19 pin, which is represented by left-shift-by-19 operations in PIOB_REGS
arguments, in the plib_pio.h file.

/* Port B Peripheral function GPIO configuration */

PIOB_REGS->PIO_MSKR = 0x880000;PIOB_REGS->PIO_CFGR = 0x0;

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/* Port B Pin 19 configuration */

PIOB_REGS->PIO_MSKR = 0x80000;
PIOB_REGS->PIO_CFGR = (PIOB_REGS->PIO_CFGR & (PIO_CFGR_FUNC_Msk)) | 0x100;

It is recommended to use the Harmony Configurator while programming the PIO, see section 2.2 Harmony
Framework Structure.

[Link].3 Controlling LEDs

LEDs are turned on or off by changing the level on the PIOs to which they are connected. After the PIOs have
been configured, the output values can be changed by writing the pin IDs in the PIO Set Output Data Register
(PIO_SODR) and the PIO Clear Output Data Register (PIO_CODR).
In addition, the PIO Pin Data Status Register (PIO_PDSR) indicates the current level on each pin. It can be used to
create a toggle function, that is, when the LED is ON according to PIO_PDSR, then it is turned off, and vice-versa.
Refer to plib_pio.c or plib_pio.h for more interfaces that can be used directly.

2.2 Harmony Framework Structure

The Harmony Framework structure is maintained by MPLAB Harmony 3 Content Manager (available from
Tools\embedded top menu). This tool enables to update the installed packages or install new ones in the local
HarmonyFramework directory.
While navigating to the sam_rh71_ek.X project, several directories needs to be traversed. The
csp_apps_sam_rh71 directory (under the top-most directory, HarmonyFramework) contains almost all the
SAMRH71F20 examples.
The Harmony Framework includes many examples, which are shared among various microcontrollers. To find all the
examples that works for SAMRH71F20, execute a recursive search in HarmonyFramework for sam_rh71_ek. For
accurate search to find all the SAMRH71F20 examples, use Cygwin or other Linux/UNIX compatible command shell,
and then search for .-name sam_rh71_ek.X in the HarmonyFramework directory.
In the csp_apps_sam_rh71 directory, various files and directories for documentation, licensing, and so on are
found. The apps directory contains ~75 categories of examples. Only some of these categories currently related to
the SAMRH71F20. That is, a search for sam_rh71_ek yields about 25 names under the apps directory.
The pio directory (in apps) contains two examples:
• pio_led_on_off_interrupt
• pio_led_on_off_polling
The pio_led_on_off_interrupt directory contains a subdirectory firmware, in which there is an MPLAB X
project directory for each of the different microcontrollers, and in some cases a microcontroller might also have
a project directory for the "IAR" IDE. Before building the pio project, use the tree shell command to locate the
following contents in the project directory, pio_led_on_off_interrupt/firmware/sam_rh71_ek.X/.
Figure 2-2. SAMRH71-EK Content

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In addition to these project files, the pio_led_on_off_interrupt/firmware/ directory has a src directory,
which contains main_rh71.c, and the following directories:
• arm: toolchain-specific header file(s)
• config: for each micro, a subdirectory with .c and .h configuration files
• packs: for each micro, a subdirectory with header files for that micro's peripherals
The source code resides in src directory. When SAMRH71F20 peripherals are added or removed to a project, the
corresponding changes are reflected in the config directory as shown in the following image.
Figure 2-3. Config Directory Contents

When a project is built, all the build-related files resides under the sam_rh71_ek.X directory. Harmony might also
update files under the src/directory directory, including the peripheral header files. In any case, all the peripheral
header files are available, as shown in the following image.

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Figure 2-4. SAMRH71F20 Peripheral Header Files

With the project, pio, opened in MPLAB, you can see three tabs:
• Project tab—presents a well catagorised (for example, header files, linker files, source files) file hierarchial
structure independent of the filesystem layout.
• Files tab—presents the project files hierarchically, but according to their locations in the filesystem (as seen in
the above "tree" images).
• Classes tab—presents a listing of the classes, functions, and datatypes of the project.
Under the Projects tab, click the + sign to expand the content view to display the project related files (for example,
header, linker, and source). Click the + sign to the left of Source Files to expand the content view and double-click
main_rh71.c. This opens a new tab in MPLAB's upper-right window.

2.2.1 Modify PIO Functionality in Harmony

To change the PIO project functionality, perform the following steps.

[Link] Opening Save State File

To open the save state file, perform the following steps.
1. In the PIO project window, on MPLAB's menu bar, select Tools > Embedded > MPLAB Harmony 3
Configurator.
2. In the resulting MPLAB Harmony Launcher window, accept the default values for project paths, and then to
launch actions, click Launch.
3. In the subsequent Configuration Database Setup window, to accept the default values for DFP and CMSIS,
click Launch.
4. As it loads, Harmony might prompt to select desired packages (for example, csp, net, usb). For this example,
the csp package is used.
5. If prompted to open a default Saved State file, click Open. The MPLAB Harmony Configurator window is
displayed as shown below.

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Figure 2-5. Harmony GUI

[Link] Configuring Pin

To configure the pin, perform the following steps.
1. On the menu bar of Harmony, select Tools > Pin Configuration. An window with three tabs (Pin Diagram,
Pin Table, and Pin Settings) is displayed (along the bottom edge).
Figure 2-6. Pin Diagram, Pin Table, and Pin Settings

Note: Maximize the window to easily navigate among the pins.

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2. To sort the rows by the ports name instead of the Pins name, under the Pin Settings tab, from the Order list,
select Ports.
3. Under the Pin Settings tab, select PB19 (indicated as LED, function GPIO, and direction Out), double-
click the corresponding Custom Name cell, and then enter LED_OLD (this disassociates PB19 from any
references in main.c).
4. Locate PB23 and change its function from Available to GPIO, double-click the corresponding Custom Name
cell and enter LED, and then change its direction from In to Out.
5. To assign a push-button control for the LED:
5.1. Locate PC29 and rename as SWITCH_OLD.
5.2. Locate PC30 and change its function from Available to GPIO and enter SWITCH in the Custom
Name cell.
5.3. Select Low Level for the PIO interrupt, select the pull-up and debounce filter options (as seen with
"PC29").
6. Click the Pin Table and the Pin Diagram tabs to see the change on the color-coding of the respective
Available and Assigned properties. The following image demonstrates a portion of the resulting Pin Table (four
green assigned boxes).
Figure 2-7. Pin Table

The following image is a portion of the resulting Pin Diagram (note the four green assigned pins).
Figure 2-8. Portion of the Pin Diagram

[Link] Generating a Project

To generate a project, perform the following steps.
1. On the main menu bar of Harmony Configurator, select Generate > Generate Code.
2. In the Generate Project window, accept the defaults by clicking Generate.
Note: If any code in the main_rh71.c file has changed as a result of this procedure, then Before and After
panels appear, which highlight the difference. The changes can be accepted or rejected.
3. On the main menu bar of Harmony Configurator, select File > Save Configuration.
Note: You must click Generate Code following any changes in Harmony, even if main.c is not affected.
Generate Code commits change to various files, whereas Save Configuration saves only the Harmony's
graphical representation of the changes.
4. In the MPLAB (not Harmony) window, click the Make and Program (down-arrow) icon. Verify that PB1 Push
Button controls now LED1 on the evaluation board.

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[Link] Linking the STDIO C-Library to an UART Interface

Generally, it is useful to add printf statements to display results on a serial terminal. For this purpose, it is necessary
to link the STDIO C-library to the UART interface of the device so that the output of the printf instruction is directed to
the COM port. To link the STDIO library, perform the following steps:
1. Add a printf just before the while (true) loop in main.c.
printf("\n\r HELLO WORLD!\n\r");
while (true)

To allow this added functionality, check the Harmony Configurator GUI. Harmony configurator window displays
various available components in the Available Components sub-window. Under Tools, STDIO is available.
2. Drag STDIO from the Components window into the central Project Graph window. It appears as a small box,
containing a UART port on its left side.
3. Under Peripherals, expand FLEXCOM and drag the resulting FLEXCOM1 entry into the Project Graph
window. Once dropped, it appears as a box, containing three ports on its right-side: I2C, SPI, and UART.
Figure 2-9. Studio in Project Graph

Note: When the components are dragged into the Project Graph window, they are no longer available in the
Available Components window, because these resources are allocated.
4. Click and hold the left mouse button on either of the two UART ports and drag the mouse to the other UART
port, and release. A line now connects the two UART ports and the other FLEXCOM1 ports disappear from
the FLEXCOM1 block, as shown in the following image.

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Getting Started

Figure 2-10. Connecting UART Ports

After connecting the two UART ports, click FLEXCOM1 in the Project Graph window to update the
Configuration Options window (upper-right) to reflect the properties of FLEXCOM1 (for example, Baud rate).
Expand to view all the sub-level entries.
5. On the main menu bar of Harmony Configurator, select Tools > Clock Configuration. The Clock Easy
View window opens, which displays the full SAMRH71F20 clock system. Adjust as appropriate for the
SAMRH71F20 board, to use the UART (correct values are needed for synchronization). The following image
displays the default values.

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Getting Started

Figure 2-11. Clock Configurator Window Before Edit

Update the main clock values to use the external oscillator, checking the main clock box, and set the start-up
time to 255 (otherwise the board might not properly come out of reset).

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Getting Started

Figure 2-12. Clock Configurator Window After Edit

Note: For inclusion of components, clock configuration, and pin configuration, it can help to first open
a Harmony Framework example which uses the components required. Take screenshots of the clocking
diagram, the Project Graph (for components), and any relevant pin configurations to compare with intended
configurations.
Note: If instead of using Harmony, a printf statement is added in main.c of the pio project (and
FLEXCOM pins are configured directly in one's files). The project builds without error, but nothing is printed
on PuTTY terminal. In this case, find an example that uses printf, for example Harmony's trng example.
Review of the trng clock, pin and component configuration reveals that the clocking in the previous example
differs from that of trng. Then, the clocking and start-up parameter (in Harmony's Clock Easy View window)
must be adjusted, as shown in the previous images to match what the trng example uses.
6. On Harmony's menu bar, select Tools > Pin Configuration that opens the Pin Settings window.
Note: It is necessary to connect UART pins, otherwise you cannot see anything printed on the serial terminal.
7. In the Pin Settings window, for Pin Number 3 and 4, in the Function list, select FLEXCOM1_IO1 and
FLEXCOM_IO0 respectively as shown in the following image (each Custom Name cell updates automatically).
Note: These pins are physically connected to the SAMRH71F20 evaluation board. For further information on
the board's connections of SAMRH71F20 pins, see the SAMRH71-EK User's Guide.

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Getting Started

Figure 2-13. Pin Settings

8. When all the desired configurations are done, on the top menu bar of Harmony, select File > Save
Configuration to save the current configuration. This includes the clocking, pins, components (and their
connections), and any other configuration (that is, under Tools) options that have been modified.
9. Select Generate > Generate Code in order to generate new code which reflects the configuration changes.
When the LED and SWITCH pins were changed, Harmony does not display the changed code (although minor
code change did actually occur, to reflect the changed pins). The clock changes result in more significant
code changes, which Harmony presents for review. To review the changes, two panels appear in the Merging
window.
Figure 2-14. Code Merge Window

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Getting Started

Changes in the code are reflected in the previous (edited) image. The generated code is in the left panel,
and the old code is in the right panel. Notice that the earlier edits are in the right panel, highlighted in green.
Each generated change is highlighted with a transfer arrow in the left pane, and one must click each transfer
arrow to commit the change in the right-hand panel. Click the one arrow in its own center column (seen above,
between the panels), to commit all changes. However, this completely overwrites the files in the right panel, for
example, the earlier cache disable/enable lines, which are highlighted in green, must be kept.
10. Click Close, and then in MPLAB select, Make and Program Device.
This concludes the examination of the PIO example. For information on debugging with MPLAB, a Microchip
video series, MPLAB X IDE Advanced Debugging, is available on YouTube. The series consists of a brief
introduction video and then 7 episodes, each episode running 5-8 minutes. Examples are presented in which
line, address, data, sequence, and event breakpoints are used.

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References

3. References
• SAMRH71F20 Device Datasheet, DS60001593.
• SAMRH71F20 Evaluation Kit User Guide, DS50002910.
• Getting started with SAMRH71F20 Evaluation Kit, DS00004008.
• ARM Cortex M7 Technical Reference Manual.
• IAR Embedded Workbench C-SPY Debugging Guide for Arm Cores.
• MPLAB X IDE User's Guide, DS50002027D.

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Revision History

4. Revision History
Revision Date Description
C June 2021 • The sections regarding the evaluation kit have been
removed from this document and moved to a new one.
• Rest of the sections have been updated to make them
more clearer.

B March 2020 • The USING THE SERIAL PORT section was removed.
• The Get Started with Atmel Studio 7 section was
replaced by Get Started with MPLAB section.
• The IAR Embedded Workbench section was removed.

A September 2019 Initial Revision

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• Microchip is willing to work with any customer who is concerned about the integrity of its code.
• Neither Microchip nor any other semiconductor manufacturer can guarantee the security of its code. Code
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Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act.
If such acts allow unauthorized access to your software or other copyrighted work, you may have a right to sue
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Legal Notice
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ISBN: 978-1-5224-8403-5

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Quality Management System

For information regarding Microchip’s Quality Management Systems, please visit [Link]/quality.

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