riscv: add flashstub framework and helper functions (riscv32 only)#1764
riscv: add flashstub framework and helper functions (riscv32 only)#1764mean00 wants to merge 4 commits intoblackmagic-debug:mainfrom
Conversation
|
We'll dive in and review this tomorrow, but as for the stack thing - the stub can use stack, it just has to set one up itself - see the RP2040 stub in #1609 which does this to improve code density and size. It's not really viable for the stub runner to do this itself, and with the |
|
Hi, This looks ugly and a bit error prone. Not sure what is the best way to deal with that. |
|
Given that going through the target API there is just a convoluted way to access riscv_csr_read/riscv_csr_write - we would suggest that the logic use these functions directly, solving the need to deal with the GDB offset and specify the register width that way (you can use |
|
Indeed, thank you for the pointer, that's way better. |
b0b8e42 to
da769a0
Compare
|
Updated accordingly. |
dragonmux
left a comment
There was a problem hiding this comment.
This is looking good, though there are some items to address and talk about before this can be considered ready for merge. Most of the items are about formatting and code style though.
1ef411c to
f0d6406
Compare
|
I think i've taken all or about all of the comments into account. I've left the two helper functions as inline to have a simpler code. I guess they might be helpful later on. Similarily i've let the error handling a bit detailed as to allow further more detailed use cases. It should not cause binary bloat. ( On a side note, clang-tidy 17 does not like much the .clang-tidy due to varying indentation and after fixing it complains really a lot ) |
dragonmux
left a comment
There was a problem hiding this comment.
This code is looking significantly better - good work! We do have a few small items found in re-reviewing, but with those fixed we'll be very happy to get this merged.
| * Small helper function to translate target to hart and simplify parameters | ||
| * We assume it is 32 bits |
There was a problem hiding this comment.
The content of this multi-line comment (and the others below) are over-indented after the start of line *'s - we run a single space between the * and the first word in the comment in this context.
|
|
||
| /* | ||
| * Execute code on the target with the signature void function(a,b,c,d) | ||
| * - codexec is the address the code to tun is located at |
There was a problem hiding this comment.
tun => run? Seems like a typo.
| #define RISCV_REG_A0 10 | ||
| #define RISCV_REG_A1 11 | ||
| #define RISCV_REG_A2 12 | ||
| #define RISCV_REG_A3 13 | ||
| #define RISCV_REG_PC 32 | ||
| #define RISCV_REG_SP 2 |
There was a problem hiding this comment.
These still need suffixing with U to mark them unsigned.
| if (ret) { | ||
| uint32_t a0; | ||
| target->reg_read(target, RISCV_REG_A0, &a0, 4); | ||
| ret = (a0 == 0); |
There was a problem hiding this comment.
The parens here can be dropped - == binds tighter than =, so there is no ambiguity without them on what this means. the 0 should be suffixed with a U to prevent a signed-unsigned conversion during comparison.
Detailed description
Hi
This is a temptative patch to add some flashstub helper functions for the rv32 targets.
It tries to be very similar to the cortexm version. i.e.
Call riscv32_run_stub( target, loadaddr, param1, param2, param3, param4)
and the flashstub must end up with riscv_stub_exit(errorcode)
The main difference in behavior is the code saves and restore PC & MIE to avoid letting things dangling in ram.
Not completely sure this is needed, just to be on the safe side.
I've tested it with a CH32V307 board using the upcoming board & rvswd protocol support with a ~2x speedup.
As a sidenote and for the record, my original version was providing a temporary stack for the stub to avoid strict compiler rules about not using stack. Dont know if it is a valid idea. Nonetheless, this MR is assuming the stack is not used at all by the stub.
Thank you.
Your checklist for this pull request
Tested with a BMP derivative using CH32V3xx chips. Cant test (yet!) with vanilla bmp