Sequential Circuit Design
Sequential Circuit Design
Now lets reverse the process: In sequential circuit design, we turn some description into a working circuit. We first make a state table or diagram to express the computation. Then we can turn that table or diagram into a sequential circuit.
Sequence recognizers
A sequence recognizer is a special kind of sequential circuit that looks for a special bit pattern in some input. The recognizer circuit has only one input, X. One bit of input is supplied on every clock cycle. For example, it would take 20 cycles to scan a 20-bit input. This is an easy way to permit arbitrarily long input sequences. There is one output, Z, which is 1 when the desired pattern is found. Our example will detect the bit pattern 1001: Inputs: 1 1 1 0 01 1 0 1 00 1 00 1 1 0 Outputs: 0 0 0 0 0 1 0 0 0 0 0 1 0 0 1 0 0
Here, one input and one output bit appear every clock cycle. This requires a sequential circuit because the circuit has to remember the inputs from previous clock cycles, in order to determine whether or not a match was found.
What state do we need for the sequence recognizer? We have to remember inputs from previous clock cycles. For example, if the previous three inputs were 100 and the current input is 1, then the output should be 1. In general, we will have to remember occurrences of parts of the desired patternin this case, 1, 10, and 100. Well start with a basic state diagram (edges are labeled input/output): A 1/0 B 0/0 C 0/0 D
State A B C D
Meaning None of the desired pattern (1001) has been input yet. Weve already seen the first bit (1) of the desired pattern. Weve already seen the first two bits (10) of the desired pattern. Weve already seen the first three bits (100) of the desired pattern.
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The first thing you have to figure out is precisely how the use of state will help you solve the given problem. Make a state table based on the problem statement. The table should show the present states, inputs, next states and outputs. Sometimes it is easier to first find a state diagram and then convert that to a table. This is usually the most difficult step. Once you have the state table, the rest of the design procedure is the same for all sequential circuits. Sequence recognizers are especially hard! Theyre the hardest example well see in this class, so if you understand this youre in good shape.
What state do we need for the sequence recognizer? We have to remember inputs from previous clock cycles. For example, if the previous three inputs were 100 and the current input is 1, then the output should be 1. In general, we will have to remember occurrences of parts of the desired patternin this case, 1, 10, and 100. Well start with a basic state diagram: A 1/0 B 0/0 C 0/0 D
State A B C D
Meaning None of the desired pattern (1001) has been input yet. Weve already seen the first bit (1) of the desired pattern. Weve already seen the first two bits (10) of the desired pattern. Weve already seen the first three bits (100) of the desired pattern.
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What happens if were in state D (the last three inputs were 100), and the current input is 1? The output should be a 1, because weve found the desired pattern. But this last 1 could also be the start of another occurrence of the pattern! For example, 1001001 contains two occurrences of 1001. To detect overlapping occurrences of the pattern, the next state should be B. A 1/0 B 0/0 C 1/1
State A B C D Meaning None of the desired pattern (1001) has been input yet. Weve already seen the first bit (1) of the desired pattern. Weve already seen the first two bits (10) of the desired pattern. Weve already seen the first three bits (100) of the desired pattern.
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0/0
1/0
0/0 1/0
C 1/1
Meaning
0/0
None of the desired pattern (1001) has been input yet. Weve already seen the first bit (1) of the desired pattern. Weve already seen the first two bits (10) of the desired pattern. Weve already seen the first three bits (100) of the desired pattern.
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0/0 1/0
C 1/1
Present State A A B B C C D D
0/0
Remember how the state diagram arrows correspond to rows of the state table:
present state input/output next state
Input 0 1 0 1 0 1 0 1
Next State A B C B D B A B
Output 0 0 0 0 0 0 0 1
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Step 2:
Step 3:
Step 4: Step 5:
Present State A A B B C C D D
Input 0 1 0 1 0 1 0 1
Next State A B C B D B A B
Output 0 0 0 0 0 0 0 1
Input X 0 1 0 1 0 1 0 1
Output Z 0 0 0 0 0 0 0 1
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If the present state of a JK flip-flop is 0 and we want the next state to be 1, then we have two choices for the JK inputs: We can use JK=10, to explicitly set the flip-flops next state to 1. We can also use JK=11, to complement the current state 0. So to change from 0 to 1, we must set J=1, but K could be either 0 or 1. Similarly, the other possible state transitions can all be done in two different ways as well.
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JK excitation table
An excitation table shows what flip-flop inputs are required in order to make a desired state change.
Q(t) 0 0 1 1 Q(t+1) 0 1 0 1 J 0 1 x x K x x 1 0 Operation No change/reset Set/complement Reset/complement No change/set
This is the same information Q(t+1) given in the characteristic table, J K thats Operation but presented backwards. Q(t) 0 0 No change
0 1 1 1 0 1 0 1 Q(t) Reset Set Complement
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We can now use the JK excitation table on the right to find the correct values for each flip-flops inputs, based on its present and next states.
Q(t) 0 0 1 1 Q(t+1) 0 1 0 1 J 0 1 x x K x x 1 0
Present State Q1 Q 0 0 0 0 0 1 1 1 1 0 0 1 1 0 0 1 1
Input X 0 1 0 1 0 1 0 1
Next State Q1 Q0 0 0 1 0 1 0 0 0 0 1 0 1 1 1 0 1
Output Z 0 0 0 0 0 0 0 1
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We can now use the JK excitation table on the right to find the correct values for each flip-flops inputs, based on its present and next states.
Q(t) 0 0 1 1 Q(t+1) 0 1 0 1 J 0 1 x x K x x 1 0
Present State Q1 Q0 0 0 0 0 1 1 1 1 0 0 1 1 0 0 1 1
Input X 0 1 0 1 0 1 0 1
Next State Q1 Q0 0 0 1 0 1 0 0 0 0 1 0 1 1 1 0 1
Output Z 0 0 0 0 0 0 0 1
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Input X 0 1 0 1 0 1 0 1
Output Z 0 0 0 0 0 0 0 1
J1 = X Q0 K1 = X + Q 0 J 0 = X + Q1 K0 = X Z = Q1 Q 0 X
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J1 = X Q0 K1 = X + Q 0 J0 = X + Q1 K0 = X Z = Q1Q0X
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J1 = X Q0 K1 = X + Q 0 J0 = X + Q1 K0 = X Z = Q1Q0X
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Timing diagram
Here is one example timing diagram for our sequence detector. The flip-flops Q1Q0 start in the initial state, 00.
On the first three positive clock edges, X is 1, 0, and 0. These inputs cause Q1Q0 to change, so after the third edge Q1Q0 = 11.
Then when X=1, Z becomes 1 also, meaning that 1001 was found. The output Z does not have to change at positive clock edges. Instead, it may change whenever X changes, since Z = Q1Q0X. 1 CLK Q1 Q0 X Z
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Input X 0 1 0 1 0 1 0 1
Output Z 0 0 0 0 0 0 0 1
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Output Z 0 0 0 0 0 0 0 1
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D1 = Q1 Q0 X + Q1 Q0 X D0 = X + Q1 Q0
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Flip-flop comparison
JK flip-flops are good because there are many dont care values in the flip-flop inputs, which can lead to a simpler circuit.
D flip-flops have the advantage that you dont have to set up flip-flop inputs at all, since Q(t+1) = D. However, the D input equations are usually more complex than JK input equations In practice, D flip-flops are used more often. There is only one input for each flip-flop, not two. There are no excitation tables to worry about. D flip-flops can be implemented with slightly less hardware than JK flip-flops.
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Summary
The basic sequential circuit design procedure: Make a state table and, if desired, a state diagram. This step is usually the hardest. Assign binary codes to the states if you didnt already. Use the present states, next states, and flip-flop excitation tables to find the flip-flop input values. Write simplified equations for the flip-flop inputs and outputs and build the circuit. Next, well look at common examples of sequential circuits, including different types of counters.
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