Computer Architecture and
organization
Books
J. L. Hennessy & D.A. Patterson, Computer architecture: A
quantitative approach, Fourth Edition, Morgan Kaufman,
2004.
W. Stallings, Computer organization and architecture,
Prentice-Hall,2001.
M. M. Mano, Computer System Architecture, Prentice-
Hall,2005.
J. P. Hayes, Computer system architecture, McGraw Hill.
Carl Hamacher, Zvonko Vranesic, Safwat Zaky, Computer
Organization, fifth edition.
Assesment
CAT – I - 15
CAT – II - 15
Digital Assignment - 30
Term End Exam - 40
What is Computer Architecture?
I/O Chan
Link
ISA
API
Interfaces
Technology
IR
Regs
Machine Organization
Applications Computer
Architect Measurement &
Evaluation
Architecture &
Organization
Architecture is those attributes visible to the
programmer
◦ Instruction set, number of bits used for data
representation, I/O mechanisms, addressing
techniques.
◦ e.g. Is there a multiply instruction?
Organization is how features are
implemented
◦ Control signals, interfaces, memory technology.
◦ e.g. Is there a hardware multiply unit or is it done
by repeated addition?
All Intel x86 family will share the same basic
architecture.
The IBM System/370 family will share the same basic
architecture.
This helps to enable code compatibility.(backwards)
But organisation is different for different versions.
Transformation of Programs to
“bits”
Compiler
Instruction
Set
Architectur
Assembler e
(ISA)
Classical Computer Components
and Organization
•The five classic components of a computer are
– Input
– Output
– Memory
– Data-path
– Control
Functional units of a
computer
Input unit accepts Arithmetic and logic unit(ALU):
information: •Performs the desired
•Human operators, operations on the input
•Electromechanical devices information as determined
•Other computers by instructions in the memory
Memory Arithmetic
Input Instr1 & Logic
Instr2
Instr3
Data1
Output Data2 Control
I/O Stores
Processor
information: Control unit coordinates
Output unit sends various actions
•Instructions,
results of processing: •Input,
•To a monitor display, •Data
•Output
•To a printer •Processing
11
How are the functional units
connected?
•For a computer to achieve its operation, the functional units need t
communicate with each other.
•In order to communicate, they need to be connected.
Input Output Memory Processor
Bus
•Functional units may be connected by a group of parallel wires.
•The group of parallel wires is called a bus.
•Each wire in a bus can transfer one bit of information.
•The number of parallel wires in a bus is equal to the word length o
a computer
12
Organization of cache and main
memory
Main Cache
memory memory Processor
Bus
Why is the access time of the cache memory lesser than the
access time of the main memory?
14
Structure and Function
Structure is the way in which components relate to each
other.
Function is the operation of individual components as
part of the structure. The computer functions are,
◦ Data processing
◦ Data storage
◦ Data movement
◦ Control
Functional View
Operating Environment (Source, Destination of Data)
Data Movement
apparatus
Control Mechanism
Data Storage Data Processing Facility
Facility
Data Movement
movement
control
Storage Processing
Storage
Movement
Control
Storage Process
Processing from/to storage
Movement
Control
Storage Process
Processing from storage to I/O
Movement
Control
Storage Process
Structure
Communication Lines
Peripherals
Computer
Storage
Processing
Structure - Top Level
Peripherals Computer
Central Main
Processing Memory
Unit
Computer
Systems
Interconnection
Input
Output
Communication
lines
Structure - The CPU
CPU
Computer Arithmetic
Registers and
I/O Login Unit
System CPU
Bus
Internal CPU
Memory Interconnection
Control
Unit
Structure - The Control Unit
Control Unit
CPU
Sequencing
ALU Login
Control
Internal
Unit
Bus
Control Unit
Registers Registers and
Decoders
Control
Memory
Structural components
CPU – controls the operation of the computer and
performs its data processing functions.
Main Memory – Stores data
I/O – Moves the data
System Interconnection- some mechanism that provides
for communication among CPU, main memory and I/O.
Control Unit – controls operation of the CPU
ALU –performs data processing functions
Registers – storage internal to CPU
CPU Interconnection- some mechanism that provides for
communication among the control unit, ALU and
registers.
ENIAC
◦ ENIAC (Electronic Numerical Integrator And Computer)
◦ 1st general-purpose electronic computer.
◦ Designed by John Mauchly and John Presper Eckert at University of
pennsylvania.
◦ Funded by US BRL (Ballistic Research Lab) to develop range and
trajectory tables for new weapons
Until then, BRL employee more than 200 people with desktop calculators
to solve the necessary ballistics equations
◦ The proposal accepted in 1943, the machine completed in 1946, and
dismantled in 1955
Used for H-bomb research
◦ Characteristics
30 tons, 15000 square feet, 18000 vacuum tubes, 140 KW power
dissipation
Decimal machine
20 accumulators each holding 10-digit decimal number
Each digit is represented by a ring of 10 vacuum tubes
Manually programmed by setting switches and plugging/unplugging
cables
5,000 additions per second
ENIAC
von Neumann/Turing
Stored Program concept
Main memory storing programs and data
ALU operating on binary data
Control unit interpreting instructions from memory and
executing
Input and output equipment operated by control unit
At Princeton Institute for Advanced Studies in 1946
◦ IAS
The Von Neumann Machine & IAS
Structure of IAS Computer
The Stored Program Concept
Von Neumann’s proposal was to store the program instructions
right along with the data
The stored program concept was proposed about fifty years
ago; to this day, it is the fundamental architecture that fuels
computers.
The Stored Program Concept and its
Implications
The Stored Program concept had several technical
ramifications:
◦ Four key sub-components operate together to make the
stored program concept work
◦ The process that moves information through the sub-
components is called the “fetch execute” cycle
◦ Unless otherwise indicated, program instructions are
executed in sequential order
Four Sub-Components
There are four sub-components in von Neumann architecture:
◦ Memory
◦ Input/Output (called “IO”)
◦ Arithmetic-Logic Unit
◦ Control Unit
While only 4 sub-components are called out, there is a 5th, key
player in this operation: a bus, or wire, that connects the
components together and over which data flows from one sub-
component to another
Let’s look at each sub-component in more detail …
Memory
As you already know, there are several different flavors of
memory
Each type of memory represents cost/benefit tradeoffs
between capability and cost .
Memory Types: RAM
RAM is typically volatile memory (meaning it doesn’t retain
voltage settings once power is removed)
RAM is an array of cells, each with a unique address
A cell is the minimum unit of access. Originally, this was 8
bits taken together as a byte.
RAM gets its name from its access performance. In RAM
memory, theoretically, it would take the same amount of time
to access any memory cell, regardless of its location with the
memory bank (“random” access).
Memory Types: ROM
It gets its name from its cell-protection feature. This type of
memory cell can be read from, but not written to.
Unlike RAM, ROM is non-volatile; it retains its settings after
power is removed.
ROM is more expensive than RAM, and to protect this
investment, you only store critical information in ROM …
Memory Types: Registers
There is a third, key type of memory in every computer –
registers.
Register cells are powerful, costly, and physically located
close to the heart of computing.
Memory Types: Other
Modern computers include other forms of memory, such as
cache memory.
The study of memory organizations and access schemes is an
innovative one within Computer Science.
I/O: Input and Output
There is both a human-machine interface and a machine-
machine interface to I/O.
◦ Examples of the human-machine interface include a
keyboard, screen or printer.
◦ Examples of the machine-machine interface include things
like mass storage and secondary storage devices.
Input and output devices are the least standardized of the
various sub-components, which means that you have to pay
extra special attention to make certain that your input or
output devices are compatible with your machine.
The ALU
The third component in the von Neumann architecture is
called the Arithmetic Logic Unit.
This is the subcomponent that performs the arithmetic and
logic operations for which we have been building parts.
The ALU is the “brain” of the computer.
It contains the circuitry to perform addition, subtraction,
multiplication and division, as well as logical comparisons
(less than, equal to and greater than).
Control Unit
The last of the four subcomponents is the Control Unit.
The control unit drives the fetch and execute cycle.
Controls which address is loaded into the memory and what
operation is taking place in the data.
IAS - details
The memory of the IAS consists of 1000 storage
locations, called words, of 40 binary digits each.
Both data and instructions are stored there.
Each number is represented by a sign bit and a 39-bit
value.
A word may also contain two 20-bit instructions, with
each instruction consisting of an 8-bit operation code
specifying the operation to be performed and 12-bit
address designating one of the words in memory.
IAS Memory Formats
NUMBER WORD
0 1 39
Sign
Bit
Instruction Word
Left Instruction Right Instruction
0 8 20 28 39
Opcode Opcode Address
Address
Set of registers (storage in CPU)
◦ Memory Buffer Register
◦ Memory Address Register
◦ Instruction Register
◦ Instruction Buffer Register
◦ Program Counter
◦ Accumulator
◦ Multiplier Quotient
Expanded Structure of IAS Computer
Registers
MBR – Memory Buffer Register contains a word to be stored
in memory or sent to the I/O unit or is used to receive a word
from memory.
MAR – Memory Address Register specifies the address of the
word to be written from MBR, to be read into
MBR.
Instruction Register (IR) - 8 bit opcode instruction being
executed.
Instruction Buffer Register (IBR)– hold the right hand
instruction from a word in memory.
Program Counter(PC) – address of the next instruction pair
fetched from memory.
Contd.,
Accumulator (AC) , Multiplier Quotient (MQ)
temporarily hold operands and the results of
ALU operations
Example:
40 bit multiply operation – 80 bit number
Most Significant Bit(40) - AC
Least Significant Bit (40) - MQ
IAS Instruction Set
Data Transfer – moves the data between Memory and ALU
registers or between two ALU registers
Unconditional Branch – CU executes instructions in
sequence from memory, sequence can be changed by branch
instructions
Conditional Branch – branch can be made dependent on
condition.
Arithmetic – operations performed by ALU
Address modify – permits the address to be computed by
ALU and then inserted into instructions stored in memory.
IAS Instruction Set