3.

Transistor
3.1 BJT configuration and biasing, small and
large signal model
3.2 T and U model
3.3 Concept of differential amplifier using BJT
3.4 BJT switch and logic circuits
3.5 Construction and working principle of
MOSFET and CMOS
3.6 MOSFET as logic circuits

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 Transistor Basics
• If we join together two individual signal diodes
back-to-back, this will give us two PN-
junctions connected together in series that
share a common P or N terminal. The fusion of
these two diodes produces a three layer, two
junction, three terminal device forming the
basis of a Bipolar Transistor, or BJT for short.
• A transistor basically acts as a switch and an
amplifier.
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 Construction Details

IE = IB + IC
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 Construction Detail
• The three terminals drawn from the transistor indicate Emitter, Base and Collector
terminals. They have their functionality as discussed below.
Emitter
• This has a moderate size and is heavily doped as its main function is to supply a
number of majority carriers, i.e. either electrons or holes.
• As this emits electrons, it is called as an Emitter.
• This is simply indicated with the letter E.
Base
• This is thin and lightly doped.
• Its main function is to pass the majority carriers from the emitter to the collector.
• This is indicated by the letter B.
Collector
• Its name implies its function of collecting the carriers.
• This is a bit larger in size than emitter and base. It is moderately doped.
• This is indicated by the letter C.

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 Operating Regions
• The bipolar transistors have the ability to operate
within three different regions:
 Active Region : The transistor operates as an amplifier
and Ic =   IB . EB junction forward biased and CB
junction reverse biased.
 Saturation : The transistor is "fully-ON" operating as a
switch and Ic = I(saturation). Both EBJ and CBJ are
forward biased.
 Cut-off - the transistor is "fully-OFF" operating as a
switch and Ic = 0. Both EBJ and CBJ are reversed biased.
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 Transistor Types

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 Bipolar Junction Transistor (BJT)
Configuration
• Since a BJT is a 3-terminal device, there are
three different configurations of Transistors
possible with BJTs.
– Common Base (CB) Configuration: no current gain
but voltage gain
– Common Collector (CC) Configuration: current gain
but no voltage gain
– Common Emitter (CE) Configuration: current gain
and voltage gain

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 Common Base(CB) Configuration
• Base connection is
common to both the
input signal and the
output signal.
• The input signal is applied
between the base and the
emitter terminals, while
the corresponding output
Figure: CB configuration of PNP
signal is taken from
between the base and the
collector terminals .
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 Contd…
• The input current IE flowing into the emitter terminal must be
higher than the base current IB and collector current IC to
operate the transistor, therefore the output collector current
is less than the input emitter current.
• The current gain is generally equal or less than to unity for
this
type of configuration.
• The input and output signals are in-phase in this
configuration.
• The amplifier circuit configuration of this type is called as non-
inverting amplifier circuit.
• This transistor configuration has high output impedance and
low input impedance
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 Contd…
• Has high resistance gain i.e. ratio of output resistance
to input resistance is high.
• This type has high voltage gain values

• Current amplification factor(α )

Ratio of change in collector current to the change in emitter current
when VCB is kept constant.

• The common base circuit is mainly used in single stage

amplifier circuits, such as microphone pre amplifier or
radio frequency amplifiers because of their high
frequency response.

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 Input Characteristic
• A curve is drawn between input
current IE and input voltage VBE at
constant output voltage VCB
• Similar to the PNJ forward biased
diode characteristic.
• Higher the VCB value, IE is larger at
same BEJ voltage
• The input resistance ri is the ratio
of change in base emitter
voltage to the change in base
current at constant VCB.

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 Output Characteristics
• we can see that for a constant input current
IE, when the output voltage VCB is increased,
the output current IC remains constant. But
when input current is increased output
current also increased. So output current
depends on only input current.
• The output resistance ro is the ratio of change
in the collector base voltage to the change in
collector current at constant emitter
current IE.

The curve is drawn

between output current IC
and output voltage VBC with
• As the output resistance is of very high
constant input current IE . This
value, a large change in VCB produces a very
region is known as the active little change in collector current IC.
region of a transistor.
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Current Amplification
Factor ()
• The ratio of output current to
input current is known as
a current amplification factor.
• In the common base
configuration, the collector
current IC is the output current,
and the emitter current IE is the • The value of current amplification
input current. It is represented by factor is less than unity. The value
α (alpha). of the amplification factor (α)
reaches to unity when the base
current reduces to zero. The base
current becomes zero only when it
is thin and lightly doped. The
• Where ΔIC is the change in the practical value of the amplification
collector and ΔIE is changed in factor varies from 0.95 to 0.99 in
emitter current at constant VCB.
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 Expression for Collector Current
• Along with the emitter current flowing, there is some
amount of base current IB which flows through the base
terminal due to electron hole recombination.
• As collector-base junction is reverse biased, there is another
current which is flown due to minority charge carriers.
• This is the leakage current which can be understood as ICBO
or Ileakage. This is due to minority charge carriers and hence
very small. (ICBO :collector to base with emitter open)
• The emitter current that reaches the collector terminal is
IE .
• Total collector current,
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 Collector Current

• The value of collector current depends on base

current and leakage current along with the
current amplification factor of that transistor in
use.
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 Common Emitter (CE) Configuration

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 Input Characteristics Curve
• The curve plotted
between base current
IB and the base-emitter
voltage VEB is called Input
characteristics curve.
• Similar to a forward
diode characteristic. The
base current IB increases
with the increases in the
Input Characteristics curve emitter-base voltage VBE.

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 Output Characteristics Curve
• The curve draws between collector
current IC and collector-emitter
voltage VCE at a constant base current
IB is called output characteristic.
• In the active region, the collector
current increases slightly as collector-
emitter VCE voltage increases.
• In the saturation region, the collector
current becomes independent and
free from the input current IB
• In the cut-off region IC = βIB, a small
The ratio of change in collector
current IC is not zero, and it is equal to
current with respect to base current
reverse leakage current ICEO.
is known as the base amplification
factor. It is represented by β (beta).

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 Common Collector (CC) Configuration

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 I/P and O/P characteristics Curve

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 CC Configuration
• This configuration provides current gain but no voltage
gain.
• In CC configuration, the input resistance is high and the
output resistance is low.
• The voltage gain provided by this circuit is less than 1.
• The sum of collector current and base current equals
emitter current.
• The input and output signals are in phase.
• This configuration works as non-inverting amplifier output.
• This circuit is mostly used for impedance matching to drive
a low impedance load from a high impedance source.
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 Summary Table

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 Transistor Load Line Analysis

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 Transistor Load Line Analysis

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 Transistor Biasing
• Transistor Biasing is the process of setting a transistors
DC operating voltage or current conditions to the
correct level so that any AC input signal can be amplified
correctly by the transistor. (Setting Q-point, IC and VCE)
• Biasing is the process of providing DC voltage which
helps in the functioning of the circuit. A transistor is
based in order to make the emitter base junction
forward biased and collector base junction reverse
biased, so that it maintains in active region, to work as
an amplifier.(maintaining operating point)

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 Contd…
• Establishing the correct operating point requires the
selection of bias resistors and load resistors to provide
the appropriate input current and collector voltage
conditions.
• The correct biasing point for a bipolar transistor,
either NPN or PNP, generally lies somewhere between
the two extremes of operation with respect to it being
either “fully-ON” or “fully-OFF” along its DC load line.
• This central operating point is called the “Quiescent
Operating Point”, or Q-point for short.

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 Fixed Bias Circuit

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 Fixed Base Biasing
Unstable, because IC and
VCE too dependent on .
Since  itself is not
constant for a transistor,
as  changes with
temperature. If a
transistor has to be
replaced by any reason,
finding another transistor
with same value is
impossible. So in fixed
biased , Q-point can not
be maintained at fixed
point. Hence other
biasing are to be
considered if wants to
fixed Q-point and make 
independent.
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 CONTD…

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 Problem Analysis

= 50, 100

Try yourself
putting =100
and compare IC
and VCE

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 Emitter feedback Bias

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 CONTD…
• Apply KVL in loop 1 • Apply KVL in loop 2
VCC – IBRB – VBE – IERE = 0 VCC – ICRC – VCE – IERE = 0
VCC – VBE = IBRB + IERE VCE = VCC – ICRC – IERE
VCC – VBE = IBRB + IB( + 1)RE VCE = VCC – IC (RC + RE)
IB = (VCC – 0.7)/( RB + ( + 1)RE )
IC = IB IE  I C

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 CONTD…

Try yourself putting

=150 and compare
IC and VCE

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 Collector Feedback Bias
Apply KVL
VCC – ICRC – IBRB – VBE =0
VCC – VBE = IBRB + ICRC
= IBRB + IBRC
= IB (RB + RC)
IB = (VCC – VBE)/ (RB + RC)
I’C = IC + IB IC = IB
IC = IB VCE = VCC – ICRC
I’C  IC
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 Another method of analysis

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 Problem Analysis

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 Voltage Divider Bias
• The most widely used
types of bias circuit. It is
more stable (
independent) than other
bias types.
• Two methods of analysis,
exact and approximate
analysis

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 Voltage Divider Bias- Exact analysis

To determine Rth  The voltage

source is replaced by a short
circuit equivalent, resulting

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Voltage Divider Bias- Exact Analysis

The thevenin network is then

To determine Eth: redrawn and IBQ can be
The voltage source Vcc determined by applying KVL.
is ‘on’. Eth – IBRth – VBE – IERE = 0

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Voltage Divider Bias- Exact Analysis
Eth – IBRth – VBE – IERE = 0
IE  IC
Substitute IE = ( + 1) IB  IB ,then

VCE = VCC – IC (RC + RE)

The rest of the parameters

VE, Vc and VB are also similar
as obtained in emitter bias
configuration.

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 Problem Analysis

=22V

10K
39K

=140

3.9K 1.5K

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 Problem Analysis

If  is decreased to 70
and find out the
difference between
the solutions of ICQ
and VCEQ.

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 Small Signal Analysis of BJT

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 g mv
be

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 T-Model

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07/09/2025 49
 Differential Amplifier
• Differential Amplifier is a device which is used to amplify the
difference between the voltages applied at its inputs. OR
• As the name indicates Differential Amplifier is a dc-coupled
amplifier that amplifies the difference between two input
signals.
• Such circuits can be of two types viz.,
– Differential amplifiers built using transistors, either Bipolar Junction
Transistors (BJTs) or Field Effect Transistors (FETs)
– Differential amplifiers built using Op-Amps.
– V0=Ad(Vi1-Vi2)

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 Differential Amplifier
• The most general form
of a differential
amplifier is as shown in
figure along side.
• It has two inputs V1
and V2 .
• The output voltage is
the voltage between
the collectors of the
two transistors
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 Differential Amplifier
• Ideally, the circuit is symmetrical with identical
transistors and collector resistors (Rc).
• When V1 equals V2, the output voltage is zero
(ideally).
• When V1 > V2, the output voltage appears
with 180 phase difference of V1.
• When V1 < V2, the output voltage appears
with opposite polarity

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 + _

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 Modes of Operation

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Differential Amplifier using Op-Amp

Figure: Common mode signal

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 Common Mode Signals
• When the two applied inputs are equal i.e., there is no difference
between the two input voltage the resulting output voltage will be 0.
• But practically when two similar inputs are applied at both the input
terminal, the output does not exactly equal to 0.
• AC=Vo/Vin=Vo/Vc
• Here, Vc is the value of common input applied at both the input terminal
and Vo is the output signal.
• CMRR=AD/AC
• For an ideal amplifier CMRR should be infinite but in actual practice, it is
not so and has a finite value.
• It is defined as the ratio of the desired signal to the undesired signal.
The larger the CMMR the better is the amplifier.
• Differential amplifier provides excellent bias stability because of use of
emitter current bias.
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 BJT as Switch and Logic Circuit
• The areas of operation for a transistor switch are known as the Saturation
Region and the Cut-off Region. This means we can ignore the operating Q-
point biasing (any) circuitry required for amplification, and use the
transistor as a switch by driving it back and forth between its “fully-OFF”
(cut-off) and “fully-ON” (saturation) regions as shown below.

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 Cut-off Region
• The input and Base are grounded OR ( 0V )
• Base-Emitter voltage vI < 0.5V
• EBJ is considered reverse biased and CBJ also is reverse biased
• Transistor is “fully-OFF” ( Cut-off region )
• Since iB=0, No Collector current flows ( iC = 0 )
• VOUT = vCE = VCC = ”1″ so, Transistor operates as an “open
switch”

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 Saturation Region
• The input and Base are connected to VCC OR (+5V)
• Base-Emitter voltage vI > 0.7V, i.e. EBJ is forward biased
• Base-Collector junction is forward biased
• Transistor is “fully-ON” ( saturation region )
• vCE=VCC-iCRC
• vCE = 0 ( ideal saturation )
• VOUT = VCE = ”0″
• iC(max )=iC(sat)=VCC/RC
• Transistor operates as a “closed switch”
• In saturation, vB>vC by 0.4 to 0.6V It follows that
• vC>vE by 0.3 to 0.1V this quantity is vCE(sat)
• normally , vCE(sat)=0.2V

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 BJT as a AND and NAND gate

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 BJT as a OR and NOR gate

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 Field Effect Transistor(FET)
• FET is uni-polar three terminal device.
• It’s operation depends upon only one charge
carriers (holes or electrons).
• It is a voltage controlled device (gate to source
voltage controls drain current)

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 FET Construction

• A single semi-conductor substrate,

doped to form p region or n region.
• two p-type regions are diffused in
the n-type material to form a n-
channel, and both p regions are
connected to gate.
• there are three terminals: Drain and
Source are connected to n channel
and Gate is connected to p region.
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 FET Operation
• Case I: when VGS=0, VDS > 0
– As VDS is increased from 0V, ID will increase proportionally.
– ID is maximum when no VGS is applied.
• Case II: when VGS applied and VDS > 0
– Gate to source reverse bias increases, the depletion region widens
and channel width decreases.
– When VDS increased further, channel completely closes and this is
called pinch-off voltage (VP).
• Case III: VDS > VP
– VDS above pinch-off voltage produces almost constant drain current
– This value of drain current is IDSS ( Drain to Source current with gate
shorted)
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 Drain characteristics

ID decreases as
magnitude of VGS is
increased to large
negative value because
of narrowing the
channel.

Pinch-off occurs at lower value of VDS as VGS

increased to more negative.
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 MOSFET

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N-channel D-MOSFET Construction

• The n channel is connected to

• The Source (S) and Drain (D)
gate via thin insulated layer of
leads connect to the n doped
SiO2 .
regions.
• The n doped material lies in p
• These n doped regions are
substrate that may have
connected by n channel.
additional terminal connection
07/09/2025 67
called SS
07/09/2025 68
 Operation

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 Operation
• When VGS= 0 and VDS applied
– There is no need to induce a channel in D-MOSFET, so as VDS increased, ID
current increases proportionally.
• When VGS is +ve, and VDS applied
– Due to +ve voltage at gate to source terminal, more electrons attract towards
channel from P substrate, so more ID flows at same VDS applied than VGS= 0V.
• When VGS is -ve, and VDS applied
– Due to -ve voltage at gate to source terminal, more electrons repelled from
the channel, less ID flows at same VDS applied than VGS= 0V.
• As the –ve VGS is increased further, a value reached at which channel is
completely depleted charge carriers and I D is reduced to zero even VDS
may be still applied. This negative value of V GS is called pinch-off
voltage, VP .

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 P-Channel D-MOSFET

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 N-Channel E-MOSFET

• Primary difference between enhancement and depletion

type MOSFET is the absence of channel between drain and
source.
• No channel exists between drain and source in E-MOSFET.
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 N-Channel E-MOSFET Operation

VGS = 0, no channel between VGS = + value, channel start to

drain and source
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 N-channel E-MOSFET Operation

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 Operation
• Biasing the gate terminal positive attracts electrons within the p-
type semiconductor substrate under the gate region towards it.
• This over abundance of free electrons within the p-type substrate
causes a conductive channel to appear or grow as the electrical
properties of the p-type region invert, effectively changing the p-
type substrate into a n-type material allowing channel current to
flow.
• So for our n-type MOS transistor, the more positive potential we
put on the gate the greater the build-up of electrons around the
gate region and the wider the conductive channel becomes.
• This enhances the electron flow through the channel allowing
more channel current to flow from drain to source leading to the
name of Enhancement MOSFET.
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 CONT…
• Case I
– When VGS=0V, VDS>0V
– Due to the absence of channel , I D=0A ( called normlly Off MOSFET)
– (ID is not equal to IDSS as in JFET and DMOSFET). In fact the path between
Drain and source has very high(about 10 12Ω) resistance.
• Case II
– VGS>0V, VDS>0V (some positive)
– The positive potential at the gate will pressure the holes (since like charge
repel) in the P-substrate along the edge of the SiO2 layer to leave the area
and enter the deeper region.
– Electrons are attracted to the positive gate and accumulated near the
surface of the SiO2 layer.
– The SiO2 layer prevents absorbing electrons in to the gate terminal acting
an insulating quantities.
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 CONT…
• As VGS increases, concentration of electrons near the SiO2
surface also increases and support a measurable flow of
current between drain and source.
• These accumulated minority charge carriers N -type channel
stretching from drain to source. When this occurs, a channel is
induced by forming what is termed an inversion layer (N-type).
• The value of VGS at which a sufficient numbers of mobile
electrons accumulate in the channel region to form a
conducting channel is called the threshold voltage and is
denoted by VGS(TH) or VTH.
• The value of VTH is controlled during device fabrication and
typically lies in the range 1 to 3 volt.

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 CONT…
• Since the channel is non–existent with VGS=0V and
enhanced by the application of a positive gate-to-source
voltage, this type of MOSFET is called an enhancement
type of MOSFET.
• As VGS↑ i.e. VGS>VTH then ID↑ and VGS<VTH,ID=0A
• ID=K(VGS-VTH)2
• However ,VGS(const)>VTH and VDS↑
• the drain current will eventually reach a
saturation level ,
 Effective voltage, VDS(sat)= VGS-VTH
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 Drain Characteristics

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 Transfer Characteristics

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07/09/2025 81
 MOSFET Logic Circuit

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 Complementary MOSFET (CMOS)
• CMOS referred to as complementary metal oxide semi-
conductor. Complementary refers to the
complementary and symmetrical pairs of N-type and P-
type MOSFETs in its design.
• Main advantage of this is low static power
consumption and noise immunity.
• Since one transistor of the pair is always off, the series
combination draws significant power only momentarily
during switching between ON and OFF states.
• CMOS circuits use to implement logic gates.

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 CMOS Construction

Figure: Construction details of CMOS

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 CMOS Logic Gates
• CMOS Inverter

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 CMOS Inverter

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 CMOS as NAND and AND Gate

CMOS NAND CMOS AND

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 CMOS as OR and NOR Gate

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 END of Unit 3

Thank You !

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