Timer0
Timer0
Chapter 9
A counter register
Comparator
=
A simple design (counting people)
Second design
$FC
A simple design (making delay)
$FC
A generic timer/counter
• Delay generating
• Counting
• Wave-form generating
• Capturing
Oscillator 0
Counter register
COUT
External 1
source
Flag
Counter/Timer
Timers in AVR
• 1 to 6 timers
– 3 timers in ATmega32
• 8-bit and 16-bit timers
– two 8-bit timers and one 16-bit timer in ATmega32
Timer in AVR
Oscillator
TCNTn (Timer/Counter register) External
Counter register
source
TOVn (Timer Overflow flag) Counter/Timer
Flag
TCCRn (Timer Counter control register)
OCRn (output compare register) TCCRn
OCFn (output compare match flag)
TCNTn
TOVn
= OCFn
Comment:
Comment:
All
Allofofthe
thetimer
timerregisters
registersare
are
byte-addressable
byte-addressableI/O I/Oregisters
registers OCRn
Timer 0 (an 8-bit timer)
Timer 0
TCCR0
TCNT0
TOV0
= OCF0
OCF2 TOV2 ICF1 OCF1A OCF1B TOV1 OCF0 TOV0 TIFR
OCR0
Timer Registers
Three main registers in diagram, plus two more, to interact with this particular timer!
TCCR controls the timer functioning, waveform generation mode (PWM, etc), and clock
prescaling! TCNT contains the current clock value, which can be reset and changed at will.
Remember that this is incremented by the pre-scaled clock as configured by the TCCR register!
OCR contains the target clock value at which time an interrupt should be generated or a
pin state should be changed!
A fourth register, ASSR, which is not show on the functional diagram is used on this particular
timer to select between the internal and external clocks, as well as indicate when the timer is busy!
TIMSK (Timer Interrupt MaSK), also not shown, is used to enable interrupts on specific timer
events!
14!
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FOC0 WGM00 COM01 COM00 WGM01 CS02 CS01 CS00 TCCR0
Clock
Timer Selector
Mode (WGM)
(CS)
clk/8
clk/64
clk/256
clk/1024
1 0 1 clk / 1024
1 1 0 External clock source on T0 pin. Clock on falling edge T0
1 1 1 External clock source on T0 pin.
0 Clock on rising edge
CS00 0 1 2 3 4 5 6 7
CS01
CS02
Timer/Counter0 clock
source
II: Atmega8 – Basic features
No prescaler
MAX=0xff
BOTTOM=0
Prescaler = 8
II: Atmega8 – Basic features
0xFF
TOV TOV TOV
0 time
FF
FE TOV0: 0
1
2
1
0 TOV0 = 1
Example 1: Write a program that waits 14 machine
cycles in Normal mode.
UP Counter Register Load
14 = $0E COUT
$100 8
-$0E $F2
$F2
0 0 0 0 1
PSR10
0 0 Normal
clk/8
clk/64
clk/256
clk/1024
0 1 CTC T0
0
1 0 PWM, phase correct
1 1 Fast PWM CS00 0 1 2 3 4 5 6 7
CS01
CS02
Timer/Counter0 clock
source
Example 1: write a program that waits 14 machine
cycles in Normal mode.
$100 FOC0 WGM00 COM01 COM00 WGM01 CS02 CS01 CS00 TCCR0
-$0E OCF2 TOV2 ICF1 OCF1A OCF1B TOV1 OCF0 TOV0 TIFR
$F2
.INCLUDE "M32DEF.INC"
.INCLUDE "M32DEF.INC"
Solution 1 (inaccurate):
LDI R16,0x20
1) Calculating T: SBI DDRB,5 ;PB5 as an output
LDI R17,0
T = 1/f = 1/10M = 0.1µs OUT PORTB,R17
BEGIN: LDI R20,0xF2
2) Calculating num of OUT TCNT0,R20 ;load timer0
machine cycles: LDI R20,0x01
OUT TCCR0,R20 ;Timer0,Normal mode,int clk
$100 AGAIN: IN R20,TIFR ;read TIFR
SBRS R20,0 ;if TOV0 is set skip next inst.
-$F2 RJMP AGAIN
LDI R20,0x0
$0E = 14 OUT TCCR0,R20 ;stop Timer0
LDI R20,0x01
3) Calculating delay OUT TIFR,R20 ;clear TOV0 flag
PSR10
Clear
clkIO 10-bit T/C Prescaler
clk/8
clk/256
clk/64
clk/1024
T0
0
CS00 0 1 2 3 4 5 6 7
CS01
CS02
Timer/Counter0 clock
source
CTC (Clear Timer on Compare match) mode
TCNT0
0xFF
OCR0
OCR0 0
xx TOV0:
2 0
1
OCF0:
1
TOV0 = no change
0
OCF0 = 1
Example 4: Rewrite example 2 using CTC
Rewrite example 2 using CTC
FOC0 WGM00 COM01 COM00 WGM01 CS02 CS01 CS00 TCCR0
• For a square wave with T = 10 µs we must have a time delay of 5 µs. Because XTAL = 10
MHz, the counter counts up every 0.1 µs. This means that we need 5 µs / 0.1 µs = 50
clocks. Therefore, we have OCR0= 49.
.INCLUDE "M32DEF.INC" DDRB |= 1<<3;
LDI R16,0x08
PORTB &= ~(1<<3);
SBI DDRB,3 ;PB3 as an output
LDI R17,0 while (1)
OUT PORTB,R17
{
LDI R20,49
OUT OCR0,R20 ;load timer0 OCR0 = 49;
BEGIN: LDI R20,0x09
OUT TCCR0,R20 ;Timer0,CTC mode,int clk TCCR0 = 0x09;
AGAIN: IN R20,TIFR ;read TIFR
SBRS R20,OCF0 ;if OCF0 is set skip next while((TIFR&(1<<OCF0))==0);
RJMP AGAIN
LDI R20,0x0 TCCR0 = 0; //stop timer0
OUT TCCR0,R20 ;stop Timer0 TIFR = 0x02;
LDI R20,0x02
OUT TIFR,R20 ;clear OCF0 flag PORTB.3 = ~PORTB.3;
EOR R17,R16 ;toggle D3 of R17 }
OUT PORTB,R17 ;toggle PB3
RJMP BEGIN
Timer2
• Timer0 • Timer2
TCCR0 TCCR2
TCNT0 TCNT2
TOV0 TOV2
= OCF0 = OCF2
OCR0 OCR2
= OCF1B
TOV1 = OCF1A
OCF2 TOV2 ICF1 OCF1A OCF1B TOV1 OCF0 TOV0 TIFR
OCR1AH OCR1AL
COM1A1 COM1A0 COM1B1 COM1B0 FOC1A FOC1B WGM11 WGM10 TCCR1A
clk/8
clk/64
clk/256
clk/1024
1 0 1 clk / 1024 T1
1 1 0 External clock source on T0 pin. Clock on falling edge
1 1 1 External clock source on0T0 pin. Clock on rising edge
CS10 0 1 2 3 4 5 6 7
CS11
CS12
Timer/Counter1 clock
source
16 – bit Timer / Counter 1
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16 – bit Timer / Counter 1
● TCNT1, OCR1A,
OCR1B and ICR1
are 16-bit registers
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16 – bit Timer / Counter 1
● Input capture Unit: timestamp external events on ICP1 pin (or on Analog comp.)
Can generate Input Capture Interrupt
AVR Microcontroller and Embedded System Using Assembly and C © 2011 Pearson Higher Education,
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16 – bit Timer / Counter 1
● Output Compare Units: compare TCNT1 with OCR1A and OCR1B
Can generate Output Capture Interrupt
● 13 PWM / Waveform
generation modes
● Auto reload
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16 – bit Timer / Counter 1
● Mode configuration using TCCR1A and TCCR1B
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16 – bit Timer / Counter 1
● Clock source configuration using TCCR1B
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Assuming XTAL = 10 MHz write a program that toggles
PB5 once per millisecond, using Normal mode.
XTALLDI = 10 MHz
.INCLUDE "M32DEF.INC"
1/10 MHz
R16,HIGH(RAMEND) ;init=stack
0.1 pointer
µs
Num.OUT
LDI of machine
SPH,R16
cycles = 1 ms / 0.1 µs = 10,000
R16,LOW(RAMEND)
TCNT1
OUT
SBI = 65,536
DDRB,5 – 10,000 ;PB5
SPL,R16
= 55,536 = $D8F0
as an output
BEGIN:SBI PORTB,5 ;PB5 = 1
RCALL DELAY_1ms
CBI PORTB,5 ;PB5 = 0
RCALL DELAY_1ms TCNT1H TCNT1L
RJMP BEGIN
DELAY_1ms:
LDI R20,HIGH(-10000)
R20,0xD8
OUT TCNT1H,R20
TCNT1H,R20 ;TEMP = 0xD8
LDI R20,R20,0xF0
,LOW(-10000)
OUT TCNT1L,R20
TCNT1L,R20 ;Timer1 overflows
;TCNT1L after
= 0xF0, 10000
TCNT1H machine cycles
= TEMP
LDI R20,0x0
OUT TCCR1A,R20 ;WGM11:10=00
LDI R20,0x1
OUT TCCR1B,R20 ;WGM13:12=00,CS=CLK
AGAIN:IN R20,TIFR ;read TIFR
SBRS R20,TOV1 ;if OCF1A is set skip next instruction
RJMP AGAIN
LDI R20,1<<TOV1
OUT TIFR,R20 ;clear TOV1 flag
LDI R19,0
OUT TCCR1B,R19 ;stop timer
OUT TCCR1A,R19 ;
RET
TEMP register
Data bus (8-bit)
TEMP (8-bit)
LDI R20,0xF3
IN R20,TCNT1L
a = TCNT1L;
TCNT1H = 0xF3;
OUT TCNT1H,R20
IN R21,TCNT1H
b = TCNT1H;
TCNT1L = 0x53;
LDI R20,0x53
OUT TCNT1L,R20
Assuming XTAL = 10 MHz write a program that toggles
PB5 once per millisecond, using CTC mode.
.INCLUDE "M32DEF.INC"
LDI R16,HIGH(RAMEND)
OUT SPH,R16
LDI R16,LOW(RAMEND)
OUT SPL,R16
SBI DDRB,5 ;PB5 as an output
BEGIN:SBI PORTB,5 ;PB5 = 1
RCALL DELAY_1ms
CBI PORTB,5 ;PB5 = 0
RCALL DELAY_1ms
RJMP BEGIN
DELAY_1ms:
LDI R20,0x00
OUT TCNT1H,R20 ;TEMP = 0
OUT TCNT1L,R20 ;TCNT1L = 0, TCNT1H = TEMP
LDI R20,0x27
OUT OCR1AH,R20 ;TEMP = 0x27
LDI R20,0x0F
OUT OCR1AL,R20 ;OCR1AL = 0x0F, OCR1AH = TEMP
LDI R20,0x0
OUT TCCR1A,R20 ;WGM11:10=00
LDI R20,0x09
OUT TCCR1B,R20 ;WGM13:12=01,CS=CLK
AGAIN:
IN R20,TIFR ;read TIFR
SBRS R20,OCF1A ;if OCF1A is set skip next instruction
RJMP AGAIN
LDI R20,1<<OCF1A
OUT TIFR,R20 ;clear OCF1A flag
LDI R19,0
OUT TCCR1B,R19 ;stop timer
OUT TCCR1A,R19 ;
RET
Counting
PSR10
Counting
Clear
clkIO 10-bit T/C Prescaler
clk/8
clk/256
clk/64
clk/1024
T0
0
CS00 0 1 2 3 4 5 6 7
CS01 T0
CS02
Timer/Counter0 clock
source
7
Example Assuming that clock pulses are fed into pin T0, write a program for counter 0
in normal mode to count the pulses on falling edge and display the state of the TCNT0
count on PORTC.
PSR10
Clear
clkIO 10-bit T/C Prescaler
.INCLUDE "M32DEF.INC"
clk/8
clk/64
clk/256
clk/1024
CBI DDRB,0 ;make T0 (PB0) input
LDI R20,0xFF T0
LDI R20,0x06
OUT TCCR0,R20 ;counter, falling edgeCS00 0 1 2 3 4 5 6 7
CS01
AGAIN: CS02
IN R20,TCNT0
OUT PORTC,R20 ;PORTC = TCNT0 Timer/Counter0 clock
IN R16,TIFR source
SBRS R16,TOV0
RJMP AGAIN ;keep doing it
LDI R16,1<<TOV0
OUT TIFR, R16
FOC0RJMP
WGM00 AGAIN
COM01 COM00 WGM01 ;keep
CS02 doing
CS01 itCS00 TCCR0
Assuming that clock pulses are fed into pin T1. Write a program for counter 1 in CTC
mode to make PORTC.0 high every 100 pulses.
.INCLUDE "M32DEF.INC"
CBI DDRB,1 ;make T1 (PB1) input
SBI DDRC,0 ;PC0 as an output
LDI R16, 0X01
LDI R17, 0
LDI R20,0x0
OUT TCCR1A,R20
LDI R20,0x0E
OUT TCCR1B,R20 ;CTC, counter, falling edge
AGAIN:
LDI R20,0
OUT OCR1AH,R20 ;TEMP = 0
LDI R20,99
OUT OCR1AL,R20 ;ORC1L = R20, OCR1H = TEMP
L1: IN R20,TIFR
SBRS R20,OCF1A
RJMP L1 ;keep doing it
LDI R20,1<<OCF1A ;clear OCF1A flag
OUT TIFR, R20
EOR R17,R16 ;SBI PORTC,0 ;PC0 = 1
OUT PORTC, R17 ;CBI PORTC,0 ;PC0 = 0
RJMP AGAIN ;keep doing it
Interrupt
Chapter 10
Contents
• Polling Vs. interrupt
• Interrupt unit
• Steps in executing an interrupt
• Edge trigger Vs. Level trigger in external
interrupts
• Timer interrupt
• Interrupt priority
• Interrupt inside an interrupt
• Task switching and resource conflict
• C programming
Polling Vs. Interrupt
• Interrupt
• Polling – Efficient CPU use
– Ties down the CPU – Has priority
– Can be masked
main( )
{
while (true) Do your common task
{ }
if(PIND.2 == 0)
//do something; whenever PIND.2 is 0 then
} do something
Real Time
Systems
Interrupts
3!
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Real Time Systems
Soft Real Time is when a task not being completed at the desired time causes, for
example, a decrease in system efficiency, but does not result in total failure!
Example: A bottle arrives early to the filling nozzle, causing the bottle to have to wait until the
nozzle can fill it!
4!
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Interrupts
IRQ Sources!
Internal Timers (compared to a specific value or upon
overflow)! External IRQ (a special Input pin function)!
Other Peripherals (UART, I2C, SPI, ADC, Comparator, etc)!
6!
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Interrupt Preemption
It is possible that on a particular system there would be
multiple real-time tasks, with some tasks being more time
critical than others!
9!
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Interrupt Preemption
This is called preemption, and can get extremely complex!
Some processors have a hierarchy of IRQ priorities, which
can specify which IRQ preempt which ISRs!
Other processors do not have this feature, making
preemption quite difficult.!
Some processors will automatically disable all interrupts
while one ISR is running (like the AVR Series). In this case,
you must manually re- enable global interrupts at the
beginning of the ISR for preemption to be possible at all!
10!
AVR Microcontroller and Embedded System Using Assembly and C © 2011 Pearson Higher Education,
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II: Atmega8 – Basic features
II: Atmega8 – Basic features
Interrupt Processing
Reset-Vector and
Interrupt-Vectors
● Word addresses
0, 1 – 19 in Flash Ram
● When a reset or
interrupt occurs,
the CPU calls
the address
● Install an Interrupt
Handler: modify
the vector table to
jump to your user-
handler
Reset-Vector and
Interrupt-Vectors
● example shows
full featured
vector table
● 19 handlers installed
● program execution
after reset:
jmp RESET ($013)
● Main program is
located at $013,
beyond the vectors
II: Atmega8 – Basic features
Reset Sources:
Example:
Power-on Reset
Example:
Brown Out Reset
Interrupt unit
TIFR OCF2 TOV2 ICF1 OCF1A OCF1B TOV1 OCF0 TOV0
TIMSK
SREGOCIE2 ITOIE2 T TICIE1
H OCIE1A
S OCIE1B
V TOIE1
N Z OCIE0C TOIE0
7!
AVR Microcontroller and Embedded System Using Assembly and C © 2011 Pearson Higher Education,
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Steps in executing an interrupt
Addres Code
PB0 1 40 VCC s .INCLUDE "M32DEF.INC"
PB1 2 39 PA0 (ADC0) .ORG 0 ;location for reset
0002 0000 JMP MAIN
(INT2) PB2 3 38 PA1 (ADC1)
.ORG 0x02 ;location for external
(OC0/AIN0) 4 37 PA2 (ADC2) INT0
PB3 JMP EX0_ISR
(SS) PB4 5 ATmega3 36 PA3 (ADC3) 0002
MAIN: LDI R20,HIGH(RAMEND)
(MOSI) PB5 PA4 (ADC4)
(MISO) PB6
6
7
2 35
34 PA5 (ADC5)
0002
OUT
LDI
SPH,R20
R20,LOW(RAMEND)
(SCK) PB7 8 PC 0016
0015
0014
0013
0012
000D
0009
000A
000B
000C
0006
0008
000F
0004
000E
0007
0005
0000 33 PA6 (ADC6) OUT SPL,R20
0004 SBI DDRC,3 ;PC.3 =
RESET 9 : 32 PA7 (ADC7) 0005 output
VCC 10 31 AGND 0006 SBI PORTD,2 ;pull-up
0007 activated
GND 11 30 AVCC LDI R20,1<<INT0 ;Enable
0008
XTAL2 12 29 PC7 (TOSC2) INT0
0009 OUT GICR,R20
XTAL1 13 28 PC6 (TOSC1) 000A SEI ;Set I (Enable
(RXD) PD0 14 27 PC5 (TDI) 000F
000B Interrupts)
(TXD) PD1 15
S 26 PC4 (TDO)
000C LDI R30, 3
000D LDI R31, 4
(INT0) PD2 16 P 25 PC3 (TMS)
000E ADD R30, R31
(INT1) PD3 17 24 PC2 (TCK) 000F HERE:JMP HERE
0010
(OC1B) PD4 18 Stac 23 PC1 (SDA)
EX0_ISR:IN R21,PORTC
(OC1A) PD5 PC0 (SCL)
19 k 22 LDI R22,0x08
(ICP) PD6 20 21 PD7 (OC2) 0012 EOR R21,R22
0013 OUT PORTC,R21
RETI
0014
0015
Interrupt Example Code
Several steps are necessary on the ATmega to enable interrupts!
The control register that is responsible for the interrupt you desire must be
configured to generate an IRQ upon an event!
An ISR must be defined!
Global Interrupts must be enabled!
#include <io.h>
#include <signal.h>
#include <interrupt.h>
int main(void) {
12!
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II: Atmega8 – Basic features
External!
Oscillator!
Current
Timer! Value
(TCNT)!
13!
II: Atmega8 – Basic features
No prescaler
MAX=0xff
BOTTOM=0
Prescaler = 8
II: Atmega8 – Basic features
PORTB.5
Lowest
priority
Interrupt inside an interrupt
• The I flag is cleared when the AVR begins to
execute an ISR. So, interrupts are disabled.
• The I flag is set when RETI is executed.
Task switching and resource conflict
• Does the following program work?
#include "avr/io.h"
#include "avr/interrupt.h"
int main ()
{
DDRC = 1<<3; //PC3 as an output
PORTD = 1<<2; //pull-up activated
GICR = (1<<INT0); //enable external interrupt 0
sei (); //enable interrupts
#include <io.h>
#include <interrupt.h>
#include <signal.h>
void main(void)
{
TCCR0 = 0x05; /* TCNT0 is clocked with cpu/1024 clock */
TIMSK = 1<<TOIE0; /* Timer Overflow Interrupt Enable on TCNT0 */
TCNT0 = 0; /* Reset TCNT0 */
sei(); /* Enable interrupts */
for (;;) {
/* Main loop */
}
}
15!
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Pulse Width Modulation
Vary the duty cycle of a fixed period “square” wave to vary output power!
DC Motor Speed Control, LED Brightness, Servo Positioning, “Poor-manʼs DAC”!
http://www.ece.utep.edu/courses/web3376/concepts/pwm.html!
16!
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PWM Example Code (1/2)
#include <io.h>!
#include <interrupt.h>!
#include <signal.h>!
void main(void)! {!
!DDRL=0x38;!
!PORTL=PORTL | 0x38; //start off with the tri-color LED off! !for (;;) {!
17!
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PWM Example Code (2/2)
void ColorCycle( void )!
{!
!//First, set up the timer/counter #5 for the color LED control! !TCCR5A = (1 <<
COM5A1) | (1 << COM5B1) | (1 << COM5C1) | (1 << WGM50);!
! TCCR5B = (1 << CS52) | (1 << CS50) | (1 << WGM52); // clk/1024, PWM (mode 5 in table 82 of datasheet)! !//Start with just
green!
!OCR5A = 255;!
!OCR5B =
255;! !OCR5C =
0;! !sei();!
!while ( 1 )! !{!
18!
AVR Microcontroller and Embedded System Using Assembly and C © 2011 Pearson Higher Education,
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ATmega2560 Interrupt Unit
3!
AVR Microcontroller and Embedded System Using Assembly and C © 2011 Pearson Higher Education,
Mazidi, Naimi, and Naimi Upper Saddle River, NJ 07458. • All Rights Reserved.
Pulse Width Modulation
Vary the duty cycle of a fixed period “square” wave to vary output power!
DC Motor Speed Control, LED Brightness, Servo Positioning, “Poor-manʼs DAC”!
http://www.ece.utep.edu/courses/web3376/concepts/pwm.html!
4!
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PWM Example Code (1/2)
#include <io.h>!
#include <interrupt.h>!
#include <signal.h>!
void main(void)! {!
!DDRL=0x38;!
!PORTL=PORTL | 0x38; //start off with the tri-color LED off! !for (;;) {!
5!
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PWM Example Code (2/2)
void ColorCycle( void )!
{!
!//First, set up the timer/counter #5 for the color LED control! !TCCR5A = (1 <<
COM5A1) | (1 << COM5B1) | (1 << COM5C1) | (1 << WGM50);!
! TCCR5B = (1 << CS52) | (1 << CS50) | (1 << WGM52); // clk/1024, PWM (mode 5 in table 82 of datasheet)! !//Start with just
green!
!OCR5A = 255;!
!OCR5B =
255;! !OCR5C =
0;! !sei();!
!while ( 1 )! !{!
6!
AVR Microcontroller and Embedded System Using Assembly and C © 2011 Pearson Higher Education,
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