Chapter Contents

Definition of Boolean Algebra

Basic Theorems and Properties of Boolean Algebra
Boolean Functions
Canonical and Standard Forms
Other Logic Operations
Digital Logic Gates
Integrated Circuits
Learning Objectives
•Study and apply the basic rules and theorems of
Boolean Algebra and their applications to digital circuits.
•Apply DeMorgan’s theorems to Boolean expressions.
•Define a given circuit with a Boolean expression and
evaluate its operation.
•Simplify expressions by using the laws and theorems of
Boolean Algebra.
• Convert any Boolean expression into sum-of-
products(SOP) and product-of-sums(POS).
•Study canonical forms of Boolean functions.
•Derive all possible functions for two-variables
•Extension of functions to multiple inputs.
•Positive and Negative logic
•Other logic gates
Boolean Algebra
• Boolean algebra is the basic mathematics needed
for the study of logic design of digital systems.
• In 1854, George Boole an English mathematician in
his famous book “The Laws of Thought” gave the
concept of “Logical algebra” today known as
Boolean algebra.
• Boolean algebra is a convenient and systematic way
of expressing and analyzing the operation of logic
circuits.
• Claude Shannon was the first to apply Boole’s work
to the analysis of relays and switching circuits in
1938.
• In 1904, Huntington gave a set of postulates that
form the basis of formal definition of Boolean
algebra.
 Set Notations

• Mathematical systems can be defined with:

– A set of elements; A set of elements is any collection of
objects having a common property.
– A set of operators; A binary operator defined on a set S of
elements is a rule that assigns to each pair of elements from
S a unique element from S.
– A of unproved axioms or postulates that form the basic
assumptions from which it is possible to deduce the rules,
theorems and properties of the system.
• The following notations are being used in this class:
– x  Sindicates that x is an element of the set S.
– y  S indicates that y is not an element of the set S.
– A = {1, 2, 3, 4} indicates that set A exists with a finite number
of elements (1, 2, 3, 4).
 Basic Postulates
• The postulates of a mathematical system form the basic assumptions
from which it is possible to deduce the rules, theorems, and properties
of the systems. Some common postulates to formulate various algebraic
structures are:
– Closure. A set S is closed w.r.t a binary operator if, for every pair of
elements of S, the binary operator specifies a rule for obtaining a
unique element of S. For example
N={1, 2, 3, 4,…..}
– Associative Law. A binary operator * on a set S is said to be
associative when:
(x * y) * z = x * (y * z)
– Commutative Law. A binary operator * on set S is said to be
commutative when:
x*y=y*x
– Identity Element. A set is said to have an identity element with
respect to a binary operation * on S if there exists an element e, that
is a member of the set with the property:
e * x = x * e = x for every element of the set
• Additive identity is 0 and multiplicative identity is 1
Note: * + and . are binary operators
Basic Postulates
– Inverse. A set S having the identity element e with respect to
a binary operator * is said to have an inverse if for every
element of the set the following property holds:
x*y=e
• The additive inverse of element a is –a and it defines
subtraction, since a + (–a) = 0. Multiplicative inverse of
a is 1/a and defines division, since a.1/a = 1
– Distributive Law. * is said to be distributive over . when
x * ( y · z) = (x * y) · (x * z)
Note: * + and . are binary operators. Binary operator + defines
addition and binary operator . defines multiplication
• Two-value Boolean algebra is defined by the:
– The set of two elements B={0, 1}
– The operators of AND (·) and OR (+)
– Huntington Postulates are satisfied
 Huntington Postulates
• In 1904 E. V. Huntington formulated a number of postulates that give
us formal definition of Boolean algebra. Boolean algebra is an
algebraic structure defined by a set of elements, B , together with two
binary operators, + and . , provided that the following (Huntington)
postulates are satisfied:
1. Closure.
a) with respect to the binary operation OR (+); c=x+y
b) with respect to the binary operation AND (·); c=x.y
2. Identity.
a) with respect to OR (+) is 0:
x + 0 = 0 + x = x, for x = 1 or x = 0
b) with respect to AND (·) is 1:
x · 1 = 1 · x = x, for x = 1 or x =0
3. Commutative Law.
a) With respect to OR (+):
x+y=y+x
b) With respect to AND (·):
x·y=y·x
 Huntington Postulates
4.Continued…
Distributive Law.
a) with respect to the binary operation OR (+):
x + (y · z) = (x + y) · (x + z) + is distributive over .
b) with respect to the binary operation AND (·):
x · (y + z) = (x · y) + (x · z) . is distributive over +
5. Complement. For every element x, that belongs to B, there also
exists an element x´ (complement of x) such that:
a) x + x´ = 1, for x = 1 or x = 0
b) x · x´ = 0 , for x = 1 or x = 0
6. Membership.
There exists at least two elements, x and y, of the set such that
x ≠ y.
0≠1
 Notes on Huntington Postulates
Comparing Boolean algebra with arithmetic and ordinary
algebra, we note the following differences:
• The associative law is not listed but it can be derived from
the existing postulates for both + and . operations.
• The distributive law of + over . i.e.,
x+(y . z) = (x + y) . (x + z)
is valid for Boolean algebra but not for ordinary algebra.
• Boolean algebra doesn’t have inverses (additive or
multiplicative) therefore there are no operations related to
subtraction or division.
• Postulate 5 defines an operator called complement that is
not available in ordinary algebra.
• Boolean algebra deals with only two elements, 0 and 1
 Operator Tables
• A two-valued Boolean algebra is defined on a set of two
elements B={0,1}, with rules for the two binary operators +
and . as shown in the following operator tables:

• AND Operation

• OR Operation

• NOT Operation
Proving the Distributive Law
Duality
• The duality principle states that every algebraic
expression deducible from the postulates of Boolean
algebra remains valid if the operators and identity
elements are interchanged.
– The Huntington postulates have been listed in pairs and
designed as part (a) and part (b).
– If the dual of an algebraic equation is required, we
interchange the OR and AND operators and replace 1’s by 0’s
and 0’s by 1’s.
– Example:
Postulates and Theorems of Boolean Algebra

P2 (a) x+0 =x (b) x.1 = x

P5 (a) x+x´ = 1 (b) x .x´ = 0
T1, idempotent (a) x + x = x (b) x. x = x
T2 (a) x + 1 = 1 (b) x .0 = 0
T3, involution (x´)´ = x
P3, (a) x+y = y+x (b) x.y = y.x
commutative
T4, Associative (a) x+(y+z)=(x+y)+z (b) x.(y.z)
=(x.y).z
P4, distributive (a) x(y+z)=xy+xz (b)
x+yz=(x+y)(x+z)
T5, DeMorgan (a) (x+y)´ =x´.y´ (a) (xy)´=x´+y´
T6, absorption (a) x+x.y = x (a) x.(x+y) =x
 Basic Theorems
• The following six (6) theorems can be deduced from
the Huntington postulates:
– Theorem 1 (idempotent): (a) x+x=x
– Theorem 1: (b) x·x=x
– Theorem 2 (a) x+1=1
– Theorem 2 (b) x·0=0
– Theorem 3 (involution): (x′)′ = x
– Theorem 4 (associative): (a) x + ( y + z) = (x + y) + z
– Theorem 4 (b) x · (y · z) = (x · y) · z
– Theorem 5 (DeMorgan): (a) (x + y)′ = (x′ · y′)
– Theorem 5 (b) (x · y)′ = (x′ + y′)
– Theorem 6 (absorption): (a) x+x·y=x
– Theorem 6 (b) x · (x + y) = x
 Proving Theorem 1(a)
Idempotent Law
x+x=x
x + x = (x + x) · 1 By postulate: 2(b)
= (x + x) · (x + x′) 5(a)
= x + x · x′ 4(b)
=x+0 5(b)
=x 2(a)
Proving Theorem 1(b)
Idempotent Law
x.x=x
x . x = x x + 0 By postulate: 2(a)
= x x + xx′ 5(b)
= x (x + x′) 4(a)
=x.1 5(a)
=x 2(b)
Proving Theorem 2(a)
x+1=1
x + 1= 1 . (x + 1) By postulate: 2(b)
= (x + x′)(x + 1) 5(a)
= x + x' 1 4(b)
= x + x' 2(b)
=1 5(a)
• Theorem 2(b) can be proved by duality:
x.0=0
 Proving Theorem 6(a)
Absorption
x +x . y = x
LHS =x.1+x.y by postulate: 2(b)
= x . (1 + y) 4(a)
= x . (y + 1) 3(a)
=x.1 by theorem: 2(a)
=x by postulate: 2(b)
 Proving Theorem 6(b)
Absorption
x · (x + y) = x
LHS = (x + 0) · (x + y) by postulate: 2(a)
=x+0·y 4(b)
=x+y·0 3(b)
=x+0 by theorem: 2(b)
=x by postulate: 2(a)
Operator Precedence
• The operator precedence for evaluating Boolean
expressions is:
1. Parentheses
2. NOT
3. AND
4. OR
 Boolean Functions
• A Boolean function is an expression described by:
– binary variables
– constants 0 and 1
– logic operation symbols
• For a given value of the binary variables the result of
the function can either be 0 or 1.
• An example function:
– F1 = x + y′z
– F1 is equal to 1 if x is equal to 1 or if both y’ and z equal to 1. F1 is
equal to 0 otherwise
 Function as a Truth Table
• A Boolean function can be represented in a truth table.
– A truth table is a list of combinations of 1’s and 0’s assigned to the
binary variables and and a column that shows the value of the
function for each binary combination
Function as a Gate Implementation
• A Boolean function can be transformed from an algebraic
expression into circuit diagram composed of logic gates.
– F1 = x + y′z
– The logic-circuit diagram for this function is shown below:
Gate Implementation (Examples)

A A B C F
B 0 0 0 0
F 0 0 1 0
A 0 1 0 0
C F = AB + AC
0 1 1 0

B 1 0 0 0
C
1 0 1 1
F
A 1 1 0 1

F = A(B + C) 1 1 1 1
Gate Implementation (Examples)

A
A B F
F
0 0 1
B F = A’ B’ 0 1 0

1 0 0
A 1 1 0
F
B
F = (A + B)’
Minimization
• Functions in algebraic form can be represented in
various ways.
– Remember the postulates and theorems that allow us to represent a
function in various ways.
• We must keep in mind that the algebraic expression is
representative of the gates and circuitry used in a
hardware piece.
– We want to be able to minimize circuit design to reduce cost, power
consumption, and package count, and to increase speed.
• By manipulating a function using the postulates and
theorems, we may be able to minimize an expression.
Non-Minimized Function
• The following is an example of a non-minimized
function:
– F2 = x′y′z + x′yz + xy′
Minimization of the F2
• The function can be minimized as follows:
X′y′z + x′yz + xy′ =
= x′z·(y′+ y) + xy′ by postulate:
4(a)
= x′z ·1 + xy′
5(a)
= x′z + xy′
2(b)
Implementation of Boolean Function

• Minimized
Function
Algebraic Manipulation
• By reducing the number of terms, the number of literals
(single variable) or both in a Boolean function, it is
possible to obtain a simpler circuit, as each term
requires a gate and each variable within the term
designates an input to the gate .
• For example consider the following function F1
F1 = x′y′z + x′yz + xy′ which contains 3 terms and 8 literals
After simplification the minimized function is F2 = x′z + xy′ and it
contains 2 terms and 4 literals.
• The reduced function contains lesser terms and
literals. It can now be implemented with fewer gates
i.e optimized design.
Example Manipulations
• The following are some example manipulations:
1. x(x′ + y) = xx′ + xy = 0 + xy = xy
2. x + x′y = (x + x′)(x + y) = 1(x + y) = x + y
3. (x + y)(x + y′) = x + xy + xy′ + yy′ = x(1 + y + y′) = x
4. xy + x′z + yz = xy + x′z + yz(x + x′)
= xy + x′z + xyz + x′yz
= xy(1 + z) + x′z(1 + y)
= xy + x′z
5. (x + y)(x′+z)(y+z) = (x + y)(x′+z)(y+z+x.x′)
= (x + y)(x′+z)(y+z+x)(y+z+x′)
= (x + y)(x+y+z)(x′+z)(x′+z+y)
= (x + y)(x′+z)
Complement of a Function
• The complement of a function F is F′.
– It is obtained by interchanging 0’s for 1’s and 1’s for 0’s in the value
of F.
• The complement of a function may be derived
algebraically through DeMorgan’s theorem.
– Theorem 5(a) (DeMorgan): (x + y)′ = (x′ · y′)
– Theorem 5(b) (DeMorgan): (x · y)′ = (x′ + y′)
• Example:
– F1 = x′yz′ + x′y′z
F1′ = (x′yz′ + x′y′z)′
= (x + y′ + z)(x + y + z′)
Complement of a Function (Example)
• If F1 = A+B+C
• Then F1'=(A+B+C)'
= (A+X)' let B+C = X
= A'X' by DeMorgan's
= A'(B+C)'
= A'(B'C') by DeMorgan's
= A'B'C' associative
• The generalized expression for DeMorgan’s law for a
function with multiple terms is
(A+B+C+D+….)′=A′.B′.C′.D′…..
(A.B.C.D…..)′= A′+B′+C′+D′+….
Complement of a Function (More Examples)
• F=x'yz' + x'y′z
F′=(x'yz' + x'y'z)′
F'= (x'yz')' (x′y'z)'
= (x+y'+z) (x+y+z')
• F=[x(y'z'+yz)]
F′=[x(y'z'+yz)]'
F'= x' + ( y'z'+yz)'
= x' + (y'z')′.(yz)'
= x' + (y+z) (y'+z')
• A simpler procedure
– take the dual of the function (interchanging AND and OR operators
and 1’s and 0’s) and complement each literal. {DeMorgan’s Theorem}
– x'yz' + x'y'z
The dual of function: FD= (x'+y+z') (x'+y'+z)
Complement of each literal: F' =(x+y'+z)(x+y+z')
Representation Conversion
• Need to transition between Boolean expression, truth
table, and circuit (symbols).
• Converting between truth table and expression is
easy.
• Converting between expression and circuit is easy.
• More difficult to convert to truth table.

Circuit Boolean
Expression

Truth
Table
Canonical Forms
• A canonical form is a standard method for representing
Boolean functions.
• The two canonical forms that are used are:
– Sum of Minterms
– Product of Maxterms
• These forms are sometimes considered the “brute
force” method of representing functions as they seldom
represent a function in a minimized form.
• Examples of these two forms are:
F1 = xyz′+xy′z+x′y′z′
F2 = (x+y+z′)(x+y′+z)(x′+y′+z′)
Minterms
• Any given binary variable can be represented in two forms:
– x, its normal form, and
– X′, its complement
• If we consider two binary variables and the AND operation, there
are four combinations of the variables:
– Xy
– Xy′
– X′y
– X′y′
• Each of the above four AND terms is called a minterm or a
standard product.
• n variables can be combined to form 2n minterms.
Minterms Expressed

ʼ
 Maxterms
• Any given binary variable can be represented in two forms:
– x, its normal form, and
– X′, its complement
• If we consider two binary variables and the OR operation,
there are four combinations of the variables:
– x+y
– x + y′
– X′ + y
– X′ + y′
• Each of the above four OR terms is called a maxterm or a
standard sum.
• n variables can be combined to form 2n maxterms.
• Each maxterm is the complement of its corresponding minterm
and vice-versa.
Maxterms Expressed
Truth Table to Expression (Sum of Minterms)
• Any Boolean function can be expressed as a sum of
minterms or sum of products (i.e. the ORing of terms).
– You can form the function algebraically by forming a minterm for each
combination of the variables that produces a 1 in the function. (Each row
with output of 1 becomes a product term)
– Sum (OR) product terms together.
x y z G
0 0 0 0
0 0 1 0
0 1 0 0
0 1 1 1
1 0 0 0
1 0 1 0
1 1 0 1
1 1 1 1
xyz + xyz′ + x′yz
Sum of Minterms Example

F1 = x’y’z’ + x’yz + xy’z’

= m0+m3+m4
= ∑(0,3,4)
Equivalent Representations of Circuits
• All three formats are equivalent
• Number of 1’s in truth table output column equals
AND terms for Sum-of-Products (SOP)
x y z G
0 0 0 0
0 0 1 0 x x
x
0 1 0 0 G
x
0 1 1 1 x
x
1 0 0 0 x
1 0 1 0 x
x
1 1 0 1
1 1 1 1
x y z
G = xyz + xyz′ + x′yz
Truth Table to Expression (Product of Maxterms)

• Any Boolean function can be expressed as a product of

maxterms or product of sums (i.e. the ANDing of terms).
– You can form the function algebraically by forming a maxterm for each
combination of the variables that produces a 0 in the function. (Each
row with output of 0 becomes a standard sums)
– AND these maxterms together.
 Product of Maxterms Example

F1 = (x + y + z’)(x + y’ + z)(x’ + y + z’)(x’ + y’ + z)(x’ + y’ +

z’)
= M1M2M5M6M7
= ∏(1,2, 5, 6, 7)
 Minterms and Maxterms

• Each variable in a Boolean expression is a literal

• Boolean variables can appear in normal (x) or complement
form (x’)
• Each AND combination of terms is a minterm
• Each OR combination of terms is a maxterm
• Example:
Minterms Maxterms

x y z Minterm x y z Maxterm
0 0 0 x’y’z’ m0 0 0 0 x+y+z M0
0 0 1 x’y’z m1 0 0 1 x+y+z’ M1
… …
1 0 0 xy’z’ m4 1 0 0 x’+y+z M4
… …
1 1 1 xyz m7 1 1 1 x’+y’+z’ M7
Obtaining Sum of Minterms Form

F = A’B’C’ + A’B’C + A’BC’ + A’BC + AB’C’ + AB’C+

ABC
= m0 + m1 + m2 + m3 + m4 + m5 + m7
F(A, B, C) = ∑(0, 1, 2, 3, 4, 5, 7)
Obtaining Product of Maxterms

F = (A +B + C)(A’ + B + C)(A’ + B’ + C)(A’ + B’ + C’)

= M0 . M4 . M 6 . M 7
F(A, B, C) = ∏(0, 4, 6, 7)
 Canonical Form Conversion

• A function represented as Sum of minterms can be

represented as the Product of maxterms of the remaining
terms.
• The complement of a function expressed in sum of minterms equals
the sum of minterms missing from the original function
– F(A, B, C) = ∑(0, 3,4) = m0+m3+m4
– F’(A, B, C) = ∑(1,2,5,6,7)= m1+m2+m5+m6+m7
• Now if we take the complement of F’ using DeMorgan’s theorem, we
obtain F in the product of maxterms form:
– (F’)’ = (m1+m2+m5+m6+m7)’
– F = m1’ . m2’ . m5’ . m6’ . m7’ [Complement of minterms]
– = M1M2M5M6M7 [maxterms]
– = ∏(1,2, 5, 6, 7)
• This implies the following relation:
– m’j = Mj
• So sum of minterms: ∑(0,3,4) = product of maxterms: ∏(1,2, 5, 6, 7)
Table A: Conversion of Forms
Table B: Application of Table A
Standard Forms

• Standard forms are those forms that allow the terms

forming the function to consist of any number of the
variables.
• There are two standard forms:
– sum of products (SOP)
– product of sums (POS)
• Examples of these two forms are:
F=xy′+x′yz SOP
G=(X+Y′)(X′+Y+Z) POS
Sum of Products
• The Sum of Products (SOP) is a Boolean expression
containing AND terms, called product terms, of one or
more literals each.
– F1 = y′ + xy + x′yz′
Product of Sums

• The Product of Sums (POS) is a Boolean expression

containing OR terms, called sum terms, of one or
more literals each.
– F2 = x(y′ + z)(x′ + y + z′)
Two Level Implementation

• The standard type of expression results in a two-level

gating structure
Conversion from Nonstandard to Standard Form

• A Boolean function may be expressed in a nonstandard

form (fig 2.4a shows a function that is neither in sum of
products nor in product of sums). It has three levels of
gating
• It can be converted to a standard form (Sum of product)
by using distributive law to remove parenthesis
• Two-level implementation is preferred as it produces the
least amount of delay
Other Logic Operations
• Given two Boolean variables:
– When binary operators AND and OR are placed between two
variables they form two Boolean functions x . y and x + y
– there are 22x2 = 16 combinations of the two variables as there are
22n possible functions for n binary variables (we will see the
details of these 16 functions in next slides)
– each combination of the variables can result in one of two values,
0 or 1, therefore there are 24=16 functions (combinations of 0’s
and 1’s for the four combinations, 00,01,10,11)
• These 16 functions listed can be subdivided into three
categories:
– Two functions that produce a constant 0 or1.
– Four functions with unary operations: complement and transfer.
– Ten functions with binary operators that define eight different
operations: AND, OR, NAND, NOR, exclusive-OR, equivalence,
inhibition, and implication.
Function Combinations

• F1 represents the AND Operation

• F7 represents the OR Operation
• There are 14 other functions
16 Two-Variable Functions
Function Gate Implementations
Function Gate Implementations
• It is easier to implement a Boolean function with these
types of gates (as seen on last slide)
• Inverter (Complement), Buffer (transfer), AND, OR,
NAND, NOR, X-OR, and XNOR (equivalence) are used as
standard gates in digital design
• NAND and NOR are extensively used logic gates and are
more popular than AND and OR gates because these
gates are easily constructed with transistor circuits and
digital circuits are easily implemented with them.
• Implication and inhibition are not commutative or
associative and thus are impractical to use as standard
logic gates.
Multiple Inputs

• All of the previously defined gates, with the exception

of the inverter and the buffer, can have multiple
inputs.
– A gate can have multiple inputs provided it is a binary
operation that is commutative (x + y = y + x and xy = yx) and
associative (x + (y + z) = (x + y) + z and x(yz) = (xy)z)
– NAND and NOR functions are commutative but not
associative.
For example, for NOR
X Y=Y X commutative
(X Y) Z ≠ X (Y Z) not associative
xz′+yz′≠x′y+x′z
– To overcome this difficulty we define multiple NOR (or NAND)
gate as a complemented OR (or AND) gate e.g., as (x+y+z)′ or
(xyz)′
Multiple Inputs (Non-associative NOR operation)
Multiple Inputs NOR and NAND gates
 Multiple Inputs XOR gate

• 3-input XOR gate is normally implemented by cascading

2-input gates (multiple inputs XOR is uncommon from
hardware point)
 Positive and Negative Logic
• Binary signals in a circuit can have one of two values.
– One signal represents logic-1 and the other logic-0.
• A circuit input or output will hold either a high or low
signal.
– Choosing the high level, H, to represent logic-1 is called a positive
logic system.
– Choosing the low level, L, to represent logic-1 is called a negative
logic system
Positive and Negative Logic gates
Integrated Circuits

• An integrated circuit (IC) is a silicon semiconductor

crystal, called a chip, containing the electronic
components for constructing digital gates.
– Gates are interconnected within the chip to form the required circuit
– The IC is housed inside a ceramic or plastic container with
connections welded to external pins
– There can be 14 to several thousand pins on a chip
– Each IC has a numeric designation printed on the surface for
identification. The number can be looked up in catalogs (paper and
electronic) that contain descriptions and information about the IC
Levels of Integration
• ICs are categorized by the number of gates that they
contain in them:
– Small-scale integration (SSI) devices contain several (usually less
than 10) independent gates in a single package. Early 60’s
– Medium-scale integration (MSI) devices include 10 to 1000 gates in a
single package, used to perform elementary digital operations. Late
60’s
– Large-scale integration (LSI) devices contain thousands of gates in a
single package, used in processors, memory chips, and
programmable logic devices. Mid 70’s
– Very Large-scale integration (VLSI) devices contain hundreds of
thousands of gates in a single package, used in large memory arrays
and complex microcomputer chips. 80’s
– Ultra Large-scale integration (ULSI) devices contain millions of gates
in a single package. 90’s and 00’s
– Giga-scale integration (GSI) devices contain hundreds of millions of
gates in a single package.
– Tera-scale integration (TSI) devices contain millions of millions of
gates in a single package.
Digital Logic Families

• ICs are also classified by the specific circuit

technology (digital logic family) that they belong to:
– Transistor-transistor logic (TTL) is a standard.
– Emitter-coupled logic (ECL) is used in high-speed operation.
– Metal-oxide semiconductor (MOS) is used for high component
density.
– Complementary metal-oxide semiconductor (CMOS) is used in
low power consumption.
– Diode-Transistor Logic (DTL) being obsolete not used these
days.
– Resistor-Transistor Logic (RTL) not used these days.
Logic Family Characteristics

• Digital logic families are usually compared by the

following characteristics:
– Fan-out specifies the number of standard loads that the output of a
gate can drive without impairing its normal operation or it specifies
the amount of current that an output needs to drive many input pins
on other gates.
– Fan-in is the number of inputs available in a gate.
– Power dissipation is the power consumed by the gate.
– Propagation delay is the average delay time for the signal to
propagate from input to output.
– Noise margin is the maximum external noise voltage added to an
input signal that does not cause an undesirable change in the circuit
output.
– Reliability is the long-term success factor of the IC.
 Integrated Circuits Design

• Why is it better to have more gates on a single chip?

– Easier to build systems
– Less power consumption
– Higher clock frequencies
• What are the drawbacks of large circuits?
– Complex to design
– Chips have design constraints
– Need tools to help develop integrated circuits
• Need tools to help develop integrated circuits
– Computer Aided Design (CAD) tools
– Automate tedious steps of design process
– Hardware description language (HDL) describe circuits
 End
End ofof Chapter2
Chapter 1