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2. the 8086 Microprocessor

The 8086 microprocessor is a 16-bit processor with a 16-bit data bus and a 20-bit address bus, allowing access to 1,048,576 memory locations. It consists of a Bus Interface Unit (BIU) and an Execution Unit (EU), with the EU performing arithmetic operations and managing a flag register for instruction conditions. The architecture includes segment registers for memory management and various addressing modes for data transfer operations.

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2 views

2. the 8086 Microprocessor

The 8086 microprocessor is a 16-bit processor with a 16-bit data bus and a 20-bit address bus, allowing access to 1,048,576 memory locations. It consists of a Bus Interface Unit (BIU) and an Execution Unit (EU), with the EU performing arithmetic operations and managing a flag register for instruction conditions. The architecture includes segment registers for memory management and various addressing modes for data transfer operations.

Uploaded by

zainarahmans632
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© © All Rights Reserved
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Download as PPTX, PDF, TXT or read online on Scribd
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The 8086 Microprocessor

Farhan Sadaf
Lecturer, Dept. of CSE
The 8086
• It is a 16-bit microprocessor
• It’s ALU, internal registers and most of the instructions are designed
to work with 16-bit binary words
• It has 16-bit data bus
• It has 20-bit address bus = 220 (1,048,576) memory locations
8086 Internal Architecture
• 8086 CPU is divided into two independent functional parts:
• Bus interface unit (BIU)
• Execution unit (EU)
8086 Internal Architecture
8086 Internal Architecture
• BIU handles all transfers of data and addresses on the buses for the
execution unit
• The execution unit of the 8086 tells the BIU where to fetch
instructions or data from, decodes instructions, and executes
instructions
• The EU has a 16-bit arithmetic logic unit which can add, subtract,
AND. OR, XOR, increment, decrement, complement, or shift binary
numbers
Flag Register
Flag Register
• Is a flip-flop which indicates some condition produced by the
execution of an instruction or controls certain operations of the EU
• A 16-bit flag register in the EU contains nine active flags
• Six of the nine flags are used to indicate some condition produced by an
instruction – CF, PF, AF, ZF, SF, OF
• Three remaining flags In the flag register are used to control certain
operations of the processor – TF, IF, DF
• At any given time the 8086 works with
only four 65,536-byte (64-Kbyte)
segments within its 1,048,576-byte
Segment Registers
(1-Mbyte) range

• Four segment registers (CS, SS, ES, DS)


are used to hold the upper 16 bits of
the starting addresses of four memory
segment – segment base
• The BIU always inserts zeros for the
lowest 4 bits (nibble) of the 20-bit
Instruction Pointer
starting address for a segment
• The value contained in the IP is
referred to as an offset
• A 64-Kbyte segment can be located
anywhere within the 1-Mbyte
address space, but the segment
will always start at an address with
zeros in the lowest 4 bits
• An alternate way of representing a 20-bit physical address is

Segment base : offset


348A : 4214
• A stack is a section of memory
Stack Segment Register and (64-Kbyte) set aside to store
Stack Pointer Register addresses and data while a
subprogram executes
• Stack Segment (SS) register is
used to hold the upper 16 bits
of the starting address for the
program stack
• Stack Pointer (SP) register
holds the 16-bit offset from
the start of the segment to the
memory location where a
word was most recently stored
on the stack
Pointer and Index Registers
• These three registers can be used
• Base Pointer Register (BP) for temporary storage of data just
• Source Index Register (SI) as the general-purpose registers
• Destination Index Register (DI) • However, their main use is to hold
the 16-bit offset of a data word in
one of the segments
Addressing Modes
MOV destination, source
1. Immediate addressing mode
• MOV CX, 437BH
2. Register Addressing mode
• MOV CX, AX
3. Direct Addressing Mode
• MOV BL, [437AH]
• MOV BX, [437AH]
References
• Microprocessors and Interfacing: Programming and Hardware Douglas V. Hall

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