CSEN Computer Organization and system

402 programming
Lectur
e
Basic computer (2)
5 Textbook chapter 5

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Spring 2025 Dr. Milad Ghantous MET department-German University in Cairo
Part 1
Computer Instructions

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Instruction formats
• All instructions are 16-bits long but have different formats.

• We have 3 different formats:

1. Memory reference format

2. Register reference format

3. Input/output (I/O) format

3
 seen
Format 1 Memory reference last
week

15 14 12 11 0
I Opcode Address

• Opcode (3 bits) from 000

Addressing to 110. Memory
mode bit.
0 for direct
• Opcode 111 is reserved address
1 for indirect for register and I/O (12 bits)
formats

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Format 1 Examples

Represented in HEX

Direct 0 001 000000001111 100F

Indirect 1 001 000000001111 900F

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 Quick exercise set 1
• How many operations can be done in memory given a 3-bit opcode?

• 8 operations only, and if we remember that “111” is reserved, this leaves us with
7 operations only! This will change later.

• What’s the range (in HEX) of the first 4 bits for ALL memory format instructions?

• Since 111 opcode is reserved:

this means the 4 MSBs range from 0000 to 0110 (direct)
and 1000 to 1110 (indirect)
• in HEX: (0 to 6) for direct, and (8 to E) for indirect
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Format 2 Register reference

15 14 12 11 0
0 111 operation or test on the AC register

• Always “111” No address is needed, so

A “0” here with
the 12 bits are used to
“111” in opcode for all register
specify the operation or the
means a register operations and test to be done on the
operation I/O accumulator register AC

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Format 3 I/O format

15 14 12 11 0
1 111 Type of I/O operation or test

A “1” here with • Always “111”

“111” in opcode for all register
means an I/O operations and
operation I/O

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 Quick exercises set 2
• Identify these formats:

0 001 000000001111

0 111 000000001111

1 111 000000001111

• In conclusion, whenever the control unit detects “X111” in the 4 MSB bits of the
instruction, this means either register or I/O. If X=0, register and if X=1 means I/O
• When control unit sees anything except X111 it understands this is memory format.
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 Quick exercises set 3
• What is in binary and HEX representation the range of all
the formats?

• 1) Memory format:

0000xxxxxxxxxxxx to 0110xxxxxxxxxxxx  0000 to 6FFF

1000xxxxxxxxxxxx to 1110xxxxxxxxxxxx  8000 to EFFF
Binary HEX

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List of all available memory instructions

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 Quick exercises set 4
• What is in binary and HEX representation the range of all
the formats?

• 2) Register format

0111000000000000 to 0111111111111111  7000 to 7FFF

Binary HEX

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List of all available register instructions
Symbol Hex code Description

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 Quick exercises set 5
• What is in binary and HEX representation the range of all
the formats?

• 3) I/O format

1111000000000000 to 1111111111111111  F000 to FFFF

Binary HEX

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List of all available I/O instructions
Symbol Hex code Description

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The complete set
• Which instruction is this?

0011 0000 0000 1111

• Which instruction is this?

0111 0000 0010 0000

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Instruction set
• Any machine should have minimum amount of instructions
available to perform the following 4 categories:

1. Arithmetic, logical, and shift instructions

2. Instructions for moving information to and from memory and

processor registers.

3. Program control instructions together with instructions that check

status conditions

4. Input and output instructions 17

Type 1
Arithmetic, logical, and shift
instructions

• Which instruction(s) should we use to achieve

subtraction?

ADD, CMA and INC

• Which instruction(s) should we use to achieve

multiplication and division?

ADD, CIR/CIL and subtraction

• Which instructions should we use to achieve

NAND operation?

AND and CMA 18

Type 2
Moving information

• Which instruction(s) should we use to

achieve moving data from the
memory to the registers?

LDA

• Which instruction(s) should we use to

achieve moving data from the
registers to the memory?

STA
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Type 3
Program control

• Branches, jumps and skip instructions:

BUN, BSA, ISZ, SPA, SNA, SZA,
SZE

• Code examples where some of the above

can be used:

• if(i==0)
• if(i==j)
• m = myFunction(a,b);

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Branching in brief
PC = 80 initially
inst 1
func (a,b){
1- we branch to 1st instruction of function
… inst 2
PC becomes 1
return a+b;} inst 3
… …
… .. 2- when PC becomes 3, return is called,
we should branch back to the next
Main () {
address where we left off, PC = 81

j = func(k,m);
inst 80
i= 2; inst 81
…. ….
}
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Type 4
I/O

• Used to move information between the

computer from/to external devices such
as keyboard and screen.

• Examples: INP, OUT

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Is this instruction set enough?
• It’s enough to implement all our functions, but it’s inefficient!

• Reason:
Frequently used operations, like multiplication, subtraction and
so on require several instructions to be achieved.

• At this point, we will see how this set is implemented in

hardware and later we will keep adding instructions to the set
and updating the hardware.

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 MEMORY
Address Content
000
Example Assembly 001
002
• Show how you would this code, written in 003
java, be converted into assembly using
004
the instruction set of the basic computer. Of course,
005 these fields are
006 filled by values
k= i+j; 007 of the variables,
each is 16 bits.
m= i-j; 008 For the sake of
… example here,
they are
Assumptions: 20A i represented
The compiler chose memory locations 20A, 20B, 20C, and j using their
20B
20D for variables i,j,k,m. names
20C k
20D m
…
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Solution This assembly code might contain some pseudo-code. Exact assembly will be given
in later lectures

k= i+j; LDA 20A // load i into AC

m= i-j; ADD 20B // add j to AC

STA 20C // store AC to k

LDA 20B // load j into AC

CMA // complement AC
INC // increment AC (now –j is in AC)
ADD 20A // add i to AC
STA 20D // store to m

Where do you think the binary equivalent of this code is stored? 25

 MEMORY
• Assume the operating system 0
chose to store the code starting 1 LDA 20A
at address 1. could be 2 ADD 20B
anywhere else 3 STA 20C
4 LDA 20B
5 CMA
• When we decide to execute 6 INC
this code, PC is initialized to 1 7 ADD 20A
and keeps getting incremented 8 STA 20D
by 1 after each instruction …
finishes execution. 20A i
20B j
20C k
20D m
…
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Part 2
Timing and control

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Clock
• The whole system is driven by a common clock that is fed into
all registers and flip flops.

• Registers only change their values on a clock edge, only if

those registers are enabled (via their load input as seen
before).

• Otherwise, they retain their current values.

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Control signals
• Control signals provide control inputs for:
1. Multiplexers of the common bus
2. Control inputs in processor registers
3. Micro-operations for AC

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 Types of control
1. Hardwired control: 2. Micro-Programmed control
• The control logic is implemented with gates, flip-
flops, decoders, and other digital circuits. • The control information is stored in a control
memory.
• It has the advantage that it can be optimized to
produce a fast mode of operation. • The control memory is programmed to initiate
the required sequence of microoperations.
• But any change in the design (like adding a new
register) requires a change in the control • A change in the hardware require only
hardware as well. changing the program to control it.

• Will be discussed in chapter 7. 30

Hardwired
Control Unit

• Two decoders

• A sequence counter

To basic
• Control logic gates computer
registers
and memory
• Timing signals and bus

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Opcode
reading

• 3-8 decoder

…
decodes the 3-bit
opcode from the IR
and sends a ‘1’ to
one of the signals
D0 thru D7.

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Addressing
mode reading

…
• The addressing
mode bit is also
read and sent to
the control gates.

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Sequence
counter
• A sequence counter is used
to generate a 4-bit value from
0000 to 1111 that are fed into
a decoder that generates
Timing control signals T0 to
T15.

• One of the T signals is ‘1’ at a

time.

• The counter can be cleared at

anytime to restart the count. 34
Example 1
• Suppose we want the SC to
provide timing signals T0 to
T4, and then resets back to
T0 when D3 is active (=‘1’)

starting this edge, D3

and T4 are ones, so
clear should become 1
T15
T0
On this edge, the clear
takes effect as it’s
now seen as 1, and
notice the SC goes
back to 0000
generating T0
inc
clr SC
value 0000 0001 0010 0011 0100 0000
clk
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Example 2
• We want to implement this:

• What should the bus

control be?
• When to enable the “load”
of the AR register?
• When does the transfer
occur? The transfer occurs here,
after this edge
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End of lecture 5

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