Lect 2 ETEN403 Microcontroller and Embedded System Applications
Lect 2 ETEN403 Microcontroller and Embedded System Applications
DESIGN
ETEN403
ARCHITECTURE &
ORGANIZATION 0F 8055
LECTURE II
ETEN403 Microcontroller and Embedded System Applications Lecturer: Engr. Dr. M. J. MUSA MCOREN, MNIAE, MIAENG, MMACE.
1
THE COMPUTER
COMPUTER
SYSTEM
CPU
INTER
CONNECTION
MEMORY
I/O DEVICES
ETEN403 Microcontroller and Embedded System Applications Lecturer: Engr. Dr. M. J. MUSA MCOREN, MNIAE, MIAENG, MMACE.
Von Neumann Architecture
Basic Characteristics are
Both data and instructions are stored in
The
R/Wcontents
memory of R/W memory are accessed by
Instructions are accessed and executed
location n
sequentially DATA “
SYSTEM BUS “
&
“
PROGRAM
“
2
1
CPU
I/O 0
R/W MEMORY
CPU is responsible for sequentially fetching instruction and data
from the memory and stored temporarily inside the CPU and then
execute one after the other. The result may be stored inside the CPU
or back to the memory.
ETEN403 Microcontroller and Embedded System Applications Lecturer: Engr. Dr. M. J. MUSA MCOREN, MNIAE, MIAENG, MMACE.
3
MICROPROCESSOR ARCHITECTURE
CPU
Basic Characteristics are
REGISTE I SYSTEM BUS
RS N MEMORY
ALU T
E
TIMING R
& F
CONTROL A
UNIT C I/O
E
µp (CPU-ON-A-
CHIP)
Different components presents in micro-processor in other words the
sub-components present inside the CPU.
ETEN403 Microcontroller and Embedded System Applications Lecturer: Engr. Dr. M. J. MUSA MCOREN, MNIAE, MIAENG, MMACE.
4
REGISTER SECTION
ETEN403 Microcontroller and Embedded System Applications Lecturer: Engr. Dr. M. J. MUSA MCOREN, MNIAE, MIAENG, MMACE.
5
CLASSIFICATION OF REGISTER
(By Type)
ETEN403 Microcontroller and Embedded System Applications Lecturer: Engr. Dr. M. J. MUSA MCOREN, MNIAE, MIAENG, MMACE.
6
SPECIAL PURPOSE REGISTER
a) Overflow
b) Outcome (‘+tive’ or ‘_tive’)
c) Parity of the result
ETEN403 Microcontroller and Embedded System Applications Lecturer: Engr. Dr. M. J. MUSA MCOREN, MNIAE, MIAENG, MMACE.
7
SPECIAL PURPOSE REGISTER CONT..
routing call.
ETEN403 Microcontroller and Embedded System Applications Lecturer: Engr. Dr. M. J. MUSA MCOREN, MNIAE, MIAENG, MMACE.
8
CLASSIFICATION OF REGISTERS
(By Accessibility)
User Accessible
Not User Accessible
General
Purpose
User
Accessible
Special
Purpose
ETEN403 Microcontroller and Embedded System Applications Lecturer: Engr. Dr. M. J. MUSA MCOREN, MNIAE, MIAENG, MMACE.
9
CLASSIFICATION OF REGISTERS
CONT…
MAR
Not MDR
User
Accessible IR
TEMP
ETEN403 Microcontroller and Embedded System Applications Lecturer: Engr. Dr. M. J. MUSA MCOREN, MNIAE, MIAENG, MMACE.
10
NOT USER ACCESSIBLE
MAR •Hold ADDR before it comes to ADDR bus for accessing memory & I/O devices
MDR •Used as buffer register to store data, which is access through the system bus that are read from memory & I/O devices
IR •Used to temporarily hold instruction before it is being decoded and executed by the µP
ETEN403 Microcontroller and Embedded System Applications Lecturer: Engr. Dr. M. J. MUSA MCOREN, MNIAE, MIAENG, MMACE.
11
NOT USER ACCESSIBLE CONT…
•Used to hold
intermediate result,
TEMP
which is apply to the
ALU or to other
functions
ETEN403 Microcontroller and Embedded System Applications Lecturer: Engr. Dr. M. J. MUSA MCOREN, MNIAE, MIAENG, MMACE.
12
REGISTER ORGANZATION OF 8085
ACC (8)
GENERAL
B (8) C (8)
D (8) E (8) PURPOS
H (8) L (8) E
PC REGISTE
(16) RS
SP
PSW Flag bit S – Z – AC – P
(16)
- CY
CARRY
PARITY
AUXILIARY
CARRY
ZERO
SIGN
ETEN403 Microcontroller and Embedded System Applications Lecturer: Engr. Dr. M. J. MUSA MCOREN, MNIAE, MIAENG, MMACE.
13
FLAG BITs
ETEN403 Microcontroller and Embedded System Applications Lecturer: Engr. Dr. M. J. MUSA MCOREN, MNIAE, MIAENG, MMACE.
14
FLAG BITs CONT…
Note: Flag bits are very important for implementing various types of
control loops or decision making & they are useful in writing programs for
different applications.
ETEN403 Microcontroller and Embedded System Applications Lecturer: Engr. Dr. M. J. MUSA MCOREN, MNIAE, MIAENG, MMACE.
15
REGISTER-PAIR
bit ADDR
BC • Cascading register B & C
ETEN403 Microcontroller and Embedded System Applications Lecturer: Engr. Dr. M. J. MUSA MCOREN, MNIAE, MIAENG, MMACE.
16
ARITHMETIC & LOGIC UNIT
ARITHMETIC
OPERATIONS
ADDITION
SUBTRACTIO
N Note: Arithmetic operation are restricted
INCREMENT to 8-bit DATA.
LOGICAL
DECREMENT OPERATIONS 16-bit and 32-bit ADDITION will not be
AND possible. One has to write program for
such bits additions.
OR
EXOR
NOT
CLEAR
COMPARE
SHIFT/
ROTATE
ETEN403 Microcontroller and Embedded System Applications Lecturer: Engr. Dr. M. J. MUSA MCOREN, MNIAE, MIAENG, MMACE.
17
INTERFACE SECTION
MEMORY AND I/O CONTROL LINES
R/W STATUS LINES
IO/M
READY/WAIT ADDRESS
ALE LINES
CPU AND BUS CONTROL DATA LINES
RESET
INTERRUPTS-This is necessary to achieve interrupts on
different data transfer.
BUS REQUEST/BUS GRAND LINES- This is
necessary to achieve DMA mode of data transfer.
UTILITY LINES POWER
CLOCK LINES SUPPLY
I/O LINESSERIAL I/O Vcc
LINES
ETEN403 Microcontroller and Embedded System Applications GND
Lecturer: Engr. Dr. M. J. MUSA MCOREN, MNIAE, MIAENG, MMACE.
18
8085 INTERFACE LINES TO OUTSIDE WORLD
Vcc
+5 GND
TRAP V
AD0-7
8
INTERRU RST 7.5
PT
INPUTS RST 6.5
A8-15
CPU RST 5.5
0
& INTR RD
BUS
CONTRO INTA
WR
L RESET-IN
8
RESET- IO/M MEMOR
OUT Y
HOLD ALE AND
I/O
HLDA READ CONTR
5
CRYSTA X1
L Y OL
INPUTS X2 S
0 STAT
SERIA SID
S US
L I/O SOD
1 LINES
LINES
ETEN403 Microcontroller and Embedded System Applications Lecturer: Engr. Dr. M. J. MUSA MCOREN, MNIAE, MIAENG, MMACE.
19
ANATOMY OF THE 8085
RST
INTR INTA RST RST 7.5 TRAP SID SO
5.5 6.5 D
INTERRUPT CONTROL SERIAL I/O CONTROL
AC TEM FLAG IR B C
C P S D E
Vcc
H L
AL INS.
DECODE
PC
Vss
U R
SP
X INC/DEC
1 TIMING & CONTROL
X
2
CLK READ W S0 S1 HOLD RESET- ADDR/
OUT Y R ADDR
OUT DATA
R ALE IO/M HLDA RESET- BUS
D OUT BUS
A8-15 AD0-7 20
ETEN403 Microcontroller and Embedded System Applications Lecturer: Engr. Dr. M. J. MUSA MCOREN, MNIAE, MIAENG, MMACE.