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Lect 2 ETEN403 Microcontroller and Embedded System Applications

The document provides an overview of embedded system design, focusing on the architecture and organization of the 8055 microcontroller. It covers key components such as the CPU, memory, and various types of registers, including general and special purpose registers. Additionally, it discusses the functionality of the arithmetic and logic unit, interface sections, and the anatomy of the 8085 microprocessor.

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Farid Tijjani
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© © All Rights Reserved
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Download as PPTX, PDF, TXT or read online on Scribd
0% found this document useful (0 votes)
2 views

Lect 2 ETEN403 Microcontroller and Embedded System Applications

The document provides an overview of embedded system design, focusing on the architecture and organization of the 8055 microcontroller. It covers key components such as the CPU, memory, and various types of registers, including general and special purpose registers. Additionally, it discusses the functionality of the arithmetic and logic unit, interface sections, and the anatomy of the 8085 microprocessor.

Uploaded by

Farid Tijjani
Copyright
© © All Rights Reserved
Available Formats
Download as PPTX, PDF, TXT or read online on Scribd
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EMBEDDED SYSTEM

DESIGN
ETEN403
ARCHITECTURE &
ORGANIZATION 0F 8055

LECTURE II
ETEN403 Microcontroller and Embedded System Applications Lecturer: Engr. Dr. M. J. MUSA MCOREN, MNIAE, MIAENG, MMACE.
1
THE COMPUTER
COMPUTER
SYSTEM

CPU
INTER
CONNECTION

MEMORY
I/O DEVICES

ETEN403 Microcontroller and Embedded System Applications Lecturer: Engr. Dr. M. J. MUSA MCOREN, MNIAE, MIAENG, MMACE.
Von Neumann Architecture
Basic Characteristics are
 Both data and instructions are stored in
 The
R/Wcontents
memory of R/W memory are accessed by
 Instructions are accessed and executed
location n

sequentially DATA “
SYSTEM BUS “
&

PROGRAM

2
1

CPU
I/O 0
R/W MEMORY
CPU is responsible for sequentially fetching instruction and data
from the memory and stored temporarily inside the CPU and then
execute one after the other. The result may be stored inside the CPU
or back to the memory.
ETEN403 Microcontroller and Embedded System Applications Lecturer: Engr. Dr. M. J. MUSA MCOREN, MNIAE, MIAENG, MMACE.
3
MICROPROCESSOR ARCHITECTURE
CPU
Basic Characteristics are
REGISTE I SYSTEM BUS
RS N MEMORY
ALU T
E
TIMING R
& F
CONTROL A
UNIT C I/O
E
µp (CPU-ON-A-
CHIP)
Different components presents in micro-processor in other words the
sub-components present inside the CPU.

ETEN403 Microcontroller and Embedded System Applications Lecturer: Engr. Dr. M. J. MUSA MCOREN, MNIAE, MIAENG, MMACE.
4
REGISTER SECTION

Register is a set of flip-flop, which are


used to store instruction and data
The number of flip-flops depends on;

i. the size of data,

ii. the size of instructions,


iii.the size of address to store?
Note:
In case of 8085 most of the registers are 8-bit because is an 8-bit
processor

ETEN403 Microcontroller and Embedded System Applications Lecturer: Engr. Dr. M. J. MUSA MCOREN, MNIAE, MIAENG, MMACE.
5
CLASSIFICATION OF REGISTER
(By Type)

 General Purpose Register

 Special Purpose Register

ETEN403 Microcontroller and Embedded System Applications Lecturer: Engr. Dr. M. J. MUSA MCOREN, MNIAE, MIAENG, MMACE.
6
SPECIAL PURPOSE REGISTER

 ACCUMULATOR- it stores 1 of the operant that will


be process by the ALU

 PROGRAM COUNTER- it keep tracks of the


memory location
 STATUS REGISTER- it reflects the outcome of
instruction execution on:

a) Overflow
b) Outcome (‘+tive’ or ‘_tive’)
c) Parity of the result

ETEN403 Microcontroller and Embedded System Applications Lecturer: Engr. Dr. M. J. MUSA MCOREN, MNIAE, MIAENG, MMACE.
7
SPECIAL PURPOSE REGISTER CONT..

 STACK POINTER- is used to implement one

very important data structure ‘STACK’. It is used

for many applications particularly interrupt

handling. Whenever a sub-routing call is performed,

STACK will be required to store information to be

used after returning from interrupt i.e. after sub-

routing call.
ETEN403 Microcontroller and Embedded System Applications Lecturer: Engr. Dr. M. J. MUSA MCOREN, MNIAE, MIAENG, MMACE.
8
CLASSIFICATION OF REGISTERS
(By Accessibility)

 User Accessible
 Not User Accessible

General
Purpose
User
Accessible
Special
Purpose

ETEN403 Microcontroller and Embedded System Applications Lecturer: Engr. Dr. M. J. MUSA MCOREN, MNIAE, MIAENG, MMACE.
9
CLASSIFICATION OF REGISTERS
CONT…

MAR

Not MDR

User
Accessible IR

TEMP

ETEN403 Microcontroller and Embedded System Applications Lecturer: Engr. Dr. M. J. MUSA MCOREN, MNIAE, MIAENG, MMACE.
10
NOT USER ACCESSIBLE

MAR •Hold ADDR before it comes to ADDR bus for accessing memory & I/O devices

MDR •Used as buffer register to store data, which is access through the system bus that are read from memory & I/O devices

IR •Used to temporarily hold instruction before it is being decoded and executed by the µP

ETEN403 Microcontroller and Embedded System Applications Lecturer: Engr. Dr. M. J. MUSA MCOREN, MNIAE, MIAENG, MMACE.
11
NOT USER ACCESSIBLE CONT…

•Used to hold
intermediate result,
TEMP
which is apply to the
ALU or to other
functions

ETEN403 Microcontroller and Embedded System Applications Lecturer: Engr. Dr. M. J. MUSA MCOREN, MNIAE, MIAENG, MMACE.
12
REGISTER ORGANZATION OF 8085

ACC (8)
GENERAL
B (8) C (8)
D (8) E (8) PURPOS
H (8) L (8) E
PC REGISTE
(16) RS
SP
PSW  Flag bit  S – Z – AC – P
(16)
- CY
CARRY

PARITY

AUXILIARY
CARRY
ZERO

SIGN

ETEN403 Microcontroller and Embedded System Applications Lecturer: Engr. Dr. M. J. MUSA MCOREN, MNIAE, MIAENG, MMACE.
13
FLAG BITs

•Whenever there is carry at


CARRY the output this flag bit
should be set

•It reflect the parity of


PARITY the result if not odd

AUXILIAR •Some times you have to implement


4-bit data, so, carry coming out from
Y CARRY the 4 bit, is reflected on AC
Three – in - one
th

ETEN403 Microcontroller and Embedded System Applications Lecturer: Engr. Dr. M. J. MUSA MCOREN, MNIAE, MIAENG, MMACE.
14
FLAG BITs CONT…

ZER •It indicates when


result is (0) or not.
O
•It indicates the sign of the result.

SIGN If S=+ then the MSB of the data


at the output of the ACC is (0),
otherwise it will be (1).

Note: Flag bits are very important for implementing various types of
control loops or decision making & they are useful in writing programs for
different applications.

ETEN403 Microcontroller and Embedded System Applications Lecturer: Engr. Dr. M. J. MUSA MCOREN, MNIAE, MIAENG, MMACE.
15
REGISTER-PAIR

Registers should be pair when dealing with 16-

bit ADDR
BC • Cascading register B & C

DE • Cascading register D & E

HL •Cascading register H & L

ETEN403 Microcontroller and Embedded System Applications Lecturer: Engr. Dr. M. J. MUSA MCOREN, MNIAE, MIAENG, MMACE.
16
ARITHMETIC & LOGIC UNIT
ARITHMETIC
OPERATIONS
ADDITION

 SUBTRACTIO
N Note: Arithmetic operation are restricted
 INCREMENT to 8-bit DATA.
LOGICAL
DECREMENT OPERATIONS 16-bit and 32-bit ADDITION will not be
 AND possible. One has to write program for
such bits additions.
 OR
 EXOR
 NOT
 CLEAR
 COMPARE
 SHIFT/
ROTATE
ETEN403 Microcontroller and Embedded System Applications Lecturer: Engr. Dr. M. J. MUSA MCOREN, MNIAE, MIAENG, MMACE.
17
INTERFACE SECTION
MEMORY AND I/O CONTROL LINES
 R/W  STATUS LINES
 IO/M
 READY/WAIT  ADDRESS
 ALE LINES
CPU AND BUS CONTROL  DATA LINES
 RESET
 INTERRUPTS-This is necessary to achieve interrupts on
different data transfer.
 BUS REQUEST/BUS GRAND LINES- This is
necessary to achieve DMA mode of data transfer.
UTILITY LINES  POWER
 CLOCK LINES SUPPLY
 I/O LINESSERIAL I/O Vcc
LINES
ETEN403 Microcontroller and Embedded System Applications GND
Lecturer: Engr. Dr. M. J. MUSA MCOREN, MNIAE, MIAENG, MMACE.
18
8085 INTERFACE LINES TO OUTSIDE WORLD
Vcc
+5 GND
TRAP V
AD0-7

8
INTERRU RST 7.5
PT
INPUTS RST 6.5
A8-15
CPU RST 5.5

0
& INTR RD
BUS
CONTRO INTA
WR
L RESET-IN

8
RESET- IO/M MEMOR
OUT Y
HOLD ALE AND
I/O
HLDA READ CONTR

5
CRYSTA X1
L Y OL
INPUTS X2 S
0 STAT
SERIA SID
S US
L I/O SOD
1 LINES
LINES

ETEN403 Microcontroller and Embedded System Applications Lecturer: Engr. Dr. M. J. MUSA MCOREN, MNIAE, MIAENG, MMACE.
19
ANATOMY OF THE 8085
RST
INTR INTA RST RST 7.5 TRAP SID SO
5.5 6.5 D
INTERRUPT CONTROL SERIAL I/O CONTROL

INTERNAL DATA BUS

AC TEM FLAG IR B C
C P S D E
Vcc 
H L
AL INS.
DECODE
PC
Vss 
U R
SP
X INC/DEC
1 TIMING & CONTROL
X
2
CLK READ W S0 S1 HOLD RESET- ADDR/
OUT Y R ADDR
OUT DATA
R ALE IO/M HLDA RESET- BUS
D OUT BUS
A8-15 AD0-7 20
ETEN403 Microcontroller and Embedded System Applications Lecturer: Engr. Dr. M. J. MUSA MCOREN, MNIAE, MIAENG, MMACE.

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