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Microprocessor 2

The document provides a comprehensive overview of the development of microprocessors and computers, detailing key milestones from mechanical computers to the introduction of microprocessors and their architectures. It outlines the evolution through five generations, highlighting significant advancements such as the transition from vacuum tubes to transistors, the introduction of integrated circuits, and the emergence of AI in the fifth generation. Additionally, it covers the architecture and components of the 8085 microprocessor, including registers, the arithmetic logic unit, and control signals.

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0% found this document useful (0 votes)
5 views

Microprocessor 2

The document provides a comprehensive overview of the development of microprocessors and computers, detailing key milestones from mechanical computers to the introduction of microprocessors and their architectures. It outlines the evolution through five generations, highlighting significant advancements such as the transition from vacuum tubes to transistors, the introduction of integrated circuits, and the emergence of AI in the fifth generation. Additionally, it covers the architecture and components of the 8085 microprocessor, including registers, the arithmetic logic unit, and control signals.

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NoName
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© © All Rights Reserved
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Review of last class

Development of Microprocessor
Development of computer
• Computer is the most efficient and versatile
electronic machine is a development of a
calculator.
• The development & enhancement in the
calculator leads to the development of
computer.
• First mechanical computer named ‘Difference
engine’ and ‘Analytical engine’.
• The ‘Difference engine’ could perform the
arithmetic operations like add & subtract.
• But it could run only single algorithm and
output system was incompatible.
• The ‘Analytical engine’ provided more
advanced features.
• Four components:
1. The store (memory)
2. The mill (Computation unit)
3. Input Section
4. Output Section
First Gen (1940-56)

• Vacuum tubes
• First general purpose electronic digital
computer was Electronic Numerical Integrator
and Calculator (ENIAC).
• Enormous in size and consumed very high
power.
• Faster than mechanical computer
Second Gen (1956-63) Transistors
• Transistors replaced Vacuum tubes
• Smaller, faster, cheaper, energy efficient and
reliable computers.
• But generated more heat
• Moved from binary machine to symbolic or
assembly language.
• Fortran COBOL were also being developed.
Third Gen (1964-71)

• Development of integrated circuit (IC)


• Transistors were placed on silicon chips.
• Drastically increased the speed and efficiency.
• Users interacts with keyboards and monitors
with user interactive OS.
Fourth Gen (1971-present)

• Microprocessor (µP or MP) was developed


• Thousand of IC on a single silicon chips.
• Intel 4004 was first 4 bit µP (1971).
• Intel 4004 was followed by 8-bit µP 8008 (1972)
• 8080 µP, 8-bit (1973)
• Motorola introduced the 8-bit 6800 processor
(1974)
• Intel developed 8085, 8086, 80186, 80286,
80386, 80486 and Pentium
• Motorola produced 6802, 68000, etc.
• Home user computer in 1981 by IBM µP. Apple
introduced Macintosh in 1984.
Fifth Gen (present onwards)

• Will be based on AI, in development phase.


• Voice recognition.
• Parallel processing grid computing are in
practice today.
• Will be used on Quantum computation,
molecular and nano technology, natural
language processing.
Von-Neumann Architecture

• Known as “stored program concept” and was


developed by John Von Neumann.
• Computer could get instruction by reading
them from memory and a program could be
set or altered by setting the values of a
portion of memory.
• The storage location of the control unit and
ALU are called register.
1. Memory Address Register (MAR): located in
the CPU, connected to the address lines.
Specifies the address in memory.
2. Memory Buffer Register (MBR): Located in
the CPU, connected to the data lines. Acts as an
interface between the CPU and memory.
• Instruction Register (IR ): When the
instruction is fetched from the memory, it is
loaded in the instruction register.
• Program Control (PC): Contains the address of
next byte to be fetched from the memory. The
main purpose is to sequence the execution of
the program.
Harvard Architecture
Microprocessor
• A µP is a programmable, clock driven
electronic device, designed with registers, flip-
flops & timing elements that reads binary
instruction from a storage device called
memory, accept binary data as input and
process data according to those instruction
and provide the results as output.
• It has a set of instructions, designed to
manipulate data and communicate.
• It can be programmed to perform specific task
by selecting necessary instruction from its set.
• It reads one instruction at a time, matches it
with instruction set and performs the data
manipulation as indicated by the instruction.
• Thus µP can fetch instruction from memory,
decode and execute them, perform arithmetic
and logical operations, accept data from input
and send results to the output device.
• The CPU of computer consists of an ALU, CU
and memory.
Features of a Microprocessor
• Cost-effective
• Size
• Low Power Consumption
• Versatility
• Reliability
Coprocessor
Some Intel coprocessors are:
• 8087-used with 8086
• 80287-used with 80286
• 80387-used with 80386
Input / Output Processor
For example:
• Direct Memory Access (DMA) controller
• Keyboard/mouse controller
• Graphic display controller
• SCSI port controller
Digital Signal Processor
• Program Memory
• Data Memory
• Compute Engine
• Input/Output
Applications
• Sound and music synthesis
• Audio and video compression
• Video signal processing
• 2D and 3d graphics acceleration
End of Chapter 1
Chapter 2: Architecture of 8-bit microprocessor (8085)

• Intel 8085 is an 8-bit µP.


• Components:
- Register
- Accumulator
- Flags
- Program Counter
- Stack pointer
• Instruction decoder
• Arithmetic and Logic Unit
Register
• The 8085 has six general purpose registers,
one accumulator, one flag register and other
special 8-bit registers.
• In addition, it has two 16-bit register: the
program counter and the stack pointer.
• 6 general purpose registers: B, C, D, E, H & L.
• Accessible to the programmer and can be
used to store/copy data by using instruction.
• Can be used individually as 8-bit register or
can be combined as register pair BC, DE, HL to
perform some 16-bit operations.
Accumulator
• 8-bit register that is a part of ALU
• Used to store 8-bit data and to perform
arithmetic and logical operations.
• The result of an operation is stored in the
accumulator.
• Also identified as register A.
Flags
• The ALU includes five flip-flops, which are set
or reset after an operation according to data
conditions of the result in the accumulator
and other registers.
• They are called Zero(Z), Carry (CY), Sign (S),
Parity (P), and Auxiliary Carry (AC) flags.
• The most commonly used flags are Zero, Carry,
and Sign.
• The µP uses these flags to test data conditions.
• E.g., after an addition of two numbers, if the
sum in the accumulator is larger than eight bits,
the flip-flop uses to indicate a carry called the
Carry flag (CY) – is set to one.
Program counter
• This 16-bit register deals with sequencing the
execution of instructions.
• This is a memory pointer
• Memory locations have 16-bit addresses, and
that is why this is a 16-bit register.
• Used to sequence the execution of the
instructions.
• The function of the program counter is to
point to the memory address from which the
next byte is to be fetched.
• When a byte (machine code) is being fetched,
the program counter is incremented by one to
point to the next memory location.
Stack Pointer
• 16-bit register used as a memory pointer
• It points to a memory location in R/W
memory, called the stack.
• The beginning of the stack is defined by
loading 16-bit address in the stack pointer.
Temporary register
• 8-bit register, which is not accessible to the
programmer.
• Used internally by the microprocessor to hold
8-bit data during the execution of some
instruction.
Instruction register
• When an instruction is fetched from the
memory, it is loaded in the instruction register.
• It passes the instruction to the instruction
decoder & machine cycle encoding circuit.
Instruction Decoder
• It decodes the instruction, so that the
microprocessor knows which type of operation
is to be performed before executing it.
• The output of the instruction decoder is fed to
control and timing unit.
• The control and timing unit then generates the
necessary control and timing signals.
Arithmetic and Logic Unit
• The ALU performs the arithmetic operations
like add, subtract, etc. and logical operations
like AND, OR, XOR, etc.
• ALU carries out left & right shifting of the 8-bit
data stored in accumulator.
Pin diagram of 8085 microprocessor
Intel 8085
Pin Description
• Address Bus: 8 bits of the memory address or -
8 bits of the I/0 address
- 3 stated during Hold and Halt modes.
• AD0 – AD 7 (Input / Output 3 state)
• (Output three state: high (1), low (0), and high
impedance (Z) )
ALE (Output)
• Address Latch Enable
• Latch (Key)
- It occurs during the first clock cycle of a
machine state and enables the address to get
latched into the chip latch of peripherals.
- The ALE holds time for the address
information.
SO, S1 (Output)
Data Bus Status
Encoded status of the bus cycle:
S1 S0
0 0 HALT
0 1 WRITE
1 0 READ
1 1 FETCH
RD (Output 3state)
• READ indicates the selected memory or I/0
device is to be read and that the Data Bus is
available for the data transfer.
WR (Output 3 state)
• WRITE indicates the data on the Data Bus is to
be written into the selected memory or I/0
location. Data is set up at the trailing edge of
WR. 3 stated during Hold and Halt modes.
READY (Input)
• If Ready is high during a read or write cycle,
the memory or peripheral is ready to send or
receive data.
• If Ready is low, the CPU will wait for Ready to
go high before completing the read or write
cycle.
HOLD (Input)
• HOLD indicates that another Master is
requesting the use of the Address and Data
Buses.
• The CPU, upon receiving the Hold request, will
relinquish the use of buses as soon as the
completion of the current machine cycle.
HLDA (Output)
• HOLD ACKNOWLEDGE indicates that the CPU
has received the Hold request and that it will
relinquish the buses in the next clock cycle.
• HLDA goes low after the Hold request is
removed.
• The CPU takes the buses one half clock cycle
after HLDA goes low.
INTR (Input)
• INTERRUPT REQUEST is used as a general
purpose interrupt.
• It is sampled only during the next to the last
clock cycle of the instruction.
• If it is active, the Program Counter (PC) will be
inhibited from incrementing and an INTA will
be issued.
• During this cycle a RESTART or CALL instruction
can be inserted to jump to the interrupt
service routine.
• The INTR is enabled and disabled by software.
INTA (Output)
• INTERRUPT ACKNOWLEDGE is used instead of
(and has the same timing as) RD during the
Instruction cycle after an INTR is accepted.
• It can be used to activate the 8259 Interrupt
chip or some other interrupt port.
RST 5.5
RST 6.5 - (Inputs)
RST 7.5
• RESTART INTERRUPTS: These three inputs have the
same timing as INTR except they cause an internal
RESTART to be automatically inserted.
RST 7.5 ~~ Highest Priority
RST 6.5
RST 5.5 o Lowest Priority
TRAP (Input)
• Trap interrupt is a non-maskable (can’t be
ignored by the processor) restart interrupt.
• Recognized at the same time as INTR
• Unaffected by any mask or Interrupt Enable
• Has the highest priority of any interrupt.
RESET IN (Input)
• Reset sets the Program Counter to zero and
resets the Interrupt Enable and HLDA flipflops.
• None of the other flags or registers (except
the instruction register) are affected.
• The CPU is held in the reset condition as long
as Reset is applied.
RESET OUT (Output)
• Indicates CPU is being reset
• Can be used as a system RESET
• The signal is synchronized to the processor
clock.
X1, X2 (Input)
• Crystal or R/C network connections to set the
internal clock generator X1 can also be an
external clock input instead of a crystal
• The input frequency is divided by 2 to give the
internal operating frequency.
CLK (Output)
• Clock Output for use as a system clock when a
crystal or R/C network is used as an input to
the CPU
• The period of CLK is twice the X1, X2 input
period.
IO/M (Output)
• IO/M indicates whether the Read/Write is to
memory or l/O Tri-stated during Hold and Halt
modes.
SID (Input)
• Serial input data line
• The data on this line is loaded into accumulator
whenever a memory instruction is executed.
SOD (output)
• Serial output data line
• The output SOD is set or reset as specified by
the SIM instruction.
Vcc
+5 volt supply.
Vss
Ground Reference.
8085 in brief
• 8-bit general purpose microprocessor
• Can address 64K Byte of memory.
• 40 pins,maximum frequency of 3 MHz
• 6 groups of pins:
- Address Bus
- Data Bus
- Control and Status Signals
- Power supply and frequency
- Externally Initiated Signals
- Serial I/O ports.
• A8 – A15 unidirectional.
• AD0 – AD7 are bi-directional
Control and status signals
• ALE: Address Latch Enable
• RD: Read. Active low.
• WR: Write. Active low.
• IO/M: memory operation (IO/M=0) or an I/O
operation (IO/M=1).
• S1 and S0 : Status signals to specify the kind
of operation
Frequency Control Signals
• 3 important pins
– X0 and X1
– CLK (OUT): An output clock pin to drive the
clock of the rest of the system.
Chip Selection
A15- A10 Circuit

8085
CS
A15-A8

ALE
A9- A0 1K Byte
AD7-AD0 Latch Memory
A7- A0 Chip

WR RD IO/M D7- D0
RD WR
Memory structure & its requirements
Interfacing Memory
• 16-bit address on the address bus
• Select the chip
• Select the register
• IO/M and RD
Address decoding
Chip Selection
A15- A10 Circuit

8085
CS
A15-A8

ALE
A9- A0 1K Byte
AD7-AD0 Latch Memory
A7- A0 Chip

WR RD IO/M D7- D0
RD WR
Control and Status Signals
RESET signal
• RESET IN: Set to 0, MP will reset
• RESET OUT: Reset external devices.
Direct Memory Access (DMA)
• IO technique where external IO device
requests the use of the MPU buses.
• High speed access to the memory.
– Example of IO devices that use DMA: disk
memory system.
• HOLD and HLDA are used for DMA.
• If HOLD=1, 8085 will place it address, data and
control pins at their high-impedance.
• A DMA acknowledgement is signaled by
HLDA=1.
Classification of Microprocessors
Based on size of data bus:
• 4-bit microprocessor
• 8-bit microprocessor
• 16-bit microprocessor
• 32-bit microprocessor
MPU Communication and Bus Timing

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