BNCS1102 – COMPUTER ARCH.

CHAPTER 5 Pipelining

Bachelors of Science in Computer Science

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 Pipelining is a technique for breaking down a

sequential process into various sub-operations and
executing each sub-operation in its own dedicated
segment that runs in parallel with all other segments.
 The most significant feature of a pipeline technique is that
it allows several computations to run in parallel in
different parts at the same time.

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Generally:
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 Pipelining in computer architecture is the processes

of arranging the hardware so that simultaneous
execution of multiple instructions takes place, thus,
improving the overall performance.
 Pipelining is a fundamental concept in computer
architecture that improves a processor's efficiency. It
works by breaking down a complex instruction into
smaller, more manageable steps. These steps are
then executed in an assembly line fashion, like a
factory pipeline.
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Example of Real life Pipelining
comparison in computer architecture
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Let us consider a real-life example of taking food from

a counter:
The entire process of taking food from the counter

can be divided into various steps - Picking utensils,

taking salad, taking food, taking vegetables, etc. Now
consider the following two ways of executing this:
One person enters and takes utensils, salad, food,

vegetables, and leaves. Then another person enters

and repeats the process.
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People stand in a queue such that when one person is

taking vegetables, some other person will be taking
food, someone will be taking salad and utensils.
You can see that the first process will have much lower
efficiency than the second. While one person is taking
food, the utensils, salad, and vegetable stalls are
unused. On the other hand, people are simultaneously
using the counter in the second process. Thus we
have improved the efficiency of the process just by
simultaneously executing multiple processes. Note
that we have not used any extra resources.

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 The most significant feature of a pipeline

technique is that it allows several
computations to run in parallel in different
parts at the same time.
 By associating a register with every
segment in the pipeline, the process of
computation can be made overlapping. The
registers provide separation and isolation
among every segment, allowing each to
work on different data at the same time.
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 An input register for each segment,

followed by a combinational circuit, can
be used to illustrate the structure of a
pipeline organization.
 To better understand the pipeline
organization, consider an example of a
combined multiplication and addition
operation.

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 A stream of numbers is used to perform the

combined multiplication and addition operation,
such as:
for i = 1, 2, 3, ……., 7
Ai* Bi + Ci
 The operation to be done on the numbers is

broken down into sub-operations, each of which is

implemented in a segment of a pipeline. We can
define the sub-operations performed in every
segment of the pipeline as:
 Input Ai, and Bi

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R1 ← Ai, R2 ← Bi
Multiply, and input Ci
R3 ← R1 * R2, R4 ← Ci
Add Ci to the product
R5 ← R3 + R4

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The combined and sub-operations

conducted in each leg of the pipeline are
depicted in the block diagram below:

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R1, R2, R3, and R4 Registers hold the data.

The combinational circuits then operate in
a certain segment.
The output of a given segment’s
combinational circuit is used as an input
register for the next segment. The register
R3 is used here as one of the input
registers for a combinational adder circuit,
as shown in the block diagram.

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 NOTE:
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 Generally; In pipeline system, each

segment consists of an input register
followed by a combinational circuit. The
register is used to hold data and
combinational circuit performs operations
on it.
 The output of combinational circuit is
applied to the input register of the next
segment.

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Types of Pipeline in Computer
Architecture
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The pipeline is divided into 2 categories:

1.Arithmetic Pipeline

2.Instruction Pipeline

1. Arithmetic Pipeline
An arithmetic pipeline focuses on dividing a
single arithmetic operation (like addition,
multiplication, etc.) into smaller stages.

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2. Instruction Pipeline
An instruction pipeline breaks down the entire
instruction fetch-decode-execute cycle into
distinct stages. This might involve fetching the
instruction from memory, decoding it to
understand its operation, fetching operands,
performing the operation, and storing the result.
With instruction pipelining, multiple instructions
can be at different stages of execution
concurrently, improving overall processor
performance.
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This is because the processor is not stuck waiting for one

instruction to complete all stages before it can begin
processing the next one.

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 Stages of Pipelining
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There are several stages of processing an instruction:

Fetching the instruction - Reading instruction

from memory.
Decoding the instruction - Finding the type of

instruction.
Executing the instruction - Performing logical

arithmetic operations according to the type of

instruction.
Memory Access - If the instruction requires

read/write to the memory.

Write Back - Storing the value back to the registers.

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 Without pipelining, one instruction will get

processed at a time, but we can process multiple
instructions simultaneously with pipelining. That
means while one instruction is decoded, the next
instruction will be fetched simultaneously, and so
on.
 However, this isn’t as simple as that. Some
instructions may depend on other instructions. For
example, instruction A updates a register, and
instruction B uses the value stored in that register.
So, we can’t directly decode instruction B until
instruction A has completed written back.
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 Pipeline Conflicts
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There are some factors that cause the

pipeline to deviate its normal performance.
Some of these factors are given below:
1. Timing Variations
All stages cannot take same amount of
time. This problem generally occurs in
instruction processing where different
instructions have different operand
requirements and thus different processing
time.
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2. Data Hazards
When several instructions are in partial
execution, and if they reference same data
then the problem arises. We must ensure
that next instruction does not attempt to
access data before the current instruction,
because this will lead to incorrect results.

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3. Branching
In order to fetch and execute the next
instruction, we must know what that
instruction is. If the present instruction is a
conditional branch, and its result will lead
us to the next instruction, then the next
instruction may not be known until the
current one is processed.

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4. Interrupts
Interrupts set unwanted instruction into the
instruction stream. Interrupts effect the
execution of instruction.
5. Data Dependency
It arises when an instruction depends upon
the result of a previous instruction but this
result is not yet available.

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 Advantages of Pipelining
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1. The cycle time of the processor is

reduced.
2. It increases the throughput of the
system
3. It makes the system reliable.

Disadvantages of Pipelining
1. The design of pipelined processor is

complex and costly to manufacture.

2. The instruction latency is more.
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Thank you

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