Chapter_Two slide
Chapter_Two slide
Microprocessor Architecture
1
Outline
Features of 8085 Microprocessor & PIN Diagram 0f 8085
Microprocessor
Address Bus & Multiplexed Address / Data Bus Control
and status signals
Power-supply and clock frequency
Externally initiated signals including Interrupts Serial I/O
Ports
8085 BUS organization and 8085 registers
Microprocessor operations: Microprocessor initiated
Operations, Internal data operations, Externally Initiated
operations
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Microprocessor Communication & Bus Timings De-
Introduction
What is a Microprocessor?
A microprocessor is nothing but!
The Central Processing Unit of a
computer that has been constructed
on e single chip.
It is an integrated circuit and is able
to implement all the important
functions of the CPU.
It is built on a silicon chip and is a
clock- driven, The device is register-
based. 3
What is Microprocessor - 8085
8085 is pronounced as "eighty-eighty-five" microprocessor.
Architecture?
the 8085 is an 8-bit microprocessor, and it was launched by
the Intel team in the year of 1977 using NMOS(An N-channel
metal-oxide semiconductor) technology .
Features Of 8085
8-bit (data bus) general purpose µp
Address bus-16 bit,
Program counter-16-bit,
Stack pointer-16 bit, registers 8-bit,
Capable of addressing 64 kB of memory
Has 40 pins as shown in fig 2
Requires +5 v power supply
Can operate with 3 MHz clock
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Pin Diagram of 8085
6
Cntd…
Data Bus
The pins from 12 to 19 are the data bus pins which are AD0 –
AD7, this carries the minimal considerable 8-bit data and
address bus.
Address Bus
The pins from 21 to 28 are the data bus pins which are A8 –
A15, this carries the most considerable 8-bit address bus.
Status and the Control Signals
In order to find out the behavior of the operation, these signals
are mainly considered.
In the 8085 devices, there are 3 each the control and status
signals.
RD – This is the signal used for the regulation of READ 7
Cntd…
ALE: ALE corresponds to Address Latch Enable signal.
The ALE signal is high at the time of the machine’s initial
clock cycle and this enables the last 8 bits of the address
to get latched with the memory or external latch.
IO/M: This is the status signal that recognizes whether the
address to be allotted for I/O or for memory devices.
READY: This pin is used to specify whether the peripheral is able
to transfer information or not.
When this pin is high, it transfers data and if this is low, the
microprocessor device needs to wait until the pin goes to a
high state.
S0 and S1 pins – These pins are the status signals which defines
the below operations and those are:
8
Cntd…
Clock Signals
CLK: This is the output signal which is pin 37. This is
utilized even in other digital integrated circuits. The
frequency of the clock signal is similar to the processor
frequency.
X1 and X2: These are the input signals at pins 1 and 2.
These pins have connections with the external oscillator
that operates the device’s internal circuitry system.
These pins are used for the generation of the clock that
is required for the microprocessor functionality.
Reset Signals
There are two reset pins which are Reset In and Reset Out at
9
pins 3 and 36.
Cntd…
RESET OUT : This pin signifies that the CPU is in reset
condition.
Serial Input/Output Signals
SID: This is the serial input data line signal. The information
that is on this dateline is taken into the 7th bit of the ACC
(Accumulator).
SOD: This is the serial output data line signal. The ACC’s 7th
bit is the output.
Externally Initiated and Interrupts Signals
HOLD: This pin indicates that the other device is in the need to
utilize data and address buses. This is the input pin.
HLDA: This is the signal for HOLD acknowledgment that
signifies the received signal of HOLD request. When the request
is removed, the pin goes to a low state. 10
Cntd…
INTR : This is the interrupt request signal. It has minimal
priority when compared with other interrupt signals.
TRAP, RST 5.5, 6.5, 7.5 These all are the input interrupt
pins.
When any one of the interrupt pins are recognized, then the
next signal has functioned from the constant position in the
memory based on the below table:
The priority list of these interrupt signals is
TRAP – Highest
RST 7.5 – High
RST 6.5 – Medium
RST 5.5 – Low 11
Architecture of 8085 Microprocessor
8085 consists of the following blocks:
A. Register Array
Demultiplexing AD7-AD0
Given that ALE operates as a pulse during T1, we will be able
to latch the address. Then when ALE goes low, the address
is saved and the AD7– AD0 lines can be used for their 22
Microprocessor Operations
The internal logic design of the microprocessor called
its architecture, determine how and what various
operations are performed by the microprocessor
the function of microprocessor can be classified in three
categories
1. Microprocessor initiated operation
2. Internal data operation
3. Peripheral (external initiated) operation
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Cntd…
Cycle 1.4.2 Timing diagram for STA 526AH
33
Cntd…
STA means Store Accumulator -The contents of the
accumulator is stored in the specified address (526A).
The opcode of the STA instruction is said to be 32H.
It is fetched from the memory 41FFH (see fig). - OF
machine cycle
Then the lower order memory address is read (6A). -
Memory Read Machine Cycle
Read the higher order memory address (52).- Memory
Read Machine Cycle
The combination of both the addresses are considered and
the content from accumulator is written in 526A. - Memory
Write Machine Cycle 34
End of chapter Two
Any question???
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