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8 - Processor Organization

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8 - Processor Organization

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try.gulshantomar
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Processor

Organization
By
Upendra Mishra
KIET Group of Institutions, Delhi-NCR,
Ghaziabad
Processor Organization
Components of the processor
• ALU (Arithmetic and Logic Unit) is a group of circuits that performs arithmetic
(addition, increment/decrement or complement) and logic (AND, OR, NOT, X-OR etc)
operations.
• The control unit controls the movement of data and instructions into and out of the
processor and controls the operation of the ALU. A control unit is a group of circuits
that provides timing and signals to all the operations in the computer and controls the
data flow.
• A minimal internal memory, consisting of a set of storage locations, called registers.

An internal processor bus is needed to transfer data


between the various registers and the ALU because the ALU in
fact operates only on data in the internal processor memory.
Some mechanism that provides for communication among the
control unit, ALU, and registers
Register organization
Register categories:
• User-visible registers
• Control and status registers

• User-visible registers: used by the machine language or assembly language


programmer.
• Control and status registers: Used by the control unit to control the operation
of the processor
User-visible registers
• General-purpose registers can be assigned to a variety of
• General purpose functions by the programmer.
• Data • Data registers may be used only to hold data and cannot
• Address be employed in the calculation of an operand address.
• Condition codes • Address registers may themselves be somewhat general
purpose, or they may be devoted to a particular addressing
mode.
• A final category of registers, which is at least partially
visible to the user, holds condition codes (also referred to
as flags). Condition codes are bits set by the processor
hardware as the result of operations. For example, an
arithmetic operation may produce a positive, negative,
zero, or overflow result
Examples of Address
Registers
Segment pointers: In a machine with segmented
• Examples include the addressing, a segment register holds the address of the
following: base of the segment. There may be multiple registers: for
example, one for the operating system and one for the
• Segment pointers current process.
• Index registers
• Stack pointer Index registers: These are used for indexed addressing and
may be auto-indexed.

Stack pointer: If there is user-visible stack addressing, then


typically there is dedicated register that points to the top
of the stack. This allows implicit addressing; that is, push,
pop, and other stack instructions need not contain an
explicit stack operand.
Control and Status Registers
Control and status registers: Used by the Program counter (PC): Contains the
control unit to control the operation of address of an instruction to be fetched
the processor.
Instruction register (IR): Contains the
Four registers are essential to instruction instruction most recently fetched
execution:
Memory Address Register (MAR): Contains
Program counter the address of a location in memory
Instruction register where a word of data to be written to or
Memory Address Register read from.
Memory buffer register
Memory buffer register (MBR) or
Memory Data Register (MDR): Contains a
word of data to be written to memory or
the word most recently read.
Program Status Word (PSW)
A register or set of registers, often known as the program • Sign Flag
status word (PSW) contain status information. • Zero Flag
The PSW typically contains condition codes plus other • Equal Flag
status information. • Overflow Flag
• Interrupt
Common fields or flags include the following: Enable/Disable Flag
• Supervisor Flag
Program Status Word (PSW)
Sign: Contains the sign bit of the result of the last arithmetic operation.
Zero: Set when the result is 0.
Carry: Set if an operation resulted in a carry (addition) into or borrow (subtraction)
out of a high-order bit.
Equal: Set if a logical compare result is equality.
Overflow: Used to indicate arithmetic overflow.
Interrupt Enable/Disable: Used to enable or disable interrupts.

Supervisor: Indicates whether the processor is executing in


supervisor or user mode. Certain privileged instructions can
be executed only in supervisor mode, and certain areas of
memory can be accessed only in supervisor mode.
Important points
• The basic operations are addition, shifting, and complement.

• The arithmetic operations such as subtractions, multiplication and


division are performed with the help of these basic operations.

• The number of registers and types of register in a processor depend


on the design of a processor
References
• COMPUTER ORGANIZATION AND ARCHITECTURE-DESIGNING FOR
PERFORMANCE, EIGHTH EDITION by William Stallings

• COMPUTER ORGANIZATION AND EMBEDDED SYSTEMS, SIXTH EDITION, by Carl


Hamacher, Zvonko Vranesic, Safwat Zaky, Naraig Manjikian
Thank
You

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