Intro_To_LOGIC
Intro_To_LOGIC
LOGIC GATES
• Boolean logic deals with True and False. It has three main components. Also
known as operators. AND, OR and NOT. These words are quite similar to their
English counterparts. And these operators are the building blocks of Boolean
logic. Using these three operators, we can make simple logical statements.
• For example, It’s NOT Monday. This implies that Monday? = 0. I would like to have
bread AND cheese for breakfast. Which implies, Breakfast = 1, if bread =1 and
cheese = 1.
• Using these simple statements we can come up with any complex statement.
After all, this is how computers and everything digital works. This is it. A basic
building block of the modern Information World. Just these three operators. Next,
we will understand the concept of logic gates. And then we will move on to truth
tables where we will see the complete property of every logical operator starting
with the basic three.
• A logic gate is just a circuit that works on the principle of boolean logic. Basically,
it is the physical manifestation of Boolean logic. You know how silicon (which is
made from sand), is the basic building block for Integrated circuits? That is
exactly how gates are made.
• Transistors are electronic switches. Even their outputs are either Vcc or GND.
Which can translate to 0 or 1/ True or False. We use special transistors called
CMOS to make circuits that deploy the statements of a particular logic. Hence for
AND logic, we have an AND gate. For OR logic, we have an OR gate and so on.
• From the truth table, we can say that the output of the OR logic or an OR gate is
True or high or 1, even if either or both of A or B are 1. If you observe the table,
the equivalent mathematical logic for the OR boolean logic is that of binary
addition. Hence, we can calculate the sum of two digital inputs using an OR gate.
Moreover, we even represent the OR operation using the sum sign.
• Y (A or B) = A + B
• Similarly, the electrical equivalent of the OR gate is a circuit with two resistors in
parallel connected to a bulb. The bulb is if either one or both of the switches are 1
or shorted.
Any Guess??
XOR GATE
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ADDERS
• A multiplexer is a
digital combinational logic circuit . Its
purpose is to connect one of the inputs
to the output line, depending on a
control signal.
• Basically, it switches
between one of the many
input lines and connects
Multiplexe them one by one to the
output. It decides which
r.. input line to switch to using
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a control signal.
Multiplexer..
• Boolean function
4:1
Multiplexer-
Types:
8:1
16:1 ..
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WHY NOT 6:1?
Multiplexer-
Types:
• Let’s make a 4:1 mux using 2:1 multiplexers. We know that a 2:1
mux has two inputs and one select line. So joining two 2:1
multiplexers will give us four inputs, two outputs (we need only
1), and two select lines. So how do we proceed?
• 8x1 Multiplexer
• 16x1 Multiplexer
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MUX
Two 8:1
16:1 MUX
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What are • Sequential circuits are a collection of memory
elements. These memory elements are
sequential flip-flops. These circuits are capable of
“remembering” data. Hence, a sequential
logic circuits? circuit’s output depends on the current input,
as well as past input.
• An SR flip-flop is an
extension of the SR latch.
So let’s take our SR latch
(NAND gates). Attach the
outputs of two new NAND
gates to the inputs of the
SR latch. Apply a common
clock input to the new
NAND gates. The other
inputs to the first and
second new NAND gates
are S and R, respectively.
This is how we construct an
SR flip-flop.
• CLOCK = 0; S, R = x
• In the first case, we will apply no clock and see what happens. Refer
to the logic diagram above. When no clock is given to the NAND
gates, their outputs will have the logic 1. This is because, if you refer
to the NAND gate’s truth table, for even a single low input, the
output is high. So the outputs of the two NAND (A and B) gates are 1
regardless of the S and R inputs. These two outputs act as inputs to
the next two NAND gates. Let’s call the top gate with output Q as
gate x and the lower gate with Q’ output as gate y. Gate x has gate
y’s output as input. Likewise, gate y has gate x’s output as input.
Hence since they are NAND gates,
we know Y = (A.B)’
Q = (1.Q’)’ and Q’ = (1.Q)’
• Now there are two possible values for both Q and Q’. 0 and 1. Let’s
put those two values in the above equations and see what we get.
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What are the
differences
between
combinational
and
sequential
logic circuits?