Operating Systems

Module 4 -Rencita Colaco

Memory Management
• Background
• Logical versus Physical Address Space
• Swapping
• Contiguous Allocation
• Paging
• Segmentation
• Segmentation with Paging
Background
● Program must be brought into memory and placed within a process for it to be run.
● Main memory and registers are only storage CPU can access directly
● Can access registers in one clock cycle or less
● Accessing main memory may take several cycles
● Cache(s) sits between main memory and CPU registers
● Main memory is of a finite size
● In a multiprogramming environment, processes must share space in main memory
● Input queue – (job queue) collection of processes on the disk that are waiting to be
brought into memory to run the program.
● User programs go through several steps before being run.
Main Memory Management Strategies

● Every program to be executed must be in memory. The

instruction must be fetched from memory before it is executed
● In multi-tasking OS memory management is complex, because
as processes are swapped in and out of the CPU, their code and
data must be swapped in and out of memory
Basic Hardware

● Main memory, cache and CPU registers in the processors are the only
storage spaces that CPU can access directly.
● The program and data must be brought into the memory from the
disk, for the process to run. Each process has a separate memory
space and must access only this range of legal addresses. Protection
of memory is required to ensure correct operation. This prevention
is provided by hardware implementation.
● Two registers are used - a base register and a limit register.
The base register holds the smallest legal physical memory
address; the limit register specifies the size of the range.
● For example, if the base register holds 300040 and limit
register is 120900, then the program can legally access all
addresses from 300040 through 420940 (inclusive).
 Contd..

Figure: A base and a limit-register define a logical-address space

● The base and limit registers can be loaded only by the operating system, which uses a
special privileged instruction. Since privileged instructions can be executed only in kernel
mode
Multistep Processing of a User Program
Address Binding

● User programs typically refer to memory addresses with symbolic names.

These symbolic names must be mapped or bound to physical memory
addresses.
● Address binding of instructions to memory-addresses can happen at 3 different
stages.

1. Compile Time - If it is known at compile time where a program will reside in

physical memory, then absolute code can be generated by the compiler, containing
actual physical addresses. However, if the load address changes at some later time,
then the program will have to be recompiled.
2. Load Time - If the location at which a program will be loaded is not known at compile
time, then the compiler must generate relocatable code, which references addresses relative
to the start of the program. If that starting address changes, then the program must be reloaded
but not recompiled.

3. Execution Time - If a program can be moved around in memory during the course of its
execution, then binding must be delayed until execution time.
Logical Versus Physical Address Space
● The address generated by the CPU is a logical address, whereas the
memory address where programs are actually stored is a physical address.
● The set of all logical addresses used by a program composes the logical
address space, and the set of all corresponding physical addresses
composes the physical address space.
● The run time mapping of logical to physical addresses is handled by the
memory- management unit (MMU).
Logical vs Physical Address Space

• The concept of a logical address space that is bound to a separate physical

address space is central to proper memory management.
– Logical address – generated by the CPU; also referred to as virtual
address.
– Physical address – address seen by the memory unit.
• Logical and physical addresses are the same in compile-time and load-time
address-binding schemes;
• Logical and physical addresses differ in execution-time address-binding
scheme.
Memory-Management Unit (MMU)

• Hardware device that maps virtual to physical address.

• In MMU scheme, the value in the relocation register is added to
every address generated by a user process at the time it is
sent to memory.
• The user program deals with logical addresses; it never sees the
real physical addresses.
● One of the simplest is a modification of the base-register
scheme.
● The base register is termed a relocation register
● The value in the relocation-register is added to every address
generated by a user-process at the time it is sent to memory.
● The user-program deals with logical-addresses; it never sees
the real physical- addresses.
Figure: Dynamic relocation using a relocation-register
Dynamic Loading
● This can be used to obtain better memory-space utilization.
● A routine is not loaded until it is called.

This works as follows:

1. Initially, all routines are kept on disk in a relocatable-load format.
2. Firstly, the main-program is loaded into memory and is executed.
3. When a main-program calls the routine, the main-program first checks to see
whether the routine has been loaded.
4. If routine has been not yet loaded, the loader is called to load desired routine
into memory.
5. Finally, control is passed to the newly loaded-routine.
Does not require special support from the OS.

Advantages:
1. An unused routine is never loaded.
2. Useful when large amounts of code are needed to handle infrequently
occurring cases.
3. Although the total program-size may be large, the portion that is used
(and hence loaded) may be much smaller.
Dynamic Linking and Shared Libraries

● With static linking library modules get fully included in executable modules, wasting both
disk space and main memory usage, because every program that included a certain routine from
the library would have to have their own copy of that routine linked into their executable code.
● With dynamic linking, however, only a stub is linked into the executable module, containing
references to the actual library module linked in at run time.
● The stub is a small piece of code used to locate the appropriate memory-resident library-
routine.
● This method saves disk space, because the library routines do not need to be fully included
in the executable modules, only the stubs.
● An added benefit of dynamically linked libraries (DLLs, also known as shared libraries on
UNIX systems) involves easy upgrades and updates.
 Shared libraries
● A library may be replaced by a new version, and all programs that reference
the library will automatically use the new one.
● Version info. is included in both program & library so that programs won't
accidentally execute incompatible versions.
Swapping

• A process can be swapped temporarily out of memory to a backing store, and

then brought back into memory for continued execution.
• Backing store – fast disk large enough to accommodate copies of all memory
images for all users; must provide direct access to these memory images.
• Roll out, roll in – swapping variant used for priority-based scheduling
algorithms; lower-priority process is swapped out so higher-priority process
can be loaded and executed.
• Major part of swap time is transfer time; total transfer time is directly
proportional to the amount of memory swapped.
• Modified versions of swapping are found on many systems, i.e., UNIX
and Microsoft Windows.
Swapping depends upon address-binding:
● If binding is done at load-time, then process cannot be easily
moved to a different location.
● If binding is done at execution-time, then a process can be
swapped into a different memory-space, because the physical-
addresses are computed during execution-time.
Disadvantages:
1. Context-switch time is fairly high.
2. If we want to swap a process, we must be sure that it is completely idle.
Two solutions:
i) Never swap a process with pending I/O.
ii) Execute I/O operations only into OS buffers.
Schematic View of Swapping
Example:

Assume that the user process is 10 MB in size and the backing store is a standard hard
disk with a transfer rate of 40 MB per second.

The actual transfer of the 10-MB process to or from main memory takes 10000
KB/40000 KB per second = 1/4 second
= 250 milliseconds.

Assuming that no head seeks are necessary, and assuming an average latency of 8
milliseconds, the swap time is 258 milliseconds. Since we must both swap out and swap
in, the total swap time is about 516 milliseconds.
Contiguous Memory Allocation

• Main memory usually into two partitions:

– Resident operating system, usually held in low memory with
interrupt vector.
– User processes then held in high memory.
• Single-partition allocation
– Relocation-register scheme used to protect user processes from each
other, and from changing operating-system code and data.

– Relocation register contains value of smallest physical address; limit

register contains range of logical addresses – each logical address
must be less than the limit register.
• Multiple-partition allocation
– Hole – block of available memory;
– holes of various size are scattered throughout memory.
– When a process arrives, it is allocated memory from a hole large enough
to accommodate it.

OS OS OS OS
process 5 process 5 process 5 process 5
process 9 process 9
process
process 8
10
process 2 process 2 process 2 process 2
– Operating system maintains information about:
a) allocated partitions
b) free partitions (hole)
Dynamic Storage-Allocation Problem

How to satisfy a request of size n from a list of free holes.

• First-fit: Allocate the first hole that is big enough.
• Best-fit: Allocate the smallest hole that is big enough; must search
entire list, unless ordered by size. Produces the smallest leftover hole.
• Worst-fit: Allocate the largest hole; must also search entire list.
Produces the largest leftover hole.

First-fit and best-fit better than worst-fit in terms of speed and storage utilization.
Examples
In the first fit, the partition is allocated which is first sufficient from the top of Main Memory.
Example :

blockSize = {100, 500, 200, 300, 600};

process Size = {212, 417, 112, 426};

Process No. Process Size Block no.

1 212 2

2 417 5

3 112 2

4 426 Not Allocated

Fragmentation

• External fragmentation – total memory space exists to satisfy a

request, but it is not contiguous.
• Both the first fit and best fit strategies for memory management suffer from external
fragmentation
• Statistical analysis of first fit reveals, even though some optimization is done ,
another 0.5 N blocks will be lost to fragmentation. I.e., one-third of memory may be
unusable!, this property is known as 50-percent rule.
• Internal fragmentation – allocated memory may be slightly
larger than requested memory; this size difference is
memory internal to a partition, but not being used.
• Solution to internal fragmentation is using best fit, which will
reduce fragmentation up to some extent.
• Reduce external fragmentation by compaction
– Shuffle memory contents to place all free memory
together in one large block.
– Compaction is possible only if relocation is dynamic,
and is done at execution time.
Paging
• Logical address space of a process can be noncontiguous; process is
allocated physical memory whenever the latter is available.
• Divide physical memory into fixed-sized blocks called frames
• Divide logical memory into blocks of same size called pages.
• Keep track of all free frames.
• To run a program of size n pages, need to find n free frames and load
program.
• Set up a page table to translate logical to physical addresses.
• Internal fragmentation.
Address Translation Scheme

• Address generated by CPU is divided into:

– Page number (p) – used as an index into a page table which

contains base address of each page in physical memory.

– Page offset (d) – combined with base address to define the

physical memory address that is sent to the memory unit.
Paging Example
Address Translation Architecture
The page size is defined by the hardware .

The size of a page is power of 2, varying between 512 bytes and 16MB per page.

If the size of logical address space is 2 m, and a page size is 2n , then high-order
m-n bits of a logical address designate the page number, and the n low-order bits
designate the page offset.
To calculate physical
address =
((frame*pagesize)+offset)

Eg1: To find Physical

address of d
((5*4)+3)= 23
Implementation of Page Table
• Page table is kept in main memory.
• Page-table base register (PTBR) points to the page table.
• Page-table length register (PTLR) indicates size of the page table.
• In this scheme every data/instruction access requires two memory accesses.
One for the page table and one for the data/instruction.
• The two memory access problem can be solved by the use of a special fast-
lookup hardware cache called associative registers or translation look-aside
buffers (TLBs)
Translation
LookAside Buffer
TLB is associative, high speed Memory.
It consists of 2 parts
1. Key
2. value
When the associative memory is presented with an item, the item
is compared with all keys simultaneously.
If the item is found, the corresponding value field is returned.
Usage of TLB with Page Table

The TLB Contains only a few of the page-table entries.

When a logical address is generated by the CPU, its page number is

presented to the TLB.

There are 2 cases

1. TLB Hit
2. TLB Miss
Effective Access Time
• Associative Lookup = ε time unit
• Assume memory cycle time is 1 microsecond
• Hit ration – percentage of times that a page number is found in the
associative registers; ration related to number of associative registers.
• Hit ratio = α
• Effective Access Time (EAT)
EAT = (1 + ε) α + (2 + ε)(1 – α)
=2+ε–α
Problem
What will be the EAT if hit ratio is 70%, time for TLB is 30ns and access to main memory
is 90ns?
P = 70% = 70/100 = 0.7
Hit memory time = 30ns + 90ns = 120ns
Miss memory time = 30ns + 90ns + 90ns = 210ns
Therefore,
EAT = P x Hit + (1-P) x Miss =
0.7 x 120 + 0.3 x 210 =840 + 63.0 =147 ns
Memory Protection

• Memory protection implemented by associating protection bit with

each frame.

• Valid-invalid bit attached to each entry in the page table:

– “valid” indicates that the associated page is in the process’s

logical address space, and is thus a legal page.

– “invalid” indicates that the page is not in the process’s logical

Contd.
● Suppose that in a system with a 14 bit address space ( 0 to 16383). We have a
program that should use only addresses 0 to 10468.
● Given a page size of 2 KB, we get the situation as shown in the fig
● Addresses in pages 0,1,2,3,4 and 5 are mapped normally through the page
table. Any attempt to generate an address in page 6 or 7, will find that the
valid-invalid bit is set to invalid and the computer will trap to the Operating
system (invalid page reference)
● Here addresses from 12288 to 16383 are invalid
Shared Pages

● An advantage of paging is the possibility of sharing common code.

This is important in a time sharing environment
● Consider a system that supports 40 users, each of them use text editor. if
the editor consists of 150KB of code and 50 KB of data space, we need
8000 KB to support 40 users
● If the code is reentrant code ( or pure code) we see this scenario in the fig
below
 Shared Pages Example

Reentrant code is non self modifying code it never changes during execution. Two or more processes can
execute the same code at the same time
Two-Level Page-Table Scheme
Two-Level Paging Example

• A logical address (on 32-bit machine with 4K page size) is divided

into:
– a page number consisting of 20 bits.
– a page offset consisting of 12 bits.
• Since the page table is paged, the page number is further divided
into:
– a 10-bit page number.
– a 10-bit page offset.
• Thus, a logical address is as follows:

• where pi is an index into the outer page table, and p2 is the

displacement within the page of the outer page table.
 Address-Translation Scheme
• Address-translation scheme for a two-level 32-bit paging architecture
Multilevel Paging and Performance
• Since each level is stored as a separate table in memory, covering a logical
address to a physical one may take four memory accesses.
• Even though time needed for one memory access is fivefold, caching permits
performance to remain reasonable.
• Cache hit rate of 98 percent yields:
effective access time = 0.98 x 120 + 0.02 x 520
= 128 nanoseconds.

which is only a 28 percent slowdown in memory access time.

Hashed Page Tables

1. In Hashed Page Tables, the virtual

page number in the virtual address is
hashed into the hash table.
2. They are used to handle address spaces
higher than 32 bits. Each entry in the
hash table has a linked list of elements
hashing to the same location (to avoid
collisions – as we can get the same
value of a hash function for different
page numbers).
3. The hash value is the virtual page
number. The Virtual Page Number is all
the bits not part of the page offset.
For each element in the hash table, there are three fields

● Virtual Page Number (which is the hash value).

● Value of the mapped page frame.
● A pointer to the next element in the linked list.
● The virtual page number in the virtual address is hashed into the hash table.
● The virtual page number is compared with field1 in the first element in the linked list.
● If there is a match, the corresponding page frame is used to form the desired physical address.
● If there is no match, subsequent entries in the linked list are searched for a matching virtual page
number.
● A variation of this scheme for 64 bit address spaces uses clustered page tables which are similar
to hashed page tables except that each entry in the hash table refers to several pages rather than a
single page. Therefore, a single page table entry can store the mappings for multiple physical page
frames. Clustered page tables are useful for sparse address spaces where memory references are
non-contiguous and scattered throughout the address space.
Inverted Page Table
• One entry for each real page of memory.
• Entry consists of the virtual address of the page stored in that real memory
location, with information about the process that owns that page.
• Decreases memory needed to store each page table, but increases time needed
to search the table when a page reference occurs.
• Use hash table to limit the search to one — or at most a few — page-table
entries.
Inverted Page Table Architecture
Segmentation

● Memory-management scheme that supports user view of

memory.
● A logical address space is a collection of segments. Each
segment has a name and a length
● The addresses specify both the segment number and the offset
within the segment
● A C compiler creates separate segments for the following:
1. The code
2. Global variables
3. The heap
4. The stack
5. The standard C library
Logical View of Segmentation
Segmentation Architecture

• Logical address consists of a two tuple:

<segment-number, offset>,
• Segment table – maps two-dimensional physical addresses; each table
entry has:
– base – contains the starting physical address where the segments
reside in memory.
– limit – specifies the length of the segment.
• Segment-table base register (STBR) points to the segment
table’s location in memory.
• Segment-table length register (STLR) indicates number of
segments used by a program;
segment number s is legal if s < STLR.
Segmentation Architecture

• Protection: With each entry in segment table associate:

– validation bit = 0 ⇒ illegal segment
– read/write/execute privileges
• Protection bits associated with segments; code sharing occurs at
segment level.
• Since segments vary in length, memory allocation is a dynamic
storage-allocation problem.
• A segmentation example is shown in the following diagram
Sharing of segments
 Chapter 9: Virtual Memory
● Background
● Demand Paging
● Copy-on-Write
● Page Replacement
● Allocation of Frames
● Thrashing
● Memory-Mapped Files
● Allocating Kernel Memory
● Other Considerations
● Operating-System Examples
Background
● Code needs to be in memory to execute, but entire program rarely used
● Error code, unusual routines, large data structures
● Entire program code not needed at same time
● Consider ability to execute partially-loaded program
● Program no longer constrained by limits of physical memory
● Each program takes less memory while running -> more programs
run at the same time
4 Increased CPU utilization and throughput with no increase in
response time or turnaround time
● Less I/O needed to load or swap programs into memory -> each
user program runs faster
Background (Cont.)
● Virtual memory – separation of user logical memory from physical
memory
● Only part of the program needs to be in memory for execution
● Logical address space can therefore be much larger than physical address
space
● Allows address spaces to be shared by several processes
● Allows for more efficient process creation
● More programs running concurrently
● Less I/O needed to load or swap processes
Background (Cont.)
● Virtual address space – logical view of how process is
stored in memory
● Usually start at address 0, contiguous addresses until end of
space
● Meanwhile, physical memory organized in page frames
● MMU must map logical to physical
● Virtual memory can be implemented via:
● Demand paging
● Demand segmentation
Virtual Memory That is Larger Than Physical Memory
 Virtual-address Space
● Usually design logical address space for stack to start at
Max logical address and grow “down” while heap grows
“up”
● Maximizes address space use
● Unused address space between the two is hole
No physical memory needed until heap or stack
grows to a given new page
● Enables sparse address spaces with holes left for
growth, dynamically linked libraries, etc
● System libraries shared via mapping into virtual address
space
● Shared memory by mapping pages read-write into
virtual address space
Shared Library Using Virtual Memory
Demand Paging
● Could bring entire process into memory
at load time
● Or bring a page into memory only when
it is needed
● Less I/O needed, no unnecessary I/O
● Less memory needed
● Faster response
● More users

Loading the entire program into memory results in loading the executable code for
all options, regardless of whether an option is ultimately selected by the user or not.
An alternative strategy is to load pages only as they are needed. This technique is
known as Demand paging and is commonly used in virtual memory systems.
● Similar to paging system with swapping (diagram on right)
● Page is needed ⇒ reference to it
● invalid reference ⇒ abort
● not-in-memory ⇒ bring to memory
● Lazy swapper – never swaps a page into memory unless page will
be needed
● Swapper that deals with pages is a pager
Basic Concepts
● With swapping, pager guesses which pages will be used
before swapping out again
● Instead, pager brings in only those pages into memory
● How to determine that set of pages?
● Need new MMU functionality to implement demand
paging
● If pages needed are already memory resident
● No difference from non demand-paging
● If page needed and not memory resident
● Need to detect and load the page into memory from
storage
4 Without changing program behavior
4
Valid-Invalid Bit
● With each page table entry a valid–invalid bit is associated
(v ⇒ in-memory – memory resident, i ⇒ not-in-memory)
● Initially valid–invalid bit is set to i on all entries
● Example of a page table snapshot:
Page Table When Some Pages Are Not in Main Memory
Page Fault
● If there is a reference to a page, first reference to that
page will trap to operating system:
page fault
1. Operating system looks at another table to decide:
● Invalid reference ⇒ abort
● Just not in memory
2. Find free frame
3. Swap page into frame via scheduled disk operation
4. Reset tables to indicate page now in memory
Set validation bit = v
5. Restart the instruction that caused the page fault
Steps in Handling a Page Fault
Aspects of Demand Paging
● Extreme case – start process with no pages in memory
● OS sets instruction pointer to first instruction of process,
non-memory-resident -> page fault
● And for every other process pages on first access
● Pure demand paging
● Actually, a given instruction could access multiple pages ->
multiple page faults
● Consider fetch and decode of instruction which adds 2
numbers from memory and stores result back to memory
● Pain decreased because of locality of reference
● Hardware support needed for demand paging
● Page table with valid / invalid bit
● Secondary memory (swap device with swap space)
● Instruction restart
Instruction Restart
● Consider an instruction that could access several different locations
● block move

● auto increment/decrement location

● Restart the whole operation?
4 What if source and destination overlap?
As a worst-case example, consider a three-address instruction such as ADD the content of A
to B, placing the result in C.
These are the steps to execute this instruction:
1. Fetch and decode the instruction (ADD).
2. Fetch A
3. Fetch B.
4. Add A and B.
5. Store the sum in C
If we fault when we try to store inC (because C is in a page not currently in memory),
we will have to get the desired page, bring it in, correct the page table, and restart the
instruction. The restart will require fetching the instruction again, decoding it again,
fetching the two operands again, and then adding again. However, there is not much
repeated work (less than one complete instruction), and the repetition is necessary only
when a page fault occurs.
What if source and destination blocks overlap?

In this case we cannot restart the instruction!!

There are 2 solutions:
1. Microcode tries to attempt to access both ends of both blocks.
If page fault occurs it occurs at this step, before anything is modified. Now when
all pages are brought in main memory we know that page fault may never occur.

2. Using temporary registers to hold the values of the overwritten locations. If there
is page fault then old values are written back into memory before trap. This way
data is not lost and operation can be restarted.
Performance of Demand Paging
Demand paging can significantly affect the performance of a computer
system.

Let p be the probability of a page fault (0 <= p <= 1). We would expect p to be
close to zero-that is, we would expect to have only a few page faults. The
effective access time is = (1 - p) x ma + p x page fault time.

Sequence followed during page fault

1. Trap to the operating system
2. Save the user registers and process state
3. Determine that the interrupt was a page fault
4. Check that the page reference was legal and determine the location of the page on
the disk
5. Issue a read from the disk to a free frame:
1. Wait in a queue for this device until the read request is serviced
2. Wait for the device seek and/or latency time
3. Begin the transfer of the page to a free frame
6. While waiting, allocate the CPU to some other user
7. Receive an interrupt from the disk I/O subsystem (I/O completed)
8. Save the registers and process state for the other user
9. Determine that the interrupt was from the disk
10. Correct the page table and other tables to show page is now in memory
11. Wait for the CPU to be allocated to this process again
12. Restore the user registers, process state, and new page table, and then resume the
interrupted instruction
Performance of Demand Paging (Cont.)
● Three major activities
● Service the interrupt – careful coding means just several hundred
instructions needed
● Read the page – lots of time
● Restart the process – again just a small amount of time
● Page Fault Rate 0 ≤ p ≤ 1
● if p = 0 no page faults
● if p = 1, every reference is a fault
● Effective Access Time (EAT)
EAT = (1 – p) x memory access
+ p (page fault overhead
+ swap page out
+ swap page in )
Demand Paging Example
● Memory access time = 200 nanoseconds
● Average page-fault service time = 8 milliseconds
● EAT = (1 – p) x 200 + p (8 milliseconds)
= (1 – p x 200 + p x 8,000,000
= 200 + p x 7,999,800
● If one access out of 1,000 causes a page fault, then
EAT = 8.2 microseconds.
This is a slowdown by a factor of 40!!
● If want performance degradation < 10 percent
● 220 > 200 + 7,999,800 x p
20 > 7,999,800 x p
● p < .0000025
● < one page fault in every 400,000 memory accesses
 Demand Paging Optimizations
● Swap space I/O faster than file system I/O even if on the same device
● Swap allocated in larger chunks, less management needed than file
system
● Copy entire process image to swap space at process load time
● Then page in and out of swap space
● Used in older BSD Unix
● Demand page in from program binary on disk, but discard rather than
paging out when freeing frame
 ● Used in Solaris and current BSD
● Still need to write to swap space
4 Pages not associated with a file (like stack and heap) –
anonymous memory
4 Pages modified in memory but not yet written back to the file
system
● Mobile systems
● Typically don’t support swapping
● Instead, demand page from file system and reclaim read-only pages
(such as code)
 Copy-on-Write
● Copy-on-Write (COW) allows both parent and child processes to
initially share the same pages in memory
● If either process modifies a shared page, only then is the page
copied
● COW allows more efficient process creation as only modified pages
are copied
● In general, free pages are allocated from a pool of zero-fill-on-
demand pages
● Pool should always have free frames for fast demand page
execution
4 Don’t want to have to free a frame as well as other processing
on page fault
 a. Why zero-out a page before allocating it?
1. vfork() variation on fork() system call has parent suspend and
child using copy-on-write address space of parent
2. Designed to have child call exec()
3. Very efficient
Before Process 1 Modifies Page C
After Process 1 Modifies Page C
 What Happens if There is no Free Frame?
● Used up by process pages
● Also in demand from the kernel, I/O buffers, etc
● How much to allocate to each?
● Page replacement – find some page in memory, but not really in use,
page it out
● Algorithm – terminate? swap out? replace the page?
● Performance – want an algorithm which will result in minimum
number of page faults
● Same page may be brought into memory several times
Page Replacement
● Prevent over-allocation of memory by modifying page-fault service
routine to include page replacement
● Use modify (dirty) bit to reduce overhead of page transfers – only
modified pages are written to disk
● Page replacement completes separation between logical memory and
physical memory – large virtual memory can be provided on a
smaller physical memory
Need For Page Replacement
 Basic Page Replacement
1. Find the location of the desired page on disk

2. Find a free frame:

- If there is a free frame, use it
- If there is no free frame, use a page replacement algorithm to select a
victim frame
- Write victim frame to disk if dirty

3. Bring the desired page into the (newly) free frame; update the page and
frame tables

4. Continue the process by restarting the instruction that caused the trap.
Note now potentially 2 page transfers for page fault – increasing EAT
Page Replacement
 Page and Frame Replacement Algorithms

● Frame-allocation algorithm determines

● How many frames to give each process
● Which frames to replace
● Page-replacement algorithm
● Want lowest page-fault rate on both first access and
re-access
● Evaluate algorithm by running it on a particular string of
memory references (reference string) and computing the
number of page faults on that string
 ● String is just page numbers, not full addresses
● Repeated access to the same page does not cause a page fault
● Results depend on number of frames available
● In all our examples, the reference string of referenced page numbers is
7,0,1,2,0,3,0,4,2,3,0,3,0,3,2,1,2,0,1,7,0,1
Graph of Page Faults Versus The Number of Frames
First-In-First-Out (FIFO) Algorithm
● Reference string:
7,0,1,2,0,3,0,4,2,3,0,3,0,3,2,1,2,0,1,7,0,1
● 3 frames (3 pages can be in memory at a time per
process)

15 page
faults
● Can vary by reference string: consider 1,2,3,4,1,2,5,1,2,3,4,5
● Adding more frames can cause more page faults!
4 Belady’s Anomaly
● How to track ages of pages?
● Just use a FIFO queue
FIFO Illustrating Belady’s Anomaly
Optimal Algorithm
● Replace page that will not be used for longest period of time
● 9 is optimal for the example
● How do you know this?
● Can’t read the future
● Used for measuring how well your algorithm performs
 Least Recently Used (LRU) Algorithm
● Use past knowledge rather than future
● Replace page that has not been used in the most amount of
time
● Associate time of last use with each page

● 12 faults – better than FIFO but worse than OPT

● Generally good algorithm and frequently used
LRU Algorithm (Cont.)
● Counter implementation
● Every page entry has a counter; every time page is
referenced through this entry, copy the clock into the
counter
● When a page needs to be changed, look at the counters
to find smallest value
Search through table needed
● Stack implementation
● Keep a stack of page numbers in a double link form:
● Page referenced:
4 move it to the top
4 requires 6 pointers to be changed
● But each update more expensive
● No search for replacement
● LRU and OPT are cases of stack algorithms that don’t have
Belady’s Anomaly
Use Of A Stack to Record Most Recent Page References
LRU Approximation Algorithms
● LRU needs special hardware and still slow
● Reference bit
● With each page associate a bit, initially = 0
● When page is referenced bit set to 1
● Replace any with reference bit = 0 (if one exists)
4 We do not know the order, however
● Second-chance algorithm
● Generally FIFO, plus hardware-provided reference bit
● Clock replacement
● If page to be replaced has
4 Reference bit = 0 -> replace it
4 reference bit = 1 then:
– set reference bit 0, leave page in memory
– replace next page, subject to same rules
Second-Chance (clock) Page-Replacement Algorithm
 Enhanced Second-Chance Algorithm
● Improve algorithm by using reference bit and modify bit (if available)
in concert
● Take ordered pair (reference, modify)
1. (0, 0) neither recently used not modified – best page to replace
2. (0, 1) not recently used but modified – not quite as good, must write out
before replacement
3. (1, 0) recently used but clean – probably will be used again soon
4. (1, 1) recently used and modified – probably will be used again soon
and need to write out before replacement
● When page replacement called for, use the clock scheme but use the
four classes replace page in lowest non-empty class
● Might need to search circular queue several times
Counting Algorithms
● Keep a counter of the number of references that have been made to
each page
● Not common

● Lease Frequently Used (LFU) Algorithm: replaces page with

smallest count

● Most Frequently Used (MFU) Algorithm: based on the argument

that the page with the smallest count was probably just brought in
and has yet to be used
Page-Buffering Algorithms
● Keep a pool of free frames, always
● Then frame available when needed, not found at fault time
● Read page into free frame and select victim to evict and add to free
pool
● When convenient, evict victim
● Possibly, keep list of modified pages
● When backing store otherwise idle, write pages there and set to non-
dirty
● Possibly, keep free frame contents intact and note what is in them
● If referenced again before reused, no need to load contents again from disk
● Generally useful to reduce penalty if wrong victim frame selected
Applications and Page Replacement
● All of these algorithms have OS guessing about future page access
● Some applications have better knowledge – i.e. databases
● Memory intensive applications can cause double buffering
● OS keeps copy of page in memory as I/O buffer
● Application keeps page in memory for its own work
● Operating system can given direct access to the disk, getting out of the
way of the applications
● Raw disk mode
● Bypasses buffering, locking, etc
Allocation of Frames
● Each process needs minimum number of frames
● Example: IBM 370 – 6 pages to handle SS MOVE instruction:
● instruction is 6 bytes, might span 2 pages
● 2 pages to handle from
● 2 pages to handle to
● Maximum of course is total frames in the system
● Two major allocation schemes
● fixed allocation
● priority allocation
● Many variations
Fixed Allocation
● Equal allocation – For example, if there are 100 frames (after allocating
frames for the OS) and 5 processes, give each process 20 frames
● Keep some as free frame buffer pool

● Proportional allocation – Allocate according to the size of process

● Dynamic as degree of multiprogramming, process sizes change
Priority Allocation
● Use a proportional allocation scheme using priorities rather
than size

● If process Pi generates a page fault,

● select for replacement one of its frames
● select for replacement a frame from a process with lower
priority number
 Global vs. Local Allocation
● Global replacement – process selects a replacement frame
from the set of all frames; one process can take a frame
from another
● But then process execution time can vary greatly
● But greater throughput so more common

● Local replacement – each process selects from only its

own set of allocated frames
● More consistent per-process performance
● But possibly underutilized memory
Non-Uniform Memory Access
● So far all memory accessed equally
● Many systems are NUMA – speed of access to memory varies
● Consider system boards containing CPUs and memory, interconnected
over a system bus
● Optimal performance comes from allocating memory “close to” the CPU
on which the thread is scheduled
● And modifying the scheduler to schedule the thread on the same
system board when possible
● Solved by Solaris by creating lgroups
4 Structure to track CPU / Memory low latency groups
4 Used my schedule and pager
4 When possible schedule all threads of a process and allocate all
memory for that process within the lgroup
Thrashing
● If a process does not have “enough” pages, the page-fault rate is very high
● Page fault to get page
● Replace existing frame
● But quickly need replaced frame back
● This leads to:
4 Low CPU utilization
4 Operating system thinking that it needs to increase the degree of
multiprogramming
4 Another process added to the system

● Thrashing ≡ a process is busy swapping pages in and out

Thrashing (Cont.)
 Demand Paging and Thrashing
● Why does demand paging work?
Locality model
● Process migrates from one locality to another
● Localities may overlap

● Why does thrashing occur?

Σ size of locality > total memory size
● Limit effects by using local or priority page
replacement
Locality In A Memory-Reference Pattern
Working-Set Model
● Δ ≡ working-set window ≡ a fixed number of page references
Example: 10,000 instructions
● WSSi (working set of Process Pi) =
total number of pages referenced in the most recent Δ (varies in
time)
● if Δ too small will not encompass entire locality
● if Δ too large will encompass several localities
● if Δ = ∞ ⇒ will encompass entire program
● D = Σ WSSi ≡ total demand frames
● Approximation of locality
● if D > m ⇒ Thrashing
● Policy if D > m, then suspend or swap out one of the processes
 Keeping Track of the Working Set
● Approximate with interval timer + a reference bit
● Example: Δ = 10,000
● Timer interrupts after every 5000 time units
● Keep in memory 2 bits for each page
● Whenever a timer interrupts copy and sets the values of all reference bits
to 0
● If one of the bits in memory = 1 ⇒ page in working set
● Why is this not completely accurate?
● Improvement = 10 bits and interrupt every 1000 time units
Page-Fault Frequency
● More direct approach than WSS
● Establish “acceptable” page-fault frequency (PFF) rate and use
local replacement policy
● If actual rate too low, process loses frame
● If actual rate too high, process gains frame
 Working Sets and Page Fault Rates
● Direct relationship between working set of a process and its page-
fault rate
● Working set changes over time
● Peaks and valleys over time
Memory-Mapped Files
● Memory-mapped file I/O allows file I/O to be treated as routine
memory access by mapping a disk block to a page in memory
● A file is initially read using demand paging
● A page-sized portion of the file is read from the file system
into a physical page
● Subsequent reads/writes to/from the file are treated as
ordinary memory accesses
● Simplifies and speeds file access by driving file I/O through memory rather than
read() and write() system calls
● Also allows several processes to map the same file allowing the pages in memory
to be shared
● But when does written data make it to disk?
● Periodically and / or at file close() time
● For example, when the pager scans for dirty pages
Memory-Mapped File Technique for all I/O
● Some OSes uses memory mapped files for standard I/O
● Process can explicitly request memory mapping a file via mmap()
system call
● Now file mapped into process address space
● For standard I/O (open(), read(), write(), close()), mmap anyway
● But map file into kernel address space
● Process still does read() and write()
4 Copies data to and from kernel space and user space
● Uses efficient memory management subsystem
4 Avoids needing separate subsystem
● COW can be used for read/write non-shared pages
● Memory mapped files can be used for shared memory (although again via separate
system calls)
Memory Mapped Files
Shared Memory via Memory-Mapped I/O
Shared Memory in Windows API
● First create a file mapping for file to be mapped
● Then establish a view of the mapped file in process’s virtual address
space
● Consider producer / consumer
● Producer create shared-memory object using memory mapping
features
● Open file via CreateFile(), returning a HANDLE
● Create mapping via CreateFileMapping() creating a named shared-
memory object
● Create view via MapViewOfFile()
● Sample code in Textbook
Allocating Kernel Memory
● Treated differently from user memory
● Often allocated from a free-memory pool
● Kernel requests memory for structures of varying sizes
● Some kernel memory needs to be contiguous
4 I.e. for device I/O
Buddy System
● Allocates memory from fixed-size segment consisting of physically-contiguous
pages
● Memory allocated using power-of-2 allocator
● Satisfies requests in units sized as power of 2
● Request rounded up to next highest power of 2
● When smaller allocation needed than is available, current chunk split into
two buddies of next-lower power of 2
4 Continue until appropriate sized chunk available
● For example, assume 256KB chunk available, kernel requests 21KB
● Split into AL and AR of 128KB each
4 One further divided into BL and BR of 64KB
– One further into CL and CR of 32KB each – one used to satisfy request
● Advantage – quickly coalesce unused chunks into larger chunk
● Disadvantage - fragmentation
Buddy System Allocator
 Slab Allocator
● Alternate strategy
● Slab is one or more physically contiguous pages
● Cache consists of one or more slabs
● Single cache for each unique kernel data structure
● Each cache filled with objects – instantiations of the data structure
● When cache created, filled with objects marked as free
● When structures stored, objects marked as used
● If slab is full of used objects, next object allocated from empty slab
● If no empty slabs, new slab allocated
● Benefits include no fragmentation, fast memory request satisfaction
Slab Allocation
 Slab Allocator in Linux
● For example process descriptor is of type struct task_struct
● Approx 1.7KB of memory
● New task -> allocate new struct from cache
● Will use existing free struct task_struct
● Slab can be in three possible states
1. Full – all used
2. Empty – all free
3. Partial – mix of free and used
● Upon request, slab allocator
1. Uses free struct in partial slab
2. If none, takes one from empty slab
3. If no empty slab, create new empty
 Slab Allocator in Linux (Cont.)
● Slab started in Solaris, now wide-spread for both kernel mode and user
memory in various OSes
● Linux 2.2 had SLAB, now has both SLOB and SLUB allocators
● SLOB for systems with limited memory
4 Simple List of Blocks – maintains 3 list objects for small,
medium, large objects
● SLUB is performance-optimized SLAB removes per-CPU queues,
metadata stored in page structure
 Other Considerations -- Prepaging
● Prepaging
● To reduce the large number of page faults that occurs at
process startup
● Prepage all or some of the pages a process will need,
before they are referenced
● But if prepaged pages are unused, I/O and memory was
wasted
● Assume s pages are prepaged and α of the pages is
used
4 Is cost of s * α save pages faults > or < than the
cost of prepaging
s * (1- α) unnecessary pages?
4 α near zero ⇒ prepaging loses
 Other Issues – Page Size
● Sometimes OS designers have a choice
● Especially if running on custom-built CPU
● Page size selection must take into consideration:
● Fragmentation
● Page table size
● Resolution
● I/O overhead
● Number of page faults
● Locality
● TLB size and effectiveness
● Always power of 2, usually in the range 212 (4,096 bytes)
to 222 (4,194,304 bytes)
 Other Issues – TLB Reach
● TLB Reach - The amount of memory accessible from the TLB

● TLB Reach = (TLB Size) X (Page Size)

● Ideally, the working set of each process is stored in the TLB

● Otherwise there is a high degree of page faults

● Increase the Page Size

● This may lead to an increase in fragmentation as not all
applications require a large page size

● Provide Multiple Page Sizes

● This allows applications that require larger page sizes the
opportunity to use them without an increase in
fragmentation
 Other Issues – Program Structure
● Program structure
● int[128,128] data;
● Each row is stored in one page
● Program 1
for (j = 0; j <128; j++)
for (i = 0; i < 128; i++)
data[i,j] = 0;

128 x 128 = 16,384 page faults

● Program 2
for (i = 0; i < 128; i++)
for (j = 0; j < 128; j++)
data[i,j] = 0;
 Other Issues – I/O interlock
● I/O Interlock – Pages must
sometimes be locked into
memory
● Consider I/O - Pages that are
used for copying a file from a
device must be locked from
being selected for eviction by a
page replacement algorithm
● Pinning of pages to lock into
memory
 Operating System Examples

● Windows

● Solaris
 Windows
● Uses demand paging with clustering. Clustering brings in
pages surrounding the faulting page
● Processes are assigned working set minimum and
working set maximum
● Working set minimum is the minimum number of pages
the process is guaranteed to have in memory
● A process may be assigned as many pages up to its
working set maximum
● When the amount of free memory in the system falls
below a threshold, automatic working set trimming is
performed to restore the amount of free memory
● Working set trimming removes pages from processes that
have pages in excess of their working set minimum
 Solaris
● Maintains a list of free pages to assign faulting processes
● Lotsfree – threshold parameter (amount of free memory)
to begin paging
● Desfree – threshold parameter to increasing paging
● Minfree – threshold parameter to being swapping
● Paging is performed by pageout process
● Pageout scans pages using modified clock algorithm
● Scanrate is the rate at which pages are scanned. This
ranges from slowscan to fastscan
● Pageout is called more frequently depending upon the
amount of free memory available
● Priority paging gives priority to process code pages
Solaris 2 Page Scanner
End of Chapter 9