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Counters & Time Delays: Counter

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8 views

Counters & Time Delays: Counter

Uploaded by

itssam4577
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PPTX, PDF, TXT or read online on Scribd
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Counters & Time

Counter:
Delays
A counter in 8085 is a sequence of instructions designed to count the number of occurrences
of an event or to count down a specific value.

•Usage: Counters are used in loops where the microprocessor needs to repeat an operation
a specific number of times. For example, counting the number of pulses, steps, or iterations
in a loop.

Time Delay:

A time delay is a method used to pause or delay the execution of the program for a specific
period.

•Usage: Time delays are crucial in controlling the timing of hardware interactions, creating
pauses between operations, or synchronizing events.
Counters & Time Delays

• A loop counter is set up by loading a register with a certain value


• Then using the DCR (to decrement) and INR (to increment) the contents of the register are
updated.
• A loop is set up with a conditional jump instruction that loops back or not depending on
whether the count has reached the termination count.

Time delay loop


• Knowing how many T-States an instruction requires, and keeping in mind that a T-State
is one clock cycle long, we can calculate the time using the following formula: Delay =
No. of T-States / Frequency.

• For example a “MVI” instruction uses 7 T-States. Therefore, if the Microprocessor is


running at 2 MHz, the instruction would require 3.5 µSeconds to complete.

• Delay loop: We can use a loop to produce a certain amount of time delay in a program.

MVI C, FFH 7 T-States


LOOP DCR C 4 T-States
JNZ LOOP 10 T-States
We need to keep in mind though that in the last iteration of the loop, the JNZ instruction will fail
and require only 7 T-States rather than the 10.
Therefore, we must deduct 3 T-States from the total delay to get an accurate delay calculation.

To calculate the delay, we use the following formula: Tdelay = delay outside the loop (TO) +
delay of the loop (TL )

TO = 7 T-States – Delay of the MVI instruction


TL = (14 X 255) - 3 = 3567 T-States
Using a Register Pair as a Loop
Counter
LXI B, 1000H 10 T-States A minor problem arises in how to test for the final
LOOP DCX B 6 T-States count since DCX and INX do not modify the flags.
MOV A, C 4 T-States However, if the loop is looking for when the count
ORA B 4 T-States becomes zero, we can use a small trick by ORing
JNZ LOOP 10 T-States the two registers in the pair and then checking the
zero flag

TO = 10 T-States The delay for the LXI instruction


TL = (24 X 4096) - 3 = 98301 T- States
Nested Loops
A nested loop structure can be used to increase the total delay
produced.
MVI B, 10H 7 T-States
LOOP2 MVI C, FFH 7 T-States Delay of inner loop – TO1 = 7 T-States (MVI C,
LOOP1 DCR C 4 T-States FFH)
JNZ LOOP1 10 T-States TL1 = (255 X 14) - 3 = 3567 T-States
DCR B 4 T-States
JNZ LOOP2 10 T-States
Delay of outer loop
TO2 = 7 T-States • MVI B, 10H
TL2 = (16 X (14 + 3567+7)) - 3 = 57405 T-States

TDelay = 7 + 57405 = 57412 T-States


Counters design with Time Delays
Problem Statement: Write a program to count continuously in backward from FFH to
00H in a system with a 0.5 µs clock period. Use register C to set up a one millisecond
(ms) delay between each count and display the numbers at one of the output ports.

Delay Calculations
The delay loop includes two instructions: DCR C and JNZ
with 14 T-states. Therefore, the time delay T in the loop
(without accounting for the fact that JNZ requires seven T-
states in the last cycle) is T= 14 T-states x T (Clock
period) x Count = 14 x (0.5 uS) x Count = = (7.0 uS) x
Count
8C

The delay outside the loop includes the following


instructions: DCR B 4T
MVI C,COUNT 7T
MOV A,B 4T
OUT PORT 10T
JMP 10T
Delay outside loop: To = 35 T-states X T = 35 × (0.5 uS)

T-states Total
Time Delay TD = To + TL
1 ms = 17.5 uS + (7.0 uS) x Count
Count = 8CH
Practice problem

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