LOGIC GATES AND LOGIC

FAMILIES

Mrs. M.S. Ranade

HOD Computer Engineering Department
 Definition

• Logic gate is an electronic circuit with one or

more inputs and only one output.

• The function of each gate can be represented by a

truth table or using Boolean notation/Boolean
expression

• Truth table describes the output values for all the

combinations of the input values
 Categories of logic gates

• Basic Gates: AND, OR, NOT

• Universal Gates: NAND, NOR

• Derived Gates/special purpose gates:

EX-OR, EX-NOR
 Basic Gates
AND Gate(two input)
 AND Gate continued
• AND gate is analogous to, two switches A and B
connected in series
• In this circuit, both switches A AND B must be closed
(Logic “1”) in order to put the lamp on
OR Gate
 OR Gate continued
• OR gate is analogous to, two switches A and B
connected in parallel
• In this circuit either Switch A OR Switch B can be
closed in order to put the lamp on
NOT Gate (INVERTER)
 NOT Gate continued
• In this circuit the switch A should be open in order
to put the lamp on and the switch A should be
closed in order to put the lamp off
Universal Gates
NAND gate

Equivalent circuit
 NAND gate continued

Switch representation of NAND function

NOR gate

Equivalent circuit
 NOR gate continued
Switch representation of NOR function
 Derived gates
Exclusive OR (EX-OR)gate
Exclusive NOR(EX-NOR) gate
EX-OR gate using basic gates
EX-NOR gate using basic gates
 3 input AND & NAND Gate
O/P OF O/P OF
I/P 3 I/P 3 I/P
A AND NAND
B Y
C A B C Y Y

Y = A.B.C 0 0 0 0 1
0 0 1 0 1
0 1 0 0 1
A 0 1 1 0 1
B Y
C 1 0 0 0 1

Y = A.B.C 1 0 1 0 1
1 1 0 0 1
1 1 1 1 0
3 input OR & NOR Gate
O/P OF O/P OF
I/P 3 I/P 3 I/P
OR NOR
A B C Y Y
0 0 0 0 1
0 0 1 1 0
0 1 0 1 0
0 1 1 1 0
1 0 0 1 0
1 0 1 1 0
1 1 0 1 0
1 1 1 1 0
3 input EX-OR & EX-NOR Gate
O/P OF 3 O/P OF 3
I/P I/P I/P
EX-OR EX-NOR
A B C Y Y
0 0 0 0 1
0 0 1 1 0
0 1 0 1 0
0 1 1 0 1
1 0 0 1 0
1 0 1 0 1
1 1 0 0 1
1 1 1 1 0
 Boolean Algebra

• Boolean Algebra was invented by George Boole

• Boolean Algebra is useful in Analysis and

Simplification of Digital Logic Circuits

• Boolean Algebra uses Binary(Boolean) numbers and

Logic Operations
 Boolean Algebra continued
Commutative Law: A.B=B.A
A+B=B+A

Associative Law: (A . B) . C = A . (B . C)
(A +B) + C = A + (B + C)

Distributive Law: A .(B + C) = A . B + A . C

A + (B . C) = (A + B) . (A + C)
Boolean Algebra continued…
AND Law: A.0=0
A.1=A
A.A=A
A.A=0

OR Law: A+0=A
A+1=1
A+A=A
A+A=1

Inversion Law: A=A

 DeMorgan's Theorems

First Theorem: A+B=A.B

NOR = Bubbled AND

Complement of sum of variables is equal to

productof their individual complements

The LHS of this theorem represents a NOR gate

with inputs A and B, whereas the RHS represents
an AND gate with inverted inputs.
This AND gate is called as Bubbled AND.
DeMorgan's Theorems continued
DeMorgan's Theorems continued
 DeMorgan's Theorems continued
Second Theorem: A.B=A+B
NAND = Bubbled OR

Complement of product of variables is equal to sum

of their individual complements

The LHS of this theorem represents a NAND gate

with inputs A and B, whereas the RHS represents an
OR gate with inverted inputs.
This OR gate is called as Bubbled OR
DeMorgan's Theorems continued
DeMorgan's Theorems continued
 Duality theorem
In two valued Boolean algebra dual of algebraic
expression can be obtained by
•Changing AND operation by OR operation
•Changing OR operation by AND operation
•Complementing any 1 or 0 appearing in the
expression
e.g. A . (B+C) = A . B + A . C
A + B . C = (A + B) . (A + C)
A.0=0
A+1=1
 Universal gates
•The NAND and NOR gates are universal gates

• A universal gate is a gate which can implement

any Boolean function without need to use any
other gate type.

•In practice, this is advantageous since NAND

and NOR gates are economical and easier to
fabricate and are the basic gates used in all IC
digital logic families.
NAND gate as universal gate
NAND gate as universal gate
NOR gate as universal gate
NOR gate as universal gate
 Logic gate ICs
Logic gates we have studied are available in the form
of Ics
Gate TTL IC CMOS IC
AND 7408 4081
OR 7432 4071
NOT 7404 40108
NAND 7400 4011
NOR 7402 4001
EX-OR 7486 4030
EX-NOR 74266 4077
 Tristate logic
• In normal logic circuit there are two states of output
low(0) and high(1)
• In digital electronics tri-state or 3-state logic allows
an output port to assume third state, a high impedance
state(z)
• In complex digital circuits like microprocessors or
microcomputers outputs of logic gates are connected
to common line called bus
• This allows multiple circuits to share the same output
line
• It effectively removes the output from the circuit
 Tristate logic continued
• The tri-state buffer has an input A, output Y, and
enable E. When the enable is TRUE, the tri-
state buffer acts as a simple buffer, transferring the
input value to the output
Tristate logic continued
 Logic Families

• Various digital functions are fabricated in the form of

IC
• A group of compatible ICs with same logic levels and
supply voltages for performing various logic
functions are referred as logic family
• Each family has its own basic electronic components
(NAND, NOR, and NOT gates), used to build
complex digital circuits.
 Logic Families classification
According to number of components used to fabricate the IC

Type No. of transistors/chip No. of logic Examples

of IC gates/chip
SSI Up to 99 components < 10 gates AND, OR gates
MSI 100 – 999 components < 100 gates Adders Counters
LSI 1000 – 9999 components < 1000 gates I/O chips, ALU
VLSI 10000 – 99999 components < 10000 gates Large memory arrays, PLD
ULSI > 100000 components > 10000 gates CPU, Complex PIC
 Logic Families classification
According to components and devices used to fabricate the IC

logic families

bipolar unipolar

Saturated Unsaturated PMOS

RTL Schottky TTL NMOS
DTL ECL CMOS
DCTL
IIL
HTL
TTL
 Characteristics of digital ICs
• Speed of operation/Propagation delay
• Power dissipation
• Speed power product/Figure of merit
• Fan In
• Fan out
• Noise margin
• Operating temperature
• Voltage and current parameters
 Speed of operation/Propagation
delay
• Speed of operation is specified in terms of Propagation
delay
• Propagation delay is defined as time delay between
application of input and availability of output
• It is expressed in nsec/psec
• Smaller the propagation delay, higher is the speed of
operation
 Power dissipation
• Power dissipation is measure of power consumed by
the gate when fully driven by all its inputs.

• Power dissipation is the amount of power dissipated

in an IC. It is determined by the current, I cc that is
drawn from the Vcc supply

• It is provided by Vcc x Icc.

• This is specified in mW
Speed power product/Figure of merit
• For digital IC, figure of merit is defined as the
product of speed and power.

• figure of merit = propagation delay(ns) * power

dissipation (mw)

• This is specified in Pico joules i.e. ns x mw= pJ

• The low value of speed power product is desirable

 Fan in
• Fan in is the number of inputs connected to the gate
without any degradation in the voltage level

fan in of AND gate is 3 fan in of OR gate is 5

 Fan out
• It is the no of the similar gates that can be driven by a logic
gate
• It specifies maximum number of inputs of same IC family
the gate can drive without falling outside the specified limits
• High fan out is beneficial, as this reduces the requirement
for additional drivers to drive more gates
 Noise margin
• Stray electric and magnetic fields induce unnecessary
voltages termed as noise, on the connecting wires in
between logic circuits.
• It may cause the voltage at the input to a logic circuit to
drop below VIH or fuse above VIL and may generate
unwanted operation.
• Noise immunity is ability of the logic circuit to tolerate
noise signals without causing unwanted changes in input
• Noise margin is quantitative measure of noise immunity
Noise margin continued
 Operating temperature
• All the gates or semiconductor devices are
temperature sensitive in nature.

• A range of temperature wherein an IC functions

properly should be identified.

• The accepted temperature range for IC' s is

from 0 ° to 70 ° C and for industrial applications
from -55° C to +125° C for military applications.
 Voltage and current parameters
• VIH(min): high-level input voltage
The minimum voltage level required for a logic 1 at an input.
• VIL(max): low-level input voltage.
The maximum voltage level required for a logic 0 at an input.
• VOH(min): high-level output voltage.
The minimum voltage level required for a logic 1 at an output.
• VOL(max): low-level output voltage
The maximum voltage level required for a logic 0 at an output.
 Voltage and current parameters
continued

• IIH: high-level input current

It is the minimum current which must be supplied by driving
source corresponding to logic 1
• IIL: low-level input current.
It is the minimum current which must be supplied by driving
source corresponding to logic 0
• IOH: high-level output current.
It is the maximum current the gate can sink in logic 1 level
• IOL: low-level output current
It is the maximum current the gate can sink in logic 0 level.
 TTL Family
• TTL is transistor transistor logic. It is saturated bipolar logic
family
• Bipolar junction transistor is active switching element used in
all TTL circuits. It operates either in saturation region (ON) or
cut off region (OFF)
 Versions of TTL

Version TTL series Power Propagation

dissipation delay
(mw) (ns)
Standard TTL 74XX 10 10
High speed TTL 74HXX 22 6
Low power TTL 74LXX 1 35
Schottky TTL 74SXX 20 3
Low power schottky TTL 74LSXX 2 10
Characteristics of TTL Family
Sr.No. Parameter values
1 Supply voltage 74 series : 5 + 5% (4.75 to 5.25)
V
54 series : 5 + 10% (4.5 to 5.5) V
2 Propagation delay 10 nsec
3 Power dissipation 10 mw
4 Figure of merit 100 pJ
5 Noise margin 0.4 V
6 Fan-out 10
7 Temperature range 74 series : 0 ° to 70 ° C
54 series : -55° C to +125° C
 Advantages & disadvantages of
TTL Family
Advantages :
• TTL circuits are faster i.e. low propagation delay
• Compatible to all other logic families
• Not damaged due to static charges
• Higher current capabilities
Disadvantages :
• Larger power dissipation
• Lower fan-out
• Less component density
• Poor noise immunity
 CMOS Family

• CMOS stands for complementary MOSFET (Metal

Oxide Semiconductor Field Effect Transistor)

• It belongs to unipolar logic family

• It is fabricated using p channel as well as n channel

MOSFETs
Characteristics of CMOS Family

Sr.No. Parameter values

1 Supply voltage 3 to 15 V
2 Propagation 105 nsec ( for metal gate CMOS)
delay
3 Power 0.1 mw
dissipation
4 Figure of merit 10.5 pJ
5 Noise margin 1.45 V
6 Fan-out 50
 Advantages & disadvantages of
CMOS Family
Advantages :
• Low power dissipation
• High fan-out
• High noise margin for higher values of VDD
• Capable of working over wide supply range
• High packaging density
Disadvantages :
• Slower than TTL i.e. higher propagation delay than TTL
• May get damaged due to static charges
• Need protection circuitry
 Comparison of TTL & CMOS
Sr. No. Parameter TTL CMOS
1 Devices used BJT p channel & n channel MOSFET
2 Supply voltage + 5V 3 to 15 V
3 Propagation delay 10 nsec 105 nsec ( for metal gate CMOS)
4 Power dissipation 10 mw 0.1 mw
5 Figure of merit 100 pJ 10.5 pJ
6 Noise margin 0.4 V 1.45 V
7 Fan-out 10 50
8 Packaging density Less More than TTL
9 Operating speed Faster Slower
10 Size Large Small
11 Cost More Less
 ECL Family
• ECL is emitter coupled logic

• It is unsaturated bipolar logic family

• Transistors in this logic family work either in active

region or in cut off region

• hence this logic family has increased speed of

operation
 Advantages & disadvantages of
ECL Family
Advantages
• Fastest logic family
• High fan-out as compared to TTL
• Excellent speed power product
Disadvantages
• Low noise margin
• High power dissipation
• Susceptible to noise
Comparison of TTL, CMOS & ECL

Parameter TTL CMOS ECL

Propagation delay 10 nsec 105 nsec 500ps
Power dissipation 10 mw 0.1 mw 25mw
Figure of merit 100 pJ 10.5 pJ
Noise margin 0.4 V 1.45 V 150 mV
Fan-out 10 50 25
Basic gate NAND NAND/NOR OR/NOR
 Types of TTL NAND gates

Basic building block of TTL family is NAND gate

Depending upon output circuit there are two types of

TTL NAND gates

• TTL NAND gate with totem pole output

• TTL NAND gate with open collector output

TTL NAND gate with totem pole
output
• With any of the input at logic low
corresponding B-E junctions of T1 is
forward biased. Hence T2 remains OFF.
Therefore its collector voltage rises
to VCC. T3 is operating as emitter
follower, therefore output Z will be
pulled up to high voltage i.e. Z= 1
• When all inputs are high, all base-emitter
junctions of Q1 are reverse biased, and
transistor T2 and T4 go into saturation
mode. T3 will remain off. Therefore the
output Z is at logic low.
 TTL NAND gate with totem pole
output continued
Advantages
• When output z=0 current flowing through Rc3 =0, it
reduces power dissipation in the circuit
• When output z=1 T3 acts as emitter follower, hence
output impedance is very low

Disadvantage
• T4 turns off slowly than T3 turns on, therefore for short
duration both transistors will be simultaneously on. It will
draw large current from supply
TTL NAND gate with open
collector output
• In open collector TTL NAND gate resistor
R3, transistor T3/Q3 of totem pole output
are removed.
• Collector of transistor Q4 can be connected
externally to Vcc through pull up resistance
• With any of the input at logic low, the
corresponding emitter-base junction is
forward biased, therefore the transistors Q2
and Q4 do not conduct. Thus the output is
either floating or Vcc, i.e. High level.
• When all inputs are high, all base-emitter
junctions of Q1 are reverse biased, and
transistor Q2 and Q4 go into saturation
mode. The output is at logic low.
 TTL NAND gate with open
collector output continued
Advantage
• Wired connection of logic gates is possible

Disadvantages
• Value of pull up resistor is high, which reduces switching
speed of Q4. therefore speed of operation is low
• Power dissipation increases when Q4 is on