Module 1 - KVL
Module 1 - KVL
∑V=0
closed path (or loop) is zero.
In other words, sum of voltage rises (or falls) across all the elements around a
loop is zero. While applying KVL around a loop, we should use only one voltage
convention at a time; either voltage rise or fall across all the elements of that loop
-V1 + V2 + V3 + V4 = 0
For the circuit shown in above Figure, applying KVL in clock-wise direction yields;
Since voltage fall convention is used, and current enters at negative terminal and leaves at positive (i.e.
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KVL can be applied by taking either a clockwise or a counter-clockwise trip around the loop.
Either way, the algebraic sum of voltages around the loop is going to be zero.
KCL is valid only if the total electric charge is constant in the circuit while KVL assumes that
there is no changing magnetic field within the closed circuit.
KCL and KVL both are indeed valid even if the circuit contains diodes, transistors, or any other
non-linear element. The theorem which is not valid with the non-linear elements in the circuit is
the principle of superposition.
Sum of the voltage in any closed loop must be zero considering same sign convention.
Sign Convention:
Lets consider that voltage is positive if we move from plus to minus then
voltage is negative if we move from minus to plus. We can consider
otherwise also. Lets apply KVL in single loop network as shown in figure.
-V + IR + IRL = 0 or +V - IR - IRL = 0
Series equivalent resistance
VIT-AP
KVL can be applied by taking either a clockwise or a counter-clockwise trip around the loop. Either
way, the algebraic sum of voltages around the loop is going to be zero.
KCL is valid only if the total electric charge is constant in the circuit while KVL assumes that there is
no changing magnetic field within the closed circuit.
KCL and KVL both are indeed valid even if the circuit contains diodes, transistors, or any other non-
linear element. The theorem which is not valid with the non-linear elements in the circuit is the
principle of superposition.
The voltage is taken as negative when tracing through a voltage source from negative to positive
(voltage rise).
The voltage is taken as positive when tracing through a voltage source from positive to negative
(voltage fall).
The voltage is taken as positive when tracing through a resistor in the direction of current flow
(voltage fall as current always flows from higher to lower potential).
The voltage is taken as negative when tracing through a resistor in the opposite direction of the
current (potential rise).
In simple words, the sign of the voltage across a circuit element is the same as the polarity of the
current entering terminal.
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Problem: Determine V0 and i in the circuit using KVL.
−8 + 2𝑖 + 2V0 − 4 + 6𝑖 = 0
(5.1)
After substituting the value of V0 from eq. (5.2) into eq. (5.1), we
get
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Two Loop Network:
We can find current through each resistance using KVL and current division
rule. Lets apply KVL in two loop network as shown in figure.
In loop (I):
In loop (II):
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Problem: Find current across each element in the circuit shown
in figure below
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Problem: Find the value of current I in the given circuit
Solution:
VA = –15 I (2)
Also from ohms law at the output we can get
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Thank you
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