CS-336: Embedded Systems

AVR Microcontroller:
Logic and Compare Instructions

Slight modification of slides shared by Dr. Rehan Ahmed

Instructor: Asra Abid Siddiqui [[email protected]]

Logical Instructions

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 Logic Instructions
AND Rd,Rr ;Rd = Rd AND Rr
OR Rd,Rr ;Rd = Rd OR Rr
EOR Rd,Rr ;Rd = Rd XOR Rr ( immediate are not supported)
COM Rd,Rr ;Rd = 1’s Complement of Rd (11111111 – Rd)
NEG Rd,Rr ;Rd = 2’s Complement of Rd (100000000 – Rd)

• AND is used to clear specific bit/s of a byte

Show the results of the following. We have cleared

four MSB-side bits
LDI R20,0x35 ;R20 = 35H
LDI R21,0x0F ;R21 = 0FH
!
AND R20,R21 ;R20 = R20 AND R21 (after execution, R20 = 05H)

Solution:

35H 0011 0101

AND 0FH 0000 1111
05H 0000 0101 ;35H AND 0FH = 05H, Z = 0, N = 0

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 AND: Details and Machine-code

• Can you specify the 16-bit machine code for AND R1,R2 ?

• Answer: Op-code of AND is 0010 00

• Rd is R1 in this case, so ddddd = 00001.
• Rr is R2 here, so rrrrr = 00010
• Machine code is: 0b 0010 0000 0001 0010

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 Setting and Clearing bits
AND Rd,Rr ;Rd = Rd AND Rr
OR Rd,Rr ;Rd = Rd OR Rr
EOR Rd,Rr ;Rd = Rd XOR Rr ( immediate are not supported)
COM Rd,Rr ;Rd = 1’s Complement of Rd (11111111 – Rd)
NEG Rd,Rr ;Rd = 2’s Complement of Rd (100000000 – Rd)

• AND is used to clear specific bit/s of a byte

• OR is used to set specific bit/s of a byte
We have set
the 3rd bit !

35H 0 0 1 1 0 1 0 1 04H 0 0 0 0 0 1 0 0
AND 0FH 0 0 1 1 0 1 0 1 OR 30H 0 0 1 1 0 0 0 0
05H 0 0 0 0 0 1 0 1 34H 0 0 1 1 0 1 0 0

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 X OR
• EOR Rd,Rs ;Rd=Rd XOR Rs

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 COM (Compleiment)
• COM Rd ;Rd=1’s compliment Rd

• Invert all bits

– 0’s to 1’s
– 1’s to 0’s

– Example

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 NEG (Negate)
• NEG Rd ;Rd=2’s compliment Rd

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 Branch and CP Instructions

CP Rd, Rr ;Rd – Rr (only flags are set)

All of these decisions can be made after CP

instruction 

• For example, BRVC can be used to branch when oVerflow is clear to zero
• BRVS is used to branch when oVerflow is set to one

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 ROL instruction
ROL Rd ;Rotate Left
In ROL, as bits are shifted from right to left, the carry flag enters the LSB
and the MSB exits to the carry flag. In other words, in ROL, the C is
moved to the LSB, and the MSB is moved to the C.

SEC ;set C to 1 (C = 1)
LDI R20,0x15 ;R20 = 0001 0101
ROL R20 ;R20 = 0010 1011 C=0
ROL R20 ;R20 = 0101 0110 C=0
ROL R20 ;R20 = 1010 1100 C=0
ROL R20 ;R20 = 0101 1000 C=1
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 ROR instruction
ROR Rd ;Rotate Right
In ROR, as bits are rotated from left to right, the carry flag enters the
MSB and the LSB exits to the carry flag. In other words, in ROR, the
C is moved to the MSB, and the LSB is moved to the C.

See what happens to 0010 0110 after running 3 ROR instructions:

CLC ;clear C to 0 (carry = 0 )

LDI R20 , 0x26 ;R20 = 0010 0110
ROR R20 ;R20 = 0001 0011 C=0
ROR R20 ;R20 = 0000 1001 C=1
ROR R20 ;R20 = 1000 0100 C=1

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 LSL instruction
LSL Rd ;Logical Shift Left
In LSL, as bits are shifted from right
to left, 0 enters the LSB and the MSB
exits to the carry flag. In other
words, in LSL, 0 is moved to the
LSB, and the MSB is moved to
the C.
this instruction multiplies by 2 the value of the register, but
only when the carry flag is not set after the LSL is executed.
Let’s see what happens to 00100110 after running 3 LSL instructions.
Multiplication

CLC ;clear C (C = 0)
LDI R20 , 0x26 ;R20 = 0010 0110 (38) C=0
LSL R20 ;R20 = 0100 1100 (74) C = 0
Error
LSL R20 ;R20 = 1001 1000 (148) CWhy
= 0?
LSL R20 ;R20 = 0011 0000 (98) C = 1; as
C=1 so content of ;R20 is
not multiplied by 2
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 LSR instruction
LSR Rd ;Logical Shift Right
In LSR, as bits are shifted from left
to right, 0 enters the MSB and the
LSB exits to the carry flag. In other
words, in LSR, 0 is moved to the
MSB, and the LSB is moved to
this instruction divides by 2 the content of the register and
the C.
carry flag contains the remainder of division.

LSR instruction can not divide a signed number by 2.

What happens to 0010 0110 after running 3 LSR instructions?

LDI R20,0x26 ;R20 = 0010 0110 (38)

LSR R20 ;R20 = 0001 0011 (19) C=0
LSR R20 ;R20 = 0000 1001 (9) C=1
LSR R20 ;R20 = 0000 0100 (4) C=1
Unsigned
division at work

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 ASR Instruction
ASR Rd ;Arithmetic Shift Right

ASR instruction can divide a signed number by 2.

In ASR, as bits are shifted from left to right, MSB is held constant and
the LSB exits to the carry flag. In other words, MSB is not changed
but is copied to D6, D6 is moved to D5, D5 is moved to D4 and
so on. Signed division
What happens to 0010 0110 after running 5 ASR instructions?at work 

LDI R20, 0xD0 ;R20 = 1101 0000 (-48) C=0

ASR R20 ;R20 = 1110 1000 (-24) C=0
ASR R20 ;R20 = 1111 0100 (-12) C=0
ASR R20 ;R20 = 1111 1010 (-6) C=0
ASR R20 ;R20 = 1111 1101 (-3) C=0
ASR R20 ;R20 = 1111 1110 (-1) C=1

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More Conditional Branch Instruction

Point to Remember: Make sure you use the

appropriate branch instruction for signed vs
unsigned comparison.
Take a look at examples to reinforce your concept.

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 SWAP
• SWAP Rd ;Swap nibbles Rd=R0 to R31

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 Rotate and Shift Instructions: Self-Read
• ROR
• ROL
• LSL
• LSR
• SWAP

Run the code examples provided in the book to better

understand the impact of these instructions.

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 Reading
• The AVR Microcontroller and Embedded Systems: Using
Assembly and C by Mazidi et al., Prentice Hall
– Chapter-5: Complete

• Also execute the code examples to enhance your

understanding.

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THANK YOU