K-Map For Minimization
K-Map For Minimization
TECH FIRST
YEAR
ACADEMIC YEAR: 2023-2024
[PO1]
The Karnaugh map reduces the need for extensive calculations by taking advantage of humans'
pattern-recognition capability.
Karnaugh Map: A graphical technique for simplifying a Boolean expression into either form:
minimal sum of products (MSP)
minimal product of sums (MPS)
These terms can be used to write a minimal Boolean expression representing the
required logic.
KARNAUGH MAPS - RULES OF
SIMPLIFICATION
THE KARNAUGH MAP USES THE FOLLOWING RULES FOR THE SIMPLIFICATION OF EXPRESSIONS BY GROUPING
TOGETHER ADJACENT CELLS CONTAINING ONES.
• No zeros allowed.
• No diagonals.
• Only power of 2 number of cells in each group.
• Groups should be as large as possible.
• Every one must be in at least one group.
• Overlapping allowed.
• Wrap around allowed.
• Fewest number of groups possible.
EXAMPLES
TWO-VARIABLE K-MAP
a
b 0 1
0
1
KARNAUGH MAPS
• Karnaugh maps, or K-maps, are often used to simplify logic problems with 2, 3
or 4 variables.
The map displayed is a one dimensional type which can be used to simplify
an expression in two variables.
Through inspection it can be seen that variable B has its true and false
form within the group.
This eliminates variable B leaving only variable A which only has its true
form.
Cell = 23=8
AB
C 00 01 11 10
0 2 6 4
0 ABC ABC ABC ABC
1 3 7 5
1 ABC ABC ABC ABC
THREE-VARIABLE K-MAP
ab
c 00 01 11 10
0 m0 m2 m6 m4
1 m1 m3 m7 m5
THREE-VARIABLE K-MAP
ab
c 00 01 11 10
• Implicant
• Product term that could be used to cover minterms of
a function
• Prime Implicant
• An implicant that is not part of another implicant
• Essential Prime Implicant
• An implicant that covers at least one minterm that is
not contained in another prime implicant
GUIDELINES FOR SIMPLIFYING
FUNCTIONS
ab
c 00 01 11 10
0 1
1 1 1 1
Fa , b ,
c m 1 ,3 ,
Three-Variable K-Map Example
Plot 1’s (minterms) of switching function
ab
c 00 01 11 10
0 ab
bc 1
1 1 1 1
F a , b , c
ab
THREE-VARIABLE K-MAPS
f (0,4) B C f (4,5) A B f (0,1,4,5) B f (0,1,2,3) A
BC BC BC BC
A 00 01 11 10 A 00 01 11 10 A 00 01 11 10 A 00 01 11 10
0 1 0 0 0 0 0 0 0 0 0 1 1 0 0 0 1 1 1 1
1 1 0 0 0 1 1 1 0 0 1 1 1 0 0 1 0 0 0 0
BC BC BC BC
A 00 01 11 10 A 00 01 11 10 A 00 01 11 10 A 00 01 11 10
0 0 1 1 0 0 0 0 0 0 0 1 0 0 1 0 1 0 0 1
1 0 0 0 0 1 1 0 0 1 1 0 0 0 0 1 1 0 0 1
THREE-VARIABLE K-MAP EXAMPLES
BC BC BC
A 00 01 11 10 A 00 01 11 10 A 00 01 11 10
0 1 0 1 1 1 0 1 1
1 1 1 1 1 1 1 1 1 1
BC BC BC
A 00 01 11 10 A 00 01 11 10 A 00 01 11 10
0 1 0 1 1 1 0 1 1
1 1 1 1 1 1 1 1 1 1 1
FOUR VARIABLE
EXAMPLES
FOUR-VARIABLE K-MAP
ab
cd 00 01 11 10
00 m0 m4 m8
m12
01 m1 m5 m m9
13
11
m3 m7
m15 m11
10
m2 m6
m14 m10
FOUR-VARIABLE K-MAP
ab
cd 00 01 11 10
00
11
10
aF, b , c, d m 0 ,2 ,3 ,6 ,8 ,1
2 ,1 3 , 1 5
Four-variable K-
Map
cd 00 01 11 10
ab
00
1 1 1
01
1
11
1 1
10
1 1
F m 0 ,2 ,3 ,6
Four-variable K-
Map
cd 00 01 11 10
ab
00
1 1 1
01
1
11
1 1
10
1 1
F a b d a b c ac
FOUR-VARIABLE
K-MAPS
CD CD CD CD
00 01 11 10 00 01 11 10 00 01 11 10 00 01 11 10
AB AB AB AB
00 1 0 0 0 00 0 0 0 0 00 0 0 0 0 00 0 0 0 0
01 0 0 0 0 01 0 1 0 0 01 0 0 0 0 01 1 0 0 1
11 0 0 0 0 11 0 1 0 0 11 0 1 1 0 11 0 0 0 0
10 1 0 0 0 10 0 0 0 0 10 0 0 0 0 10 0 0 0 0
01 0 0 1 1 01 1 0 0 1 01 0 0 0 0 01 0 0 0 0
11 0 0 0 0 11 1 0 0 1 11 0 0 0 0 11 0 0 0 0
10 0 0 0 0 10 0 0 0 0 10 0 0 1 1 10 1 0 0 1
CD CD CD CD
00 01 11 10 00 01 11 10 00 01 11 10 00 01 11 10
AB AB AB AB
00 0 0 0 0 00 0 0 1 0 00 1 0 1 0 00 0 1 0 1
01 1 1 1 1 01 0 0 1 0 01 0 1 0 1 01 1 0 1 0
11 0 0 0 0 11 0 0 1 0 11 1 0 1 0 11 0 1 0 1
10 0 0 0 0 10 0 0 1 0 10 0 1 0 1 10 1 0 1 0
01 0 1 1 0 01 1 0 0 1 01 1 1 1 1 01 0 0 0 0
11 0 1 1 0 11 1 0 0 1 11 1 1 1 1 11 0 0 0 0
10 0 1 1 0 10 1 0 0 1 10 0 0 0 0 10 1 1 1 1
CD CD CD
AB 00 01 11 10 AB 00 01 11 10 AB 00 01 11 10
00 1 1 1 00 1 1 1 00
01 1 1 1 01 1 01 1 1 1
11 1 1 1 11 11 1 1 1
10 1 1 10 1 1 1 10 1
CD CD CD
AB 00 01 11 10 AB 00 01 11 10 AB 00 01 11 10
00 1 1 00 00
01 1 1 1 1 01 01
11 1 1 1 11 11
10 1 10 10
Exam
ple
• Use a K-Map to simplify the following Boolean expression
Fa , b ,
c m 2 ,3 ,6
,7
Three-Variable K-Map
Example
Step 1: Plot the K-
c 00 01
map 11 10
ab
0 1 1
1 1 1
Fa , b ,
c m 2 ,4 ,5
Three-Variable K-Map Example
Step 2: Circle Prime Implicants
ab
c 00 01 11 10
Wrong!!
We really
0 1 1 should draw
A circle
around
all four 1’s
1 1 1
Fa , b ,
c m 2 ,3 ,6
Three-Variable K-Map Example
Step 3: Identify Essential Prime Implicants
ab EPI EPI
c 00 01 11 10
Wrong!!
We really
0 1 1 should draw
A circle
around
all four 1’s
1 1 1
Fa , b ,
c m 2 ,3 ,6
Three-Variable K-Map Example
Step 4: Select Remaining Prime Implicants to
complete the cover.
ab EPI EPI
c 00 01 11 10
0 1 1
1 1 1
Fa , b ,
c m 2 ,3 ,6
Three-Variable K-Map
Example
Step 5: Read the map.
ab a ab
c 00 01 11 10
b
0 1 1
1 1 1
Fa , b ,
c m 2 ,3 ,6
SOLUT
ION
F a , b , c a b
aSince
b we can still b
simplify the function
this means we did not use the largest
possible groupings.
Three-Variable K-Map Example
Step 3: Identify Essential Prime Implicants
ab EPI
c 00 01 11 10
0 1 1
1 1 1
Fa , b ,
c m 2 ,3 ,6
Three-Variable K-Map
Example
Step 5: Read the map.
ab b
c 00 01 11 10
0 1 1
1 1 1
Fa , b ,
c m 2 ,3 ,6
Soluti
on
F a,b,c
b
SPECIAL
CASES
THREE-VARIABLE K-MAP
EXAMPLE
ab
c 00 01 11 10
0 1 1 1 1
1 1 1 1 1
F a ,b,c
THREE-VARIABLE K-MAP
EXAMPLE
a
cb 00 01 11
10
0 0 0 0 0
1 0 0 0 0
F a ,b,c
THREE-VARIABLE K-MAP
EXAMPLE
ab
c 00 01 11 10
0 1 1
1 1 1
F a,b,c
Exam
ple
• Use a K-Map to simplify the following Boolean expression
a , b ,c
F m 1 ,2 ,3 ,
5,6
Three-Variable K-Map
Example
Step 1: Plot the K-
c 00 01
map 11 10
ab
0 1 1
1 1 1 1
a , b ,c
F m 1 ,2 ,3 ,
Three-Variable K-Map Example
Step 2: Circle ALL Prime Implicants
ab
c 00 01 11 10
0 1 1
1 1 1 1
a , b ,c
F m 1 ,2 ,3 ,
DECODERS, MULTIPLEXERS
AND ADDER/SUBTRACTOR
DECODER
A n-to-2n decoder takes an n-bit input and produces 2n outputs. The n inputs represent
a binary number that determines which of the 2 n outputs is uniquely true.
A 2-to-4 decoder operates according to the following truth table.
The 2-bit input is called S1S0, and the four outputs are Q0-Q3.
If the input is the binary number i, then output Qi is uniquely true.
S1 S0 Q0 Q1 Q2 Q3
0 0 1 0 0 0
0 1 0 1 0 0
1 0 0 0 1 0
1 1 0 0 0 1
For instance, if the input S1 S0 = 10 (decimal 2), then output Q2 is true, and Q0, Q1,
Q3 are all false.
This circuit “decodes” a binary number into a “one-of-four” code.
Follow the design procedures from last time! We have a truth table,
so we can write equations for each of the four outputs (Q0-Q3),
based on the two inputs (S0-S1).
S1 S0 Q0 Q1 Q2 Q3
0 0 1 0 0 0
0 1 0 1 0 0
1 0 0 0 1 0
1 1 0 0 0 1
S1 S0 Q0 Q1 Q2 Q3
0 0 1 0 0 0
0 1 0 1 0 0
1 0 0 0 1 0
1 1 0 0 0 1
ENABLE INPUTS
Many devices have an additional enable input, which is used to
“activate” or “deactivate” the device.
For a decoder,
EN=1 activates the decoder, so it behaves as specified earlier. Exactly
one of the outputs will be 1.
EN=0 “deactivates” the decoder. By convention, that means all of the
decoder’s outputs are 0.
We can include this additional input in the decoder’s truth table:
EN S1 S0 Q0 Q1 Q2 Q3
0 0 0 0 0 0 0
0 0 1 0 0 0 0
0 1 0 0 0 0 0
0 1 1 0 0 0 0
1 0 0 1 0 0 0
1 0 1 0 1 0 0
1 1 0 0 0 1 0
1 1 1 0 0 0 1
A 3-TO-8 DECODER
S1 S0 Q0 Q1 Q2 Q3
0 0 1 0 0 0
0 1 0 1 0 0 Q0 = S1’ S0’
1 0 0 0 1 0 Q1 = S1’ S0
1 1 0 0 0 1 Q2 = S1 S0’
Q3 = S1 S0
The mux output is a single bit, which is one of the 2n data inputs.
Q = S’ D0 + S D1
The simplest example is a 2-to-1 mux:
The select bit S controls which of the data bits D0-D1 is chosen:
If S=0, then D0 is the output (Q=D0).
If S=1, then D1 is the output (Q=D1).
MORE TRUTH TABLE ABBREVIATIONS
EN’ S1 S0 Q
0 0 0 D0
0 0 1 D1
0 1 0 D2
0 1 1 D3
1 x x 1
Ai Ai
0 1 0 1
Ai Bi Sum Carry Bi Bi
0 0 0 0 0 0 1 0 0 0
0 1 1 0
1 0 1 0 1 0
1 1 0 1
1 1 0 1
Sum = Ai Bi + Ai Bi Carry = Ai Bi
= Ai + Bi
Ai
Sum
Bi Half-adder Schematic
Carry
Half Adder:
o The most basic digital arithmetic circuit is the addition of two binary digits.
o A combinational circuit that performs the arithmetic addition of two bits is
called a half-adder.
S = A`B+AB` = A⊕B C = AB
FULL ADDER
Full Adder:
o A full-adder is a combinational circuit that performs the arithmetic sum of three
input bits.
Logic Diagram of Full Adder
The full adder can be thought of as two half adders connected
together, with the first half adder passing its carry to the second
half adder.
Half Subtractor
Full Subtractor
HALF- SUBTRACTOR FUNCTION TABLE
Input Output
A B Difference Borrow
0 0 0 0
0 1 1 1
1 0 1 0
1 1 0 0
HALF- SUBTRACTOR CIRCUIT
Difference AB A B A B
Borrow A' B
FULL-SUBTRACTOR FUNCTION TABLE
Input Output
A B C Difference Borrow
0 0 0 0 0
0 0 1 1 1
0 1 0 1 1
0 1 1 0 1
1 0 0 1 0
1 0 1 0 0
1 1 0 0 0
1 1 1 1 1
DIFFERENCE EXPRESSION
D ABC ABC ABC ABC
D A( BC BC ) A( BC BC )
D A( B C ) A( B C )
BORROW EXPRESSION
C’ 1
C 1 1 1
FULL-SUBTRACTOR CIRCUIT
Borrow A' B A' C BC