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Lecture#9

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Lecture#9

Uploaded by

kingdaim37
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© © All Rights Reserved
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Computer Logic & Design

lecture No 10

Date 2th of Aprial 2012

COMSATS Institute of Information


Technology
Functions of Combinational
• Half Adder Logic
– Accepts two binary digits at the input and
produces two binary digits at it’s output, a sum
bit and a carry bit
– Adds two single bit numbers
– Logic symbol


A 

Output Bits
Input Bits

Cout

Half-Adder
2
Functions of Combinational
Logic
• Function table for a half adder circuit

Input Output
A B Su Carry Out
m
0 0 0 0
0 1 1 0
1 0 1 0
1 1 0 1
– The sum output can be produced by an XOR
gate
– The Carry-Out output can be produced by an
AND gate 3
Functions of Combinational
Logic
• Half Adder circuit
A

B

Cout

Sum AB  AB A  B
C arryOut AB

4
Functions of Combinational
• Full Adder Logic
– Accepts two input bits and an input carry and
generates a sum output and an output carry
– Adds three single bit numbers
– Logic symbol


A 

Output Bits
Input Bits

Cin Cout

Full-Adder
5
Functions of Combinational
• Function table ofLogic
a Full Adder

Input Output
A B Carry Su Carry Out
In m
0 0 0 0 0
0 0 1 1 0
0 1 0 1 0
0 1 1 0 1
1 0 0 1 0
1 0 1 0 1
1 1 0 0 1
1 1 1 1 1
6
Functions of Combinational
Logic
• SOP simplification for the Sum output
Sum ABC  ABC  ABC  ABC

Sum A(BC  BC )  A(BC  BC )

Sum A(B C )  A(B C )

Sum A  B C
• SOP simplification for the carry-out output

C arryOut ABC  ABC  ABC  ABC


C arryOut C (AB  AB)  AB(C  C )
C arryOut C (A  B)  AB 7
Functions of Combinational
• Full Adder circuitLogic


C

Cout

Sum A  B C
C arry  out C (A  B)  AB
8
Combinational Logic Circuits
• Adjacent 1s Detector
– Simplified circuit implementation
A
B

C
D F

– Implementation using NAND gates

A A
B B

C C
F D F
D

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