Microprocessor

UNIT 1
Introduction
 Course Objectives
CO 1: Apply the basic concepts of digital fundamentals to Microprocessor
based personal computer system.

CO 2: Analyze a detailed s/w & h/w structure of the Microprocessor.

CO 3: Illustrate how the different peripherals (8085/8086) are interfaced with
Microprocessor.

CO 4: Analyze the properties of Microprocessors(8085/8086)

CO 5: Evaluate the data transfer information through serial & parallel ports.
DIAGRAM OF A COMPUTER SYSTEM
A computer is a programmable machine that receives input, stores and
manipulates data//information, and provides output in a useful
format.

Diagram Of A Computer System 3

BLOCK DIAGRAM OF A BASIC COMPUTER SYSTEM
Basic computer system consist of a Central processing unit (CPU), memory (RAM and ROM),
input/output (I/O) unit.

Address bus

ROM RAM I/O I/O

CPU interface devices

Data bus Control

bus

Block diagram of a basic computer system

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 Basic Component of Microcomputer
CPU - Central Processing Unit
• the portion of a computer system that carries out the
instructions of a computer program
• the primary element carrying out the computer's functions.
It is the unit that reads and executes program instructions.
• The opcode in the instruction tells the processor what to do.

Pentium Dual core processors

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Memory
• Physical devices used to store data or programs.
• Computer main memory comes in two principal varieties: random-access memory
(RAM) and read-only memory (ROM).
• RAM can be read and written to anytime- the CPU commands it, but ROM is pre-
loaded with data and software that never changes, so the CPU can only read from
it.
• ROM is typically used to store the computer's initial start-up instructions.
• In general, the contents of RAM are erased when the power to the computer is
turned off, but ROM retains its data indefinitely.
• In a PC, the ROM contains a specialized program called the BIOS that orchestrates
loading the computer's operating system from the hard disk drive into RAM
whenever the computer is turned on or reset.

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I/O Unit

• Input/output (I/O), refers to the communication between an

information processing system (such as a computer), and the outside world
possibly a human, or another information processing system.
• Inputs are the signals or data received by the system, and outputs are the signals
or data sent from it
• Devices that provide input or output to the computer are called peripherals
• On a typical personal computer, peripherals include input devices like the
keyboard and mouse, and output devices such as the display and printer.
Hard disk drives, floppy disk drives and optical disc drives serve as both input and
output devices. Computer networking is another form of I/O.

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 DATA SIZE
Nibble 4 bit

Byte 8 bit

Word 16 bit

Long word 32 bit

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Internal structure and basic operation of
microprocessor

Address bus
ALU Register
Section
Data bus

Control and timing

section Control bus

Block diagram of a microprocessor

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Arithmetic and logic unit (ALU)

• The component that performs the arithmetic and logical operations

• the most important components in a microprocessor, and is typically
the part of the processor that is designed first.
• able to perform the basic logical operations (AND, OR), including the
addition operation.

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 Internal structure of ALU

2 bits of ALU 4 bits of ALU

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 Control unit
• The circuitry that controls the flow of information through the processor,
and coordinates the activities of the other units within it.
• In a way, it is the "brain within the brain", as it controls what happens
inside the processor, which in turn controls the rest of the PC.
• On a regular processor, the control unit performs the tasks of fetching,
decoding, managing execution and then storing results.

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 Register sets
• The register section/array consists completely of circuitry used to
temporarily store data or program codes until they are sent to the ALU or
to the control section or to memory.

• The number of registers are different for any particular CPU and the more
register a CPU have will result in easier programming tasks.

• Registers are normally measured by the number of bits they can hold, for
example, an "8-bit register" or a "32-bit register".

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Evolution of Microprocessors
Technology Advancement
Microprocessor Types:
• Microprocessor are classified into various category on the following 3
bases-
Based on size of data bus
Based on Application
Based on architecture used in microprocessor
Based on size of data bus
• 4 bits microprocessor (Ex: intel 4004)
• 8 bits microprocessor (Ex: 8080,8085)
• 16 bits microprocessor (Ex 8086, 80286)
• 32 bits microprocessor (Ex: 80386, 80486, Pentium-I)
• 64 bits microprocessor (intel Core 2 duo,core I3,I5,I7)
Based on Application
• General Purpose microprocessor
• Specific purpose microprocessor(Microcontroller)
Based on architecture used in
microprocessor
• Reduced instruction set computer processor (RISC)
• Complex instruction set computer processor(CISC)
• Example – Suppose we have to add two 8-bit number:
• CISC approach: There will be a single command or instruction for this like ADD which will perform the
task.
• RISC approach: Here programmer will write first load command to load data in registers then it will use
suitable operator and then it will store result in desired location.
• So, add operation is divided into parts i.e. load, operate, store due to which RISC programs are longer and
require more memory to get stored but require less transistors due to less complex command.
 CISC, RISC and EPIC
We have three basic types of microprocessors.
CISC (Complex Instruction Set Computer)
• As the name suggests, the instructions are in a complex form. It
means that a single instruction can contain many low-level
instructions.
• For example loading data from memory, storing data to the memory,
performing basic operations, etc.
• Besides, we can say that a single instruction has multiple addressing
modes. Furthermore, as there are many operations in single
instruction they use very few registers.
• Examples of CISC are Intel 386, Intel 486, Pentium, Pentium Pro,
Pentium II, etc.
RISC (Reduced Instruction Set Computer)
• As per the name, in this, the instructions are quite simple, and hence,
they execute quickly.
• Moreover, the instructions get complete in one clock cycle and also
use a few addressing modes only.
• Besides, it makes use of multiple registers so that interaction with
memory is less.
• Examples are IBM RS6000, DEC Alpha 21064, DEC Alpha 21164, etc.
EPIC (Explicitly Parallel Instruction Computing)
• It allows the instructions to compute parallelly by making use of
compilers.
• Moreover, the complex instructions also process in fewer clock
frequencies.
• It encodes the instructions in 128-bit bundles. Where each bundle
contains three instructions encoded in 41 bits each and a 5-bit
template. This 5-bit template contains information about the type of
instructions and that which instructions can be executed in parallel.
• Examples are IA-64 (Intel Architecture-64), etc.
RISC CISC
It has fixed format instruction. It has variable format instruction.

The program written for RISC architecture needs Program written for CISC architecture tends to
to take more space in memory. take less space in memory.
Can perform only Register to Register Arithmetic Can perform REG to REG or REG to MEM or MEM
operations to MEM
The execution time of RISC is very short. The execution time of CISC is longer.

It uses a limited number of instruction that It uses a large number of instruction that requires
requires less time to execute the instructions. more time to execute the instructions.
Few addressing modes are used Long variety of addressing modes

Focus on software Focus on hardware

Uses only Hardwired control unit Uses both hardwired and micro programmed
control unit
Requires more number of registers Requires less number of registers
Data transfer schemes
 Contents
Mode of Data Type of
Transmission Transmission

Parallel Simplex

Serial
• Synchronous Half Duplex
• Asynchronous

Full Duplex
 MODE OF DATA TRANSMISSION 3

Data transmission refers to the movement

of data in form of bits

It occurs Between two or more Digital

Devices.
 DATA TRANSMISSION TYPES 3
.
 PARALLEL TRANSMISSION 3
 All the bits of a byte are transmitted simultaneously on separate wires.

 This diagram shows that 8 Wires are used simultaneously to transfer 8-bit digital data.

 E.g. Data transmission between computer and printer.

 It is possible only for those device which are at less distance from each other.
 ADVANTAGES OF PARALLEL TRANSMISSION:
All the data bits will be transmitted simultaneously, so time required for
transmission of N number of bits will be only one clock cycle.

Due to transmission in only one clock cycle, clock frequency can be kept low
without affecting speed of operation.

DISADVANTAGES OF PARALLEL TRANSMISSION:

Transmission of N bits will require N number of wires.

With increase of users these wires will be too difficult to handle.

 SERIAL TRANSMISSION 3
 All the bits of a byte are transmitted serially one after the other on same wire.

 This diagram shows that 1 Wire is used to transfer 8-

bit digital data.
 E.g. Data transmission between computer and
computer.
 It is not only possible for devices at closer distances
but also for far distances.
 ADVANTAGES OF SERIAL TRANSMISSION

Only one wire is required.

Reduced cost due to less number of conductors.

DISADVANTAGES OF SERIAL TRANSMISSION

Speed of data transfer is low.

TYPES OF SERIAL TRANSMISSION 3

SYNCHRONOUS DATA TRANSFER

ASYNCHRONOUS DATA TRANSFER

SYNCHRONOUS DATA TRANSFER 3

 Synchronous means “at the same time”.

 It is used in between the devices that match in speed.

 No ‘start’ and ‘stop’ bits are used.

 No need of ideal time between data bytes.

DIAGRAMMATIC REPRESENTATION 3
 ASYNCHRONOUS DATA TRANSFER 3
 Asynchronous means “at a regular interval”.

 It is used in between the devices that are not match in speed. Invariably used in

between microprocessor and IO devices.

 To help receiver ‘start’ and ‘stop’ bits are used along with data in middle.

 Ideal Time between bytes are not constant. They are also known as gaps.
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DIAGRAMMATIC REPRESENTATION3
 TRANSMISSION MODE 3
 The term transmission mode defines the direction of the flow of
information between two communication devices.

 It tells the direction of signal flow between the two devices.

TYPES OF TRANSMISSION MODE3
 SIMPLEX MODE
 In simplex mode transmission information sent only in one direction that means one device can send only where as other device
only receives i.e. communication is unidirectional.

HALF DUPLEX

 In half duplex transmission data can be sent in both the directions, but one device can transmit at a time, when one device is
sending the other can only
receive and vice-versa.

FULL DUPLEX

 In full duplex transmission, data can be sent in both the directions simultaneously means both the connected devices can transmit
and receive at the same time.
Memory Addressing and
Interfacing
• Memory
• Calculating the number of address lines
• Memory Address Map
 Memory
• Memory is the integral part of the microcomputer
system.

• While executing a program, the microprocessor needs

to access memory quite frequently to read instruction
codes and data stored in the memory.

• The interfacing circuit enables that access.

There are two types of primary memory:

R/W memory and ROM Memory
 Memory
• The R/W memory is made of registers and each register has a
group of flip-flops that store bits of information; these flip-
flops are called memory cells.

• On the other hand, the ROM stores information permanently in

the form of diodes; the group of diodes can be viewed as a
register.

• The number of bits stored in the register is called a memory

word. In memory chip, all the registers are arranged in a
sequence and identified by binary numbers called memory
addresses.

The size of the memory is N x M; where N is the number

of registers and M is the word length, in number of bits.
Calculating the number of address lines
• If we have N number of memory locations, then number of address lines will be log2N

• For example:
• If we have 4 registers on a chip, the number of address lines will be 2.
• If we have 8 registers on a chip, the number of address lines will be 3.
 Dealing with more than one Chip
• For example:
• We have 4 registers on a chip; the chip will
have 2 address pins A1A0.

• If we have total of 8 registers therefore we

need 3 address lines A2A1A0.

• The number of lines used for chip selection=

3-2 =1
 Dealing with more than one Chip
• The address on A1 and A0 will determine
the register to be selected. A2 is used to
select between two chips M1 and M2.

• When A2=0 (chip M1 is selected)

• When A2=1 (chip M2 is selected)
 Dealing with more than one Chip
• What happens when we have 4 address lines?
• Assume we have available 4 address lines and two memory chips with four registers.
• Four address lines are capable of identifying 16 registers; however we need only three address lines
to identify eight registers.
• What should we do with the fourth line?
• One solution shown below:
 Memory Map and Addresses
• Memory Address Map is a pictorial representation of assigned address space for each chip in the
system. The memory map term is used generally for the entire address ranges of the memory chips
in the in a given system.

• In 8085 microprocessor 16 address lines are available. 16 address lines are capable of identifying
216 registers.

A1 A14 A13 A12 A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0

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0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 = 0000H
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 = FFFFH
 Memory Map and Addresses
• Example:
• Illustrate the memory address range of the
chip with 256 bytes of memory, and explain
how the range can be changed by modifying
the hardware of the chip select CS’ line.

• Number of address lines for identifying 256

registers =8
 Memory Map and Addresses
• For example if inverter on the line A15 removed, then the address required on A15-A8 to enable the
chip will be
A15 A14 A13 A12 A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0

1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 = 8000H

1 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 = 80FFH
Interrupts
 Contents
Introduction

Types of interrupts
 Hardware Interrupts
 Maskable & Non-Maskable Interrupts
 Software Interrupts
Conclusion
 Introduction1, 2
 The meaning of ‘interrupts’ is to break the sequence of operation.

 While the Microprocessor is executing a program, an ‘interrupt’ breaks the normal sequence of execution of
instructions, diverts its execution to some other program called Interrupt Service Routine (ISR). After
executing , control returns the back again to the main program.

The processor can be interrupted in the following ways

1. by an external signal generated by a peripheral,
2. by an internal signal generated by a special instruction in the program,
3. by an internal signal generated due to an exceptional condition which occurs while executing an
instruction.
Source: https://seekingthings.com/my-notes/computer-science-notes/microprocessors-and-microcontrollers/intel-8085-pin-diagram/
Source: https://www.includehelp.com/embedded-system/pin-diagram-of-8086-microprocessor.aspx
 Interrupts

Software Interrupt (INT

Hardware Interrupts
n)

Non-Maskable 256 Types Of

Maskable Interrupts Interrupts Software Interrupts
 Hardware Interrupts 1, 2
The interrupts initiated by external hardware by
sending an appropriate signal to the interrupt pin
of the processor is called hardware interrupt.

The 8086 processor has two interrupt pins INTR

and NMI.

The interrupts initiated by applying appropriate

signal to these pins are called hardware interrupts
of 8086.
 Interrupts

Hardware
Interrupts

Maskable Non-Maskable
Interrupts Interrupts

Source: https://www.includehelp.com/embedded-system/pin-diagram-of-8086-microprocessor.aspx
 Interrupts

Hardware
Interrupts

Maskable Interrupts Non-Maskable Interrupts

Source: https://www.includehelp.com/embedded-system/pin-diagram-of-8086-microprocessor.aspx
 Interrupts

Hardware
Interrupts

Maskable Non-Maskable

Interrupts Interrupts

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Maskable & Non-Maskable Interrupts 1, 2
Interrupts

Hardware
Interrupts
The programmer can choose
to mask specific interrupts
and re-enable them later.

Maskable Non-Maskable
Interrupts Interrupts
Maskable & Non-Maskable Interrupts 1, 2
Interrupts The programmer cannot
control when a Non-
Maskable Interrupts
is serviced

Hardware
Interrupts

The processor has to stop the

Maskable Non-Maskable main program to execute
the NMI service routine
Interrupts Interrupts
Maskable & Non-Maskable Interrupts 1, 2
• The processor has the facility for accepting or rejecting hardware interrupts.
• Programming the processor to reject an interrupt is referred to as masking and
programming the processor to accept an interrupt is referred to as unmasking or non-
masking.
• The interrupts whose request can be either accepted or rejected by the processor are called
maskable interrupts.
• The interrupts whose request has to be definitely accepted (or cannot be rejected) by the
processor are called non-maskable interrupts.
 Hardware Interrupts

Used to handle external hardware peripherals , such as key boards , mouse , hard disks , floppy
disks , DVD drivers, and printers.

key boards mouse hard disks floppy disks DVD drivers

 Software Interrupts 1, 2

The software interrupts are program instructions.

These instructions are inserted at desired locations in a program.

While running a program, if software interrupt instruction is encountered then the processor initiates

an interrupt.

The 8086 processor has 256 types of software interrupts.

The software interrupt instruction is INT n, where n is the type number in the range 0 to 255.
Software Interrupt (INT n)

Used by operating systems to provide

hooks into various function

Used as a communication mechanism

between different parts of the program
 Timer
• Timer maintains the timing of an operation in sync with a system clock or an external
clock.

• The timer is an important application in Embedded systems. The timer has so many
applications such as measure time generating delays.

• TIMER/COUNTER is designed to count the time interval between events. It counts the
cycle of the peripheral clock or an externally supplied clock [1].
 Timing Diagram
• Timing Diagram is a graphical representation of process in step with respect to time. It
helps to understand the process of microprocessor step by step with respect to time.

• Timing diagram gives the representation of various control signals generated during
execution of an instruction.
Important terms related to timing diagrams
Instruction Cycle
• Instruction cycle is defined as the time required to complete the execution of an
instruction.

Machine cycle
• Machine cycle is defined as the time required to complete one operation of
accessing memory, I/O, or acknowledge an external request.

T-state
• T-state is the time corresponding to one clock period. T-state
is defined as on subdivision of the operation performed in one
clock period. The term t-state and clock period are often used
synonymously.
Instruction Format
• For timing diagram, it is important to know “number of bytes in an
instruction”. Generally instruction can be:
• One byte instruction
• Two byte instruction
• Three byte instruction

• Each instruction often consists of two parts:

• Opcode
• Operand
Opcode specifies the operation to be performed
Operand specifies the data the operation to be performed on.
Opcode Fetch machine cycle: T1 Clock Cycle:
• The content of PC is placed in the address bus; AD0-AD7
contains lower bit address and A8-A15 contains the higher bit
address
• I/OM’ signal is low indicating that a memory location is
accessed
• S1 and S0 also changed to the levels S0=1 and S0=1
• ALE is high indicating that the multiplexed AD0-AD7 act as
lower address bus.

T2 Clock Cycle:
• Multiplexed bus now changed to data bus.
• RD’ signal is made low by the processor.
• ALE is made LOW indicating that AD0-AD7 act as lower data
bus.
• RD’ signal makes the memory device load the data bus with
the contents of the location addressed by the processor.
Opcode Fetch machine cycle:
T3 Clock Cycle:
• The opcode available on the data bus is read by the
processor and moved to the Instruction Register.
• RD’ signal is deactivated by making it at logic 1.

T4 Clock Cycle:
• The processor decodes the instruction in the IR
register and generates the necessary control
signals to execute the instruction.
• Based on the decoded instruction, further
operations such as fetching/writing into memory
etc take places.