01 Introduction
01 Introduction
Peripherals Computer
Central Main
Processing Memory
Unit
Computer
Systems
Interconnection
Input
Output
Communication
lines
Structure - The CPU
CPU
Computer Arithmetic
Registers and
I/O Login Unit
System CPU
Bus
Internal CPU
Memory Interconnection
Control
Unit
Structure - The Control Unit
Control Unit
CPU
Sequencing
ALU Login
Control
Internal
Unit
Bus
Control Unit
Registers Registers and
Decoders
Control
Memory
Internet Resources
- Web site for book
• http://WilliamStallings.com/COA/COA7e.html
— links to sites of interest
— links to sites for courses that use the book
— errata list for book
— information on other books by W. Stallings
• http://WilliamStallings.com/StudentSupport.html
— Math
— How-to
— Research resources
— Misc
Internet Resources
- Web sites to look for
• WWW Computer Architecture Home Page
• CPU Info Center
• Processor Emporium
• ACM Special Interest Group on Computer
Architecture
• IEEE Technical Committee on Computer
Architecture
• Intel Technology Journal
• Manufacturer’s sites
—Intel, IBM, etc.
Internet Resources
- Usenet News Groups
• comp.arch
• comp.arch.arithmetic
• comp.arch.storage
• comp.parallel