DEPARTMENT OF TECHNICAL EDUCATION

ANDHRA PRADESH
Name : U.Rajya Lakshmi
Designation : Lecturer
Branch : Computer Engg.,
Institute : Govt.Polytechnic for Women,
PALAMANER.
Year/Semester : III Semester
Subject : Computer Architecture
Subject Code : CM-303
Topic : Memory Organization
Duration : 50 Min
Sub Topic : paging scheme of Virtual Memory
Teaching aids : PPT,drawings
CM303.44 1
 Do you Know

• What is meant by address mapping?

• What are various address mapping techniques?

CM303.44 2
 Recap of previous lesson

• Address mapping
• Translation of virtual addresses in to physical
addresses
• various mapping techniques
• Paging scheme
• Segmentation scheme

CM303.44 3
 Objectives

On completion of this period you would be able to

explain

• The paging mapping in virtual memory system

CM303.44 4
 Introduction
• In virtual memory system CPU generates virtual
addresses that refer instructions and data of a
program

• To execute a program the virtual addresses

must be mapped on to physical addresses

• Two address mapping schemes

• Paging scheme
• Segmentation scheme
CM303.44 5
 Paging
Contd.,

• A technique used to translate virtual addresses on

to physical addresses

• Physical memory and virtual memory are each

divided in to equal size groups

• Groups of physical memory are called as blocks

or frames

CM303.44 6
 Contd.,
Paging
• Groups of virtual memory are called as pages

• Size of a frame = size of a page

• Page size is always a power of 2

• Programs are also split in to pages

CM303.44 7
 Paging Contd.,

• Consider a computer system with 8K address

space and 4 K memory space

• If divided each in to groups of 1K words

• No. of pages =8 and No. of blocks = 4

• Division of address space and memory space is

shown in fig.1

CM303.44 8
 Contd.,
Page 0 Paging
Page 1

Page 2

Page 3

Page 4 Block 0

Page 5 Block 1

Page 6 Block 2

Page 7 Block 3
Address space Memory space
V=8K=213 M=4K=212

Fig.1 CM303.44 9
 Paging Contd.,

• To execute a program , its pages are to be loaded

into main memory blocks

• Not all the virtual pages can be in main memory at

a time

• At any given time no. of pages can be loaded in to

main memory is equals to no. of blocks

CM303.44 10
 Paging Contd.,

• Virtual address is a combination of two parts

• a page number and
• a displacement

• If page size is 2p then

• p bits of virtual address are used to specify the
displacement
• Remaining high order bits are used to represent page
number
• Fig.2 shows the representation of an n-bit virtual
address
CM303.44 11
 Paging
n bit virtual address

n-p bits p bits

n-p bits page no. p bit displacement

In the example of fig.1 virtual address has 13 bits

3 bits 10 bits

3 bits page no. 10 bit displacement

Fig.2
CM303.44 12
 Paging
• Address mapping in paging scheme is the only
mapping from pages to blocks

• A page table is used to map pages in to frames

• Page table contains one entry for each page

• Each entry has three fields: page no. , block no.

and presence bit

CM303.44 13
 Paging
• Block no. field denotes where the page is loaded
in to main memory

• Presence bit
• indicates whether the page is loaded in main
memory or not
• 0 means page is not available
• 1 means page is available

• The organization of page table for the example of

fig.4.10 is shown in fig.3
CM303.44 14
 Page no. block no. presence bit

000 0

001 01 1

010 11 1

011 0

100 10 1

101 0

110 00 1

111 0

Organization of a Page table

Fig.3 CM303.44 15
 Paging

• The table shows that pages 1,2,4 and 6 are now

available in blocks 1,3,2 and 0 respectively

• The process of virtual address mapping is shown in

fig.4.13

• CPU references an instruction with a virtual

address of 13 bits

CM303.44 16
 Memory mapping using page table
Page no. displacement
1101000110110
Page no. block no. Presence bit
000 0
Main memory
001 01 1
Block 0
010 11 1
011 0 001000110110 Block 1
100 10 1 Main memory address register
Block 2
101 0
Block 3
110 00 11
111 0
Fig. 4
MBR
00 1
CM303.44 17
 Paging
• 3 high-order bits are used to access the page
table

• If presence bit against this page no. is 1 then

block no. is taken

• Block no. and displacement of virtual address are

transferred to main memory address register to
get 12 bit physical address

CM303.44 18
 Paging
• If presence bit is 0 then a page fault trap is
generated

• The operating system then fetches the required

page from secondary memory

CM303.44 19
 Summary

• In this class you have studied about

• Paging Address mapping scheme

• Maps pages in to blocks

• Page is a group of words in address space

• Block is a group of words in physical space

CM303.44 20
QUIZ

CM303.44 21
1. Address space is divided into
a) blocks
b) Frames
c) pages
d) addresses

CM303.44 22
1. Address space is divided into
• blocks
• Frames
• pages
• addresses

CM303.44 23
2. The two parts of virtual address are

a) Page no. and block no.

b) Block no. and frame no.
c) Block no. and displacement
d) Page no. and displacement

CM303.44 24
2. The two parts of virtual address are

• Page no. and block no.

• Block no. and frame no.
• Block no. and displacement
• Page no. and displacement

CM303.44 25
 Frequently asked Questions

1. Explain paging scheme of virtual address

translation with a diagram

CM303.44 26
 Frequently asked Questions

2. Consider a logical address space of eight pages

of 1024 words each,mapped on to a physical
memory of 32 frames.
a) How many bits are there in the logical
address?
b) How many bits are there in the logical
address?
3. Why are pages sizes always in powers of 2?
CM303.44 27