Unit I - Chapter 2

The Texas Instruments

MSP 430
 Introduction
 The MSP430 is a mixed-signal microcontroller family from Texas Instruments
 It is Built around a 16-bit CPU
 MSP430 device can address 64 KB of memory
 The extended MSP430X can address 1MB of memory
The MSP430 is designed for low cost and low power consumption embedded
applications.
The current drawn in idle mode can be less than 1 µA. The top CPU speed is
25 MHz
 MSP430X, where X = F2001 to 03, F2011 – 13, FG4616 –
FG4619 MSP430F2001, MSP430F2002, MSP430F2013
The Outside View – Pin-Out

Pin-out of MSP430F2003 and F2013

Note: one of the first tasks in a program for a MC is
to configure the functions of each pin. All the pins
can be used by a program except Vcc and Vss for
power and TEST/SBWTCK for debugging
Functional block diagram of
F2013
CPU controls the execution of program instructions. It
includes ALU + Registers
 Emulation/emulator enables one computer system to
imitate the functions of another computer system.
Joint Test Action Group (JTAG) used for a debugging,
programming, and testing interface
Spy-Bi-Wire is a JTAG protocol developed by Texas
Instruments for their MSP430 microcontrollers. In this
protocol only two connections are used instead of the usual
four pins for the general JTAG interface. The two
connections are a bidirectional data output, and a clock.
All the above components are used to communicate with
a desktop computer when downloading a program and for
debugging.
 Flash memory is Nonvolatile memory, this can be
programmed
and erased electrically – EEPROM
1 KB in F2003 and 2 KB in F2013
RAM is volatile memory, data can be read and write, used for data
storage. F2013 includes 128 bytes
 A/D converter
 Two I/O ports to provide communication with the outside peripheral
watchdog timer is used to automatically detect software defects and
reset the processor if any occur.
 Timer used to measure time generating delays, used for generating
baud rates and to count the time interval between events
 A universal serial interface used to connect peripheral devices
Brownout protection is a low voltage detection (LVD) circuit to
protect against brown-out conditions where the supply voltage drops
below the minimum required operating voltage
 Vss – GND
 Vcc – supply voltage ( 5V)
 F2013 requires 1.8 to 3.6 V
 The performance of the device depends on Vcc.
Ex: * unable to program the flash memory if Vcc < 2.2 V
* the max clock frequency of 16 MHz
is available only if Vcc ≥ 3.3 V
 Memory
 MSP430X memory address bus is in the range of 16 to 20 bits.
Ordering of bits, bytes and words in memory of MSP430X2XXX
A debugger usually displays the contents of
memory by showing the value of each byte by
default
Address increase in ascending order – this means
LSB is displayed first, followed by MSB – Little
endian ordering
MSB is displayed first, followed by LSB – Big
endian ordering
Memory map of MSP430F2013
SFR: controls or monitors various aspects of the
microcontroller's function, enabling and signaling interrupts from
peripherals
Peripheral registers with byte and word access: it is to
configure the peripheral and provides communication between the
CPU and peripherals
 RAM: used for variables. F2013 has 128 bytes
Bootstrap loader: it is a small program which can be activated
immediately after a microcontroller has been powered up, in order
to load and execute another program in a well defined manner.
Flash information memory: for storage of non-volatile data like
serial number to identify equipment, address for a n/w,
information of a printer etc. F2013 has 256 bytes
Flash code memory: holds program code and constant data.
F2013 has 2 KB
Interrupt and reset vectors: *used to handle interrupts,
reset and even exceptions
* Exceptions are events that disrupt the normal execution
flow of the program
*When an exception occurs the processor handles it
by executing piece of code called exception handler
EX: Arithmetic exceptions, memory access violations etc
 CPU
 it executes the instruction stored in memory
it includes ALU, set of 16 regs named as R0 – R15 and the
logic circuit to decode the instruction and implement them
CPU run at a max frequency of 16 MHz in new versions and 8
MHz in others
 Regs in CPU of MSP430 is shown below
PC: this contains the address of the next instruction to be
executed
SP: points to the top of the stack and it
automatically adjusted as the stack grows upward or
downward
.
Stack is LIFO memory and it is a specific area of RAM used
to store temporary variables during program execution. Each
function/subroutine call "pushes" data to the stack. The data
is "popped" when the function returns
 SR: The status register contains information about the state of the
processor. SR of MSP430 is shown below
Constant generator: this provides six commonly used
constants (-1,0,1,2,4,8) so that they need not be fetched
from memory whenever they are needed
GPR: 12 regs R4 – R15 are GPR or General working
Reg. They are used for data and address
 Memory-Mapped input and
 Memory output
mapped I/O is a way to exchange data and
instructions
between a CPU and peripheral devices attached to it
Memory mapped IO is one where the processor and the IO device
share the same memory location
Memory-mapped I/O uses the same address bus to address
both memory and I/O devices
 Clock Generation
Why clock signal in MCs
Clock signal admin the speed at which the processor
executes instruction
It govern the baud rate of serial-communication signals,
the amount of time needed to perform an analog-to-digital
conversion etc
 two types of clocks are used in MCs
(a) Fast clock
(b) Slow clock
 Oscillators are used to generate clock signal.
Types of oscillators
(a) Crystal: * Accurate and stable
*Runs at either high frequency (MHz) to drive main bus
or low frequency of 32,768 Hz for real time clock
* Expensive and delicate
* Draws large current at high frequency
* Takes a long time to start up and stabilize (105
cycles)
(b) Resistor and capacitor (RC)

 Cheap and quick to start

 Poor accuracy and stability
The components can be external or
integrated within the MCU
 Used to generate low or audio-frequency signals
Uses of clock signal generated by oscillator
 (a) Master clock (MCLK): used by CPU and peripherals
(b) Subsystem master clock (SMCLK): used
by peripherals
 MCLK and SMCLK are supplied by internal DCO
DCO starts very rapidly at full speed, taking less than 1
µsec
 Both are runs between 0.8 to 1.1 MHz range
 (c) Auxiliary clock (ACLK): used by peripherals
ACLK comes from low frequency crystal oscillator ( 32
KHz)
 Exceptions

Exceptions are events that disrupt the normal execution

flow of the program – abnormal situation occurs during
program execution
 Exception handler
EX: Arithmetic exceptions, memory access violations etc
Interrupts
An interrupt is a signal sent to the processor that
interrupts the current process
It may be generated by a hardware device or a software
program.
A hardware interrupt is created by an input device such
as a mouse or keyboard
Software interrupts are used to handle errors and
exceptions that occur while a program is running
Both hardware and software interrupts are processed by
an interrupt handler, also called an interrupt service
routine, or ISR.
When a program receives an interrupt request, the ISR
handles the event and the program resumes.(When
interrupt occurs, the processor stops executing the main
task)
 Processor stores the content of PC and SR on to the stack
to
resume later on and executes ISR
processor returns to its previous activity when the ISR has been
completed
 Interrupts are processed in less than a millisecond.
Reset
Generated by h/w, either when power is applied or
when something misfortune has happened and
normal operation cannot continue
Reset causes the device to restart from a well
defined state.
One can use reset at any time to avoid non
desirable situations.
Vector and Vector table
The CPU must be told where to fetch the next instruction
following an interrupt or reset
The address of this instruction is called a vector - is the
address of an interrupt handler (ISR)
Each ISR has its own vector, stored in a vector table at
the end of program memory
The vector table is at a fixed location, but the ISRs can
be located any where in memory.