Lecture 8: Binary Multiplication & Division

• Today’s topics:

 Addition/Subtraction
 Multiplication
 Division

• Reminder: get started early on assignment 3

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2’s Complement – Signed Numbers
0000 0000 0000 0000 0000 0000 0000 0000two = 0ten
0000 0000 0000 0000 0000 0000 0000 0001two = 1ten
…
0111 1111 1111 1111 1111 1111 1111 1111two = 231-1

1000 0000 0000 0000 0000 0000 0000 0000two = -231

1000 0000 0000 0000 0000 0000 0000 0001two = -(231 – 1)
1000 0000 0000 0000 0000 0000 0000 0010two = -(231 – 2)
…
1111 1111 1111 1111 1111 1111 1111 1110two = -2
1111 1111 1111 1111 1111 1111 1111 1111two = -1
Why is this representation favorable?
Consider the sum of 1 and -2 …. we get -1
Consider the sum of 2 and -1 …. we get +1

This format can directly undergo addition without any conversions!

Each number represents the quantity
x31 -231 + x30 230 + x29 229 + … + x1 21 + x0 20 2
Alternative Representations

• The following two (intuitive) representations were discarded

because they required additional conversion steps before
arithmetic could be performed on the numbers

 sign-and-magnitude: the most significant bit represents

+/- and the remaining bits express the magnitude

 one’s complement: -x is represented by inverting all

the bits of x

Both representations above suffer from two zeroes

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Addition and Subtraction

• Addition is similar to decimal arithmetic

• For subtraction, simply add the negative number – hence,

subtract A-B involves negating B’s bits, adding 1 and A

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Overflows

• For an unsigned number, overflow happens when the last carry (1)
cannot be accommodated

• For a signed number, overflow happens when the most significant bit
is not the same as every bit to its left
 when the sum of two positive numbers is a negative result
 when the sum of two negative numbers is a positive result
 The sum of a positive and negative number will never overflow

• MIPS allows addu and subu instructions that work with unsigned
integers and never flag an overflow – to detect the overflow, other
instructions will have to be executed

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Multiplication Example

Multiplicand 1000ten
Multiplier x 1001ten
---------------
1000
0000
0000
1000
----------------
Product 1001000ten

In every step
• multiplicand is shifted
• next bit of multiplier is examined (also a shifting step)
• if this bit is 1, shifted multiplicand is added to the product 6
HW Algorithm 1

In every step
• multiplicand is shifted
• next bit of multiplier is examined (also a shifting step)
• if this bit is 1, shifted multiplicand is added to the product
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HW Algorithm 2

• 32-bit ALU and multiplicand is untouched

• the sum keeps shifting right
• at every step, number of bits in product + multiplier = 64,
hence, they share a single 64-bit register
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Notes

• The previous algorithm also works for signed numbers

(negative numbers in 2’s complement form)

• We can also convert negative numbers to positive, multiply

the magnitudes, and convert to negative if signs disagree

• The product of two 32-bit numbers can be a 64-bit number

-- hence, in MIPS, the product is saved in two 32-bit
registers

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MIPS Instructions

mult $s2, $s3 computes the product and stores

it in two “internal” registers that
can be referred to as hi and lo

mfhi $s0 moves the value in hi into $s0

mflo $s1 moves the value in lo into $s1

Similarly for multu

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Fast Algorithm

• The previous algorithm

requires a clock to ensure that
the earlier addition has
completed before shifting

• This algorithm can quickly set

up most inputs – it then has to
wait for the result of each add
to propagate down – faster
because no clock is involved

-- Note: high transistor cost

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Division

1001ten Quotient
Divisor 1000ten | 1001010ten Dividend
-1000
10
101
1010
-1000
10ten Remainder

At every step,
• shift divisor right and compare it with current dividend
• if divisor is larger, shift 0 as the next bit of the quotient
• if divisor is smaller, subtract to get new dividend and shift 1
as the next bit of the quotient 12
 Division

1001ten Quotient
Divisor 1000ten | 1001010ten Dividend

0001001010 0001001010 0000001010 0000001010

100000000000  0001000000 00001000000000001000
Quo: 0 000001 0000010 000001001

At every step,
• shift divisor right and compare it with current dividend
• if divisor is larger, shift 0 as the next bit of the quotient
• if divisor is smaller, subtract to get new dividend and shift 1
as the next bit of the quotient 13
Divide Example
• Divide 7ten (0000 0111two) by 2ten (0010two)

Iter Step Quot Divisor Remainder

0 Initial values
1

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Divide Example
• Divide 7ten (0000 0111two) by 2ten (0010two)
Iter Step Quot Divisor Remainder
0 Initial values 0000 0010 0000 0000 0111
1 Rem = Rem – Div 0000 0010 0000 1110 0111
Rem < 0  +Div, shift 0 into Q 0000 0010 0000 0000 0111
Shift Div right 0000 0001 0000 0000 0111
2 Same steps as 1 0000 0001 0000 1111 0111
0000 0001 0000 0000 0111
0000 0000 1000 0000 0111
3 Same steps as 1 0000 0000 0100 0000 0111
4 Rem = Rem – Div 0000 0000 0100 0000 0011
Rem >= 0  shift 1 into Q 0001 0000 0100 0000 0011
Shift Div right 0001 0000 0010 0000 0011
5 Same steps as 4 0011 0000 0001 0000 0001
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Hardware for Division

A comparison requires a subtract; the sign of the result is

examined; if the result is negative, the divisor must be added back

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Efficient Division

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Divisions involving Negatives

• Simplest solution: convert to positive and adjust sign later

• Note that multiple solutions exist for the equation:

Dividend = Quotient x Divisor + Remainder

+7 div +2 Quo = Rem =

-7 div +2 Quo = Rem =
+7 div -2 Quo = Rem =
-7 div -2 Quo = Rem =

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Divisions involving Negatives

• Simplest solution: convert to positive and adjust sign later

• Note that multiple solutions exist for the equation:

Dividend = Quotient x Divisor + Remainder

+7 div +2 Quo = +3 Rem = +1

-7 div +2 Quo = -3 Rem = -1
+7 div -2 Quo = -3 Rem = +1
-7 div -2 Quo = +3 Rem = -1

Convention: Dividend and remainder have the same sign

Quotient is negative if signs disagree
These rules fulfil the equation above

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Title

• Bullet

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