The course that gives CMU its Zip!

15-213

Disk-based Storage Oct. 23, 2008

Topics

Storage technologies and trends Locality of reference Caching in the memory hierarchy

lecture-17.ppt

Announcements
Exam next Thursday

style like exam #1: in class, open book/notes, no electronics

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Disk-based storage in computers

Memory/storage hierarchy

Combining many technologies to balance costs/benefits Recall the memory hierarchy and virtual memory lectures

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Memory/storage hierarchies

Balancing performance with cost

Small memories are fast but expensive Large memories are slow but cheap

Exploit locality to get the best of both worlds

locality = re-use/nearness of accesses allows most accesses to use small, fast memory Capacity

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Performance

An Example Memory Hierarchy

Smaller, faster, and costlier (per byte) storage devices
L0: registers
CPU registers hold words retrieved from L1 cache.

L1: on-chip L1 cache (SRAM) L2:

off-chip L2 cache (SRAM) main memory (DRAM)

L1 cache holds cache lines retrieved from the L2 cache memory. L2 cache holds cache lines retrieved from main memory.

L3: Larger, slower, and cheaper (per byte) storage devices L5:

Main memory holds disk blocks retrieved from local disks.

L4:

local secondary storage (local disks)

Local disks hold files retrieved from disks on remote network servers.

remote secondary storage (tapes, distributed file systems, Web servers)

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From lecture-9.ppt

Page Faults
A page fault is caused by a reference to a VM word that is not in physical (main) memory

Example: An instruction references a word contained in VP 3, a miss that triggers a page fault exception
Physical page Virtual address number or Valid disk address null PTE 0 0
1 1 0 1 0 0 PTE 7 1

Physical memory (DRAM)

VP 1 VP 2 VP 7 VP 4

PP 0
PP 3

null

Virtual memory (disk)

VP 1 VP 2 VP 3 VP 4 VP 6

Memory resident page table (DRAM)

From lecture-14.ppt

VP 7

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Disk-based storage in computers

Memory/storage hierarchy

Combining many technologies to balance costs/benefits Recall the memory hierarchy and virtual memory lectures

Persistence

Storing data for lengthy periods of time

DRAM/SRAM is volatile: contents lost if power lost Disks are non-volatile: contents survive power outages
this brings in many interesting data organization, consistency, and management issues

To be useful, it must also be possible to find it again later

take 18-746/15-746 Storage Systems

well talk a bit about file systems next

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Whats Inside A Disk Drive?

Arm Actuator Spindle Platters

Electronics SCSI connector 8

Image courtesy of Seagate Technology

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Disk Electronics
Just like a small computer processor, memory, network iface
Connect to disk Control processor Cache memory Control ASIC Connect to motor

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Disk Geometry
Disks contain platters, each with two surfaces
Each surface organized in concentric rings called tracks Each track consists of sectors separated by gaps
tracks
surface track k gaps

spindle

sectors

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Disk Geometry (Muliple-Platter View)

Aligned tracks form a cylinder
cylinder k

surface 0
surface 1 surface 2 surface 3 surface 4 surface 5 spindle platter 0 platter 1 platter 2

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Disk Structure
Read/Write Head Upper Surface Platter Lower Surface Arm

Cylinder

Track Sector Actuator

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Disk Operation (Single-Platter View)

The disk surface spins at a fixed rotational rate The read/write head is attached to the end of the arm and flies over the disk surface on a thin cushion of air spindle spindle spindle

spindle

By moving radially, the arm can position the read/write head over any track

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Disk Operation (Multi-Platter View)

read/write heads move in unison from cylinder to cylinder

arm

spindle

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Disk Structure - top view of single platter

Surface organized into tracks
Tracks divided into sectors

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Disk Access

Head in position above a track

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Disk Access

Rotation is counter-clockwise

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Disk Access Read

About to read blue sector

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Disk Access Read

After BLUE read

After reading blue sector

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Disk Access Read

After BLUE read

Red request scheduled next

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Disk Access Seek

After BLUE read

Seek for RED

Seek to reds track

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Disk Access Rotational Latency

After BLUE read

Seek for RED

Rotational latency

Wait for red sector to rotate around

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Disk Access Read

After BLUE read

Seek for RED

Rotational latency

After RED read

Complete read of red

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Disk Access Service Time Components

After BLUE read

Seek for RED

Rotational latency

After RED read

Seek Rotational Latency Data Transfer

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Disk Access Time

Average time to access a specific sector approximated by:

Taccess = Tavg seek + Tavg rotation + Tavg transfer

Seek time (Tavg seek)

Time to position heads over cylinder containing target sector Typical Tavg seek = 3-5 ms

Rotational latency (Tavg rotation)

Time waiting for first bit of target sector to pass under r/w head Tavg rotation = 1/2 x 1/RPMs x 60 sec/1 min

e.g., 3ms for 10,000 RPM disk

Transfer time (Tavg transfer)

Time to read the bits in the target sector Tavg transfer = 1/RPM x 1/(avg # sectors/track) x 60 secs/1 min

e.g., 0.006ms for 10,000 RPM disk with 1,000 sectors/track

given 512-byte sectors, ~85 MB/s data transfer rate
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Disk Access Time Example

Given:

Rotational rate = 7,200 RPM Average seek time = 5 ms Avg # sectors/track = 1000

Derived average time to access random sector:

Tavg rotation = 1/2 x (60 secs/7200 RPM) x 1000 ms/sec = 4 ms Tavg transfer = 60/7200 RPM x 1/400 secs/track x 1000 ms/sec = 0.008 ms Taccess = 5 ms + 4 ms + 0.008 ms = 9.008 ms

Time to second sector: 0.008 ms

Important points:

Access time dominated by seek time and rotational latency First bit in a sector is the most expensive, the rest are free SRAM access time is about 4 ns/doubleword, DRAM about 60 ns

~100,000 times longer to access a word on disk than in DRAM

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Disk storage as array of blocks

6 7

12

23

OSs view of storage device (as exposed by SCSI or IDE/ATA protocols)

Common logical block size: 512 bytes Number of blocks: device capacity / block size

Common OS-to-storage requests defined by few fields

R/W, block #, # of blocks, memory source/dest

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Page Faults
A page fault is caused by a reference to a VM word that is not in physical (main) memory

logical block number can a Example: An instruction references a word contained in VP 3,bemiss that triggers a page fault exception remembered in page table to
Physical memory identify disk location(DRAM) for pages Physical page Virtual address number or not resident in main memory VP 1 PP 0 Valid disk address VP 2 null PTE 0 0 VP 7
1 1 0 1 0 0 PTE 7 1 VP 4

PP 3

null

Virtual memory (disk)

VP 1 VP 2 VP 3 VP 4 VP 6

Memory resident page table (DRAM)

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From lecture-14.ppt

VP 7

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In device, blocks mapped to physical store

Disk Sector (usually same size as block)

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Physical sectors of a single-surface disk

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LBN-to-physical for a single-surface disk

4 3 15 27 16 28 5 17 29 18 6

14

39 26 38 25 37 36

40 41

30
42 43 31 19 7

13

24
12 0

4 7

35 23 11

44 32 20 45 46 33 34 21
22 10

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Disk Capacity
Capacity: maximum number of bits that can be stored

Vendors express capacity in units of gigabytes (GB), where 1 GB = 109 Bytes (Lawsuit pending! Claims deceptive advertising)

Capacity is determined by these technology factors:

Recording density (bits/in): number of bits that can be squeezed into a 1 inch linear segment of a track Track density (tracks/in): number of tracks that can be squeezed into a 1 inch radial segment Areal density (bits/in2): product of recording and track density

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Computing Disk Capacity

Capacity = (# bytes/sector) x (avg. # sectors/track) x
(# tracks/surface) x (# surfaces/platter) x (# platters/disk) Example:

512 bytes/sector 1000 sectors/track (on average) 20,000 tracks/surface 2 surfaces/platter

5 platters/disk

Capacity = 512 x 1000 x 80000 x 2 x 5 = 409,600,000,000 = 409.6 GB

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Looking back at the hardware

CPU chip register file ALU

bus interface

main memory

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Connecting I/O devices: the I/O Bus

CPU chip register file ALU system bus memory bus

bus interface

I/O bridge

main memory

I/O bus USB controller mouse keyboard graphics adapter monitor disk disk controller

Expansion slots for other devices such as network adapters

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Reading from disk (1)

CPU chip register file ALU

CPU initiates a disk read by writing a READ command, logical block number, number of blocks, and destination memory address to a port (address) associated with disk controller

bus interface

main memory

I/O bus

USB controller mouse keyboard

graphics adapter
monitor

disk controller

disk

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Reading from disk (2)

CPU chip register file ALU

Disk controller reads the sectors and performs a direct memory access (DMA) transfer into main memory

bus interface

main memory

I/O bus

USB controller mouse keyboard

graphics adapter
monitor

disk controller

disk

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Reading from disk (3)

CPU chip register file ALU

When the DMA transfer completes, the disk controller notifies the CPU with an interrupt (i.e., asserts a special interrupt pin on the CPU)

bus interface

main memory

I/O bus

USB controller mouse keyboard

graphics adapter
monitor

disk controller

disk

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