EMBEDDED MICROCONTROLLERS

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 2. EMBEDDED MICROCONTROLLERS

2.1 Introduction
2.2 Structure of a basic computer system
2.3 CPU families used in microcontrollers
2.4 Basic I/O devices and technologies
2.5 Interrupts and Memories

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 2.1 INTRODUCTION TO MICROCONTROLLERS

•A microcontroller is a small, low-cost computer-on-a-chip which usually

includes:
• An 8 or 16 bit microprocessor (CPU).
•A small amount of RAM.
•Programmable ROM and/or flash memory.
•Parallel and/or serial I/O.
•Timers and signal generators.
•Analog to Digital (A/D) and/or Digital to Analog (D/A) conversion.

• Often used to run dedicated code that controls one or more tasks in the
operation of a device or a system.
• Also called embedded controllers, because the microcontroller and support
circuits are often built into, or embedded in, the devices they control.
• Microcontrollers usually must have low-power requirements since many
devices they control are battery-operated.
INTRODUCTION
 Microcontrollers have only been with us for a few decades
but their impact (direct or indirect) on our lives is profound.
Their presence is unnoticed at most of the places like
 At supermarkets in Cash Registers, Weighing Scales, etc.
 At home in Ovens, Washing Machines, Alarm Clocks, etc.
 At play in Toys, VCRs, Stereo Equipment, etc.
 At office in Typewriters, Photocopiers, Elevators, etc.
 In industry in Industrial Automation, safety systems, etc.
 On roads in Cars, Traffic Signals, etc.

 What inside them makes these machines “smart”? The answer

is microcontroller.

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INTRODUCTION
 Simply an embedded controller is a controller that is
embedded in a greater system.
 One can define an embedded controller as a controller (or
computer) that is embedded into some device for some
purpose other than to provide general purpose computing.
 Is an embedded controller the same as a microcontroller? The
answer is definitely no.
 One can state devices such as 68000, 32032, x86, Z80, and
so on that are used as embedded controllers but they aren’t
microcontrollers(example: 8051 Microcontroller).

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2.2 STRUCTURE OF A BASIC COMPUTER SYSTEM

Figure 2.1 High-level view of a computer system

•A computer system has three main components: a central processing unit

(CPU) or processor, a memory unit, and input/output (I/O) devices (see Figure
2.1).
•These three components are interconnected by a system bus. The term “bus” is
used to represent a group of electrical signals or the wires that carry these
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signals.
BASIC COMPUTER SYSTEM
 As shown in the figure below, the three major components of the system
bus are the address bus, data bus, and control bus.

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Figure 2.2 Simplified block diagram of a computer system
BASIC COMPUTER SYSTEM
 The width of the address bus determines the memory
addressing capacity of the processor.
 The width of the data bus indicates the size of the data
transferred between the processor and memory or I/O device.
 For example, the 8086 processor has a 20-bit address bus and a
16-bit data bus.
 The amount of physical memory that this processor can address
is 220 bytes, or 1MB, and each data transfer involves 16 bits.
 The Pentium, on the other hand, has 32 address lines and 64
data lines.
 Thus, the Pentium can address up to 232 bytes, or a 4-GB
memory.
BASIC COMPUTER SYSTEM
 The maximum memory size is calculated as:
 The number of memory locations (addresses)*the size of
each memory location
 The size of each memory location is equal to data bus
width/memory word size.
 Example 2: Calculate the maximum memory size of a
computer with a 24 bit address bus and a memory word size
of 16 bits.
 A 24 bit address bus allows addresses =16 MB of addresses.
224
Each address contains 16 bits =2 bytes. Therefore, maximum
memory size =16MB*2bytes= 32 MB

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BASIC COMPUTER SYSTEM
 The data bus is used to transfer the actual data to and from
the locations (basic functional units). It is a two-way bus as
data may be going to the processor (Read) or coming from
the processor (Write).
 The control bus consists of a set of control signals.

 Typical control signals include memory read, memory write,

I/O read, I/O write, interrupt, interrupt acknowledge, bus
request, and bus grant.
 These control signals indicate the type of action taking place
on the system bus.
 For example, when the processor is writing data into the
memory, the memory write signal is asserted. Similarly,
when the processor is reading from an I/O device, the I/O 10
read signal is asserted.
BASIC COMPUTER SYSTEM
 The system memory, also called main memory or primary
memory, is used to store both program instructions and
data.
 I/O devices such as the keyboard and display are used to
provide user interface.
 I/O devices are also used to interface with secondary
storage devices such as disks.
 The system bus is the communication medium for data
transfers. Such data transfers are called the bus
transactions.
 Some examples of bus transactions are memory read,
memory write, I/O read, I/O write, and interrupt.
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BASIC COMPUTER SYSTEM
 The processor acts as the controller of all actions or services
provided by the system. It can be thought of as executing the
following cycle forever:
 Fetch an instruction from the memory;
 Decode the instruction (i.e., identify the instruction);

 Execute the instruction (i.e., perform the action specified by the

instruction).
 This process is often referred to as the fetch-decode-execute
cycle, or simply the execution cycle.

Figure 2.3 Execution cycle of a typical computer system

Fetching an instruction from the main memory involves placing the appropriate
address on the address bus and activating the memory read signal on the control bus 12
to indicate to the memory unit that an instruction should be read from that location.
BASIC COMPUTER SYSTEM
 The memory unit requires time to read the instruction at the
addressed location. This time is called the access time.
 The memory then places the instruction on the data bus.

 The processor, after instructing the memory unit to read,

waits until the instruction is available on the data bus and
then reads the instruction.
 Decoding involves identifying the instruction that has been
fetched from the memory.
 To facilitate the decoding process, machine language
instructions follow a particular instruction encoding scheme.

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BASIC COMPUTER SYSTEM
 To execute an instruction, the processor contains hardware
consisting of control circuitry and an arithmetic and logic unit
(ALU).
 The control circuitry is needed to provide timing controls as well as
to instruct the internal hardware components to perform a specific
operation.
 The ALU is mainly responsible for performing arithmetic
operations (such as add, divide) and logical operations (such as
and, or) on data.
 In practice, instructions and data are not fetched, most of the time,
from the main memory.
 There is a high-speed cache memory that provides faster access to
instructions and data than the main memory.
 For example, the Pentium provides a 16 KB on-chip cache. This is
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divided equally into data cache and instruction cache.
 The presence of the on-chip cache is transparent to application
BASIC COMPUTER SYSTEM
 The system clock provides a timing signal to synchronize the
operations of the system.
 A clock is a sequence of 1’s and 0’s. The clock frequency is
measured in the number of cycles per second.
 This number is referred to as Hertz (Hz). We often use the
abbreviations MHz and GHz to represent 10^6 and 10^9
cycles per second, respectively.

Figure 2.4 Clock signal of a computer system

 The system clock defines the speed at which the system 15

operates.
BASIC COMPUTER SYSTEM
 The clock period is defined as the length of time taken by one
clock cycle.

 For example, a clock frequency of 1 GHz yields a clock period

of

 If it takes three clock cycles to execute an instruction, it takes

.
 One way to increase the speed of a computer system is to use a
higher clock frequency.
 For example, if we use a clock of 2 GHz, the instruction
execution time reduces from 3 ns to 1.5 ns.
 Clock frequency increases with improvements in technology.
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Current technology allows clock frequencies higher than 5 GHz.
BASIC COMPUTER SYSTEM
 The memory of a computer system consists of tiny electronic
switches, with each switch set in one of two states: open or closed.
 It is, however, more convenient to think of these state as 0 and 1
rather than open and closed.
 A single such switch can be used to represent two (i.e., binary)
numbers: a zero and a one.
 Thus, each switch can represent a binary digit or bit, as it is known.
The memory unit consists of millions of such bits.
 In order to make memory more manageable, bits are organized into
groups of eight bits called bytes.
 Memory can then be viewed as consisting of an ordered sequence of
bytes.
 Each byte in this memory can be identified by its sequence numbers.
 This is referred to as the memory address of the byte. Such memory 17
is called byte addressable memory.
BASIC COMPUTER SYSTEM
 The memory unit supports two fundamental operations: read
and write.
 The read operation reads a previously stored data and the write
operation stores a value in memory.
 Two metrics are used to characterize memory. Access time
refers to the amount of time required by the memory to retrieve
the data at the addressed location.
 The other metric is the memory cycle time, which refers to the
minimum time between successive memory operations.
 Memory transfer rates can be measured by the bandwidth
metric. It specifies the number of bytes transferred per second.
 For example, a Pentium system with the PC133 memory can
transfer 8 bytes at a frequency of 133 times per second. This 18
gives us a bandwidth of 8 * 133 = 1064 B/s.
BASIC COMPUTER SYSTEM
 The read operation is nondestructive in the sense that one can
read a location of the memory as many times as one wishes
without destroying the contents of that location.
 The write operation, on the other hand, is destructive, as
writing a value into a location destroys the old contents of
that memory location.
 Steps in a typical read cycle
 Place the address of the location to be read on the address bus,
 Activate the memory read control signal on the control bus,
 Wait for the memory to retrieve the data from the addressed
memory location and place it on the data bus,
 Read the data from the data bus,
 Drop the memory read control signal to terminate the read cycle.
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BASIC COMPUTER SYSTEM
 Steps in a typical write cycle
 Place the address of the location to be written on the
address bus,
 Place the data to be written on the data bus,
 Activate the memory write control signal on the
control bus,
 Wait for the memory to store the data at the addressed
location,
 Drop the memory write signal to terminate the write
cycle.

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2.3 CPU FAMILIES USED IN MICROCONTROLLERS

 A microcontroller unit, abbreviated MCU, is developed using

a microprocessor core or central processing unit (CPU),
usually less complex than that of a Microprocessor Unit
(MPU).
 This basic CPU is then surrounded with memory of both
types (program and data) and several types of peripherals, all
of them embedded into a single integrated circuit, or chip.
 The blending of CPU, memory, and I/O within a single chip
is what we call a microcontroller.
 In Embedded Systems operations are managed behind the
scenes by a microcontroller.

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2.3 CPU FAMILIES
 supportive devices used in microcontrollers are
 Timers
 A/D converter
 Serial I/O and
 Common communication lines (System Bus).

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Figure 2.5 Structure of a typical microcontroller
2.3 CPU FAMILIES
 The Central Processing Unit (CPU) in a microcontroller is
typically a microprocessor unit (MPU) or core.
 The CPU is where instructions become signals and hardware
actions that command the microcomputer operation.
 The minimal list of components that define the architecture of
a CPU include the following:
 Hardware Components:
 An Arithmetic Logic Unit (ALU)
 A Control Unit (CU)
 A Set of Registers
 Bus Interface Logic (BIL)
 Software Components:
 Instruction Set
 Addressing Modes
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 The instructions and addressing modes will be defined by the
specifics of the hardware ALU and CU units.
2.3 CPU FAMILIES
 The collection of hardware components within the CPU
performing data operations is called the processor’s datapath.
 The hardware components performing system control
operations are designated Control Path.
 The control unit is at the heart of the CPU control path.

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Figure 2.6 Minimal architectural components in a simple CPU

i. MSP430 CPU FAMILY
 The MSP430 family is based on a 16-bit CPU which was
introduced in the early models of the series 3xx.
 Later on the architecture was extended to 20-bits, the CPUX,
keeping full compatibility with the original 16-bit CPU.
 MSP430 registers: There are sixteen 16-bit registers in the
MSP430 CPU named R0, R1…, R15.
 Registers R4 to R15 are of the general purpose type. The
specialized purpose registers are:
 Program Counter register, named R0 or PC.
 Stack Pointer Register, named R1 or SP.
 Status Register, with a dual function also as Constant Generator. It is
named R2, SR or CG1.
 Constant Generator, named CG2.
 Register R3 is exclusively used as a constant generator 25
supplying instruction constants, and is not used for data storage.
i. MSP430 CPU FAMILY
 Status Register The SR register has the common flags of Carry
(C), Zero (Z), Sign or Negative (N), overflow (V) and general
interrupt enable (GIE).
 It contains in addition a set of bits, CPUOFF, OSCOFF, SCG1 and
SCG0, used to configure the CPU, oscillator and power mode operations.
These bits are explained in later sections and chapters.
 Arithmetic-Logic Unit: TheMSP430 CPU ALU has a 16-bit
operand capacity; the CPUX has 16- or 20-bit operand capacity.
 It handles the arithmetic operations of addition with and without carry,
decimal addition with carry, subtraction with and without carry.
 These operations affect the overflow, zero, negative, and carry flags.
 The logical operations AND and XOR affect the flags, but other ones do
not, like the Bit Set (OR) or Bit Clear.
 Like many microcontrollers, the MSP430 ALU does not handle
multiplications or divisions, which may be programmed.
 Several models contain a hardware multiplier peripheral for faster 26
operation.
ii. MSP430X (CPUX) FAMILIES
 The MSP430X (CPUx) is a 20-bit version of Texas
Instruments MSP430 microcontroller.
 It was introduced with the second generation of MSP430 chips,
i.e. with the MSP430x4xx family, and it has been present with all
subsequent versions, except for the MSP430x1xx.
 CPUx’s 20-bit address bus allows to reach the 1-MB address
space without paging.
 CPUx is backward compatible with the MSP430 CPU and it can
address bytes, 16-bit words, and 20-bit words.
 CPUx has fewer interrupt overhead cycles and fewer instruction
cycles in some cases than the MSP430 CPU.

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ii. MSP430X (CPUX) FAMILIES

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Figure 2.7 MSP430X (CPUX) Block Diagram (Courtesy of Texas Instruments, Inc.)
2.4 BASIC I/O DEVICES AND TECHNOLOGIES
 Input/output (I/O) devices provide the means by which a computer
system can interact with the outside world.
 An I/O device can be purely an input device (e.g., keyboard, mouse),
purely an output device (e.g., printer, display screen), or both an input
and output device (e.g., disks).
 Computers use I/O devices (also called peripheral devices) for two
major purposes—to communicate with the outside world, and to store
data.
 There is usually an I/O controller that acts as an interface between the
system and the I/O device.
 There are two main reasons for using an I/O controller.
 First, different I/O devices exhibit different characteristics and, if these
devices were connected directly, the processor would have to understand and
respond appropriately to each I/O device.
 The second reason for using an I/O controller is that the amount of electrical
power used to send signals on the system bus is very low. This means that the 29
cable connecting the I/O device has to be very short (a few centimeters at
most).
2.4 BASIC I/O DEVICES AND TECHNOLOGIES
 I/O controllers typically contain driver hardware to send
current over long cables that connect the I/O devices.
 I/O controllers typically have three types of internal registers
—a data register, a command register, and a status register.
 let us consider printing a character on the printer. Before the
processor sends a character to be printed, it has to first check
the status register of the associated I/O controller to see
whether the printer is online/offline, busy or idle, out of
paper, and so on.
 In the status register, three bits can be used to provide this
information.

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2.4 BASIC I/O DEVICES AND TECHNOLOGIES
 For example, bit 4 can be used to indicate whether the printer
is online (1) or offline (0), bit 7 can be used for busy (1) or
not busy (0) status indication, and bit 5 can be used for out of
paper (1) or not (0).
 The following summarizes the sequence of actions involved
in sending a character to the printer:
 Wait for the controller to finish the last command;
 Place a character to be printed in the data register;
 Set the command register to initiate the transfer.
 The processor accesses the internal registers of an I/O
controller through what are known as I/O ports.

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2.4 BASIC I/O DEVICES AND TECHNOLOGIES
 An I/O port is simply the address of a register associated with
an I/O controller.
 There are two ways of mapping I/O ports. Some processors
such as the million instructions per second (MIPS) map I/O
ports to memory addresses. This is called memory-mapped
I/O.
 Other processors like the Pentium have an I/O address space
that is separate from the memory address space. This
technique is called isolated I/O.
 In these systems, to access the I/O address space, special I/O
instructions are needed. Pentium provides two instructions—
in and out—to access I/O ports. The instruction can be used
to read from an I/O port and the out for writing to an I/O
port. 32
2.5 INTERRUPTS AND MEMORIES
 The topic of interrupts and resets involve both hardware and
software subjects, but it is also closely related to how a CPU
operates.
 For this reason it becomes important to provide an
introductory discussion on the subject at this point
 The CPU in a microcontroller or microprocessor is a
sequential machine.
 The control unit sequentially fetches, decodes, and executes
instructions from the program memory according to the
stored program.
 This implies that a single CPU can only be executing one
instruction at any given time.

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2.5 INTERRUPTS AND MEMORIES
 When it comes to a CPU servicing its peripherals, the
program execution needs to be taken to the specific set of
instructions that perform the task associated to servicing each
device.
 When a CPU services a device, one of two different
approaches can be followed: service by polling or service by
interrupts. Let’s look at each approach with some detail.
 In service by polling, the CPU continuously interrogates or
polls the status of the device to determine if service is
needed.
 When the service conditions are identified, the device is
served. This action can be exemplified with a hypothetical
case of real life where you will act like a polling CPU:
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2.5 INTERRUPTS AND MEMORIES
 Assume you are given the task of answering a phone to take
messages. You don’t know when calls will arrive, and you are
given a phone that has no ringer, no vibrator, or any other
means of knowing that a call has arrived. Your only choice for
not missing a single call is by periodically picking-up the phone,
placing it to your ear and asking “Hello! Anybody there?”
hoping someone will be in the other side of the line. This would
be quite an annoying job, particularly if you had other things to
do. However, if you don’t want to miss a single call you’ll have
to put everything else aside and devote yourself to continuously
perform the polling sequence: pick-up the phone, bring it to your
ear, and hope someone is on the line. Since the line must be
available for calls to enter (sorry, no call-waiting service), you
have to hang-up and repeat the sequence over and over to catch
every incoming call and taking the messages. What a waste of 35
time! Well, that is polling.
2.5 INTERRUPTS AND MEMORIES
 When a peripheral is served by interrupts, it sends a signal to
the CPU notifying of its need. This signal is called an interrupt
request or IRQ.
 We can bring this interrupting capability to our phone example
above.
 Let’s assume that in this case your phone has a ringer. While
expecting to receive incoming calls, now you can rely on the
ringer to let you know that a call has arrived. In the mean time,
while you wait for calls to arrive you are free to perform other
tasks. You could even get a nap if there were nothing else to do.
When a call arrives, the ringer sounds and you suspend
whatever task you are doing to pick-up the phone, now with the
certainty that a caller is in the other end of the line to take his
or her message. The ring sound acts like an interrupt request to
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you. A much more efficient way to take the messages.
2.5 INTERRUPTS AND MEMORIES
 Interrupts can be used to serve different tasks. The following
are just a few simple examples that illustrate the concept:
 A system that toggles an LED when a push-button is depressed.
The push-button interface can be configured to trigger an interrupt
request to the CPU when the push-button is depressed, having an
associated ISR that executes the code that turns the LED on or off.
 A message arriving at a communication port can have the port
interface configured to trigger an interrupt request to the CPU so
that the ISR executes the program that receives, stores, and/or
interprets the message.
 A voltage monitor in a battery operated system might be
interfaced to trigger an interrupt when a low-voltage condition is
detected. The ISR might be programmed to save the system state
and shut it down or to warn the user about the situation.

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2.5 INTERRUPTS AND MEMORIES
 When compared to the alternative of polling, interrupt
servicing allows a much more efficient use of the CPU.
 In addition to the CPU usage efficiency advantage, using
interrupt servicing also provides the following advantages:
 Compact and modular code: Interrupt service routines (ISR)
induce code modularity and software reusability.
 Reduced energy consumption: As ISRs lead to less CPU cycles,
this has a direct impact in the amount of energy consumed by the
application, particular when combined with low-power modes.
 Faster response time: When many events and devices need to be
served, well designed ISRs provide a quick response to the
triggering event. Well coordinated priorities among sources will
allow for a quick response with minimal processing overhead.

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2.5 INTERRUPTS AND MEMORIES
 The two types of interrupt requests are maskable and non-
maskable interrupt requests.
 A maskable interrupt request is one that can be masked by the
CPU through the global interrupt enable (GIE) flag to ignore
it.
 This is done by clearing the GIE in the processor status
register (PSW). This action makes the CPU ignore all
interrupt request from all maskable sources.
 The second type is a non-maskable interrupt (NMI) request.
 This type of request cannot be masked by the CPU and
therefore always has to be served, even if the GIE flag is clear.
 This type of request is reserved only for system critical events
whose service cannot be postponed under any circumstance.
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 One example of such an event could be a low-battery voltage
condition in a portable device.
2.5 INTERRUPTS AND MEMORIES
 Memory technologies in embedded systems provide the fundamental
functions of storing programs and data, like in any other computing
system. In embedded applications, however, the requirements of storage
have traditionally being different in the sense of size and speed.
 Embedded memory can be classified according to two main criteria:
storage permanence and write ability.
 The first criterion refers to the ability of a programmed memory to hold its
contents, while write ability, refers to how easily the memory contents can be
modified.
 Looking at all the memory technologies that have reached mainstream
(ROM, PROM, EPROM, EEPROM, FLASH, and RAM), masked, read-
only memory (ROM) earns the mark as the least writable and most
permanent of all types.
 The zeros and ones defining a ROM contents are hardcoded in the chip
through the metallization layer in their fabrication process. This
characteristic also makes the memory non-volatile.
 Recall that volatility in memory refers to the loss of contents when the 40
chip is de-energized.
2.5 INTERRUPTS AND MEMORIES
 While non-volatile memory technologies evolved, volatile
memory has also seen improvement in different aspects.
 Non-volatile technologies moved from magnetic core-based to
semiconductor-based technologies.
 Two types of volatile memory are predominant now-a-day: static
and dynamic cells.
 Because of historical reasons, volatile, read-write memory has
been called RAM.
 Two important parameters associated to RAM technologies are
their reading and writing speeds, quantified as the memory
access time.
 Static RAM(SRAM)is the fastest, but dynamic RAM (DRAM) is
preferred for large memory arrays because of its density.
 Newer technologies like Ferroelectric RAM(FRAM) are 41
beginning to show up in the market.
2.5 INTERRUPTS AND MEMORIES
 Flash is a type of EEPROM differentiated by its own name
because it may be written and read in blocks.
 Other EEPROM’s need to be completely erased byte by byte, or
by very small blocks in some cases, making the process slow
 When flash memory operates in read mode, it works like any
ROM.
 Flash memory offers fast read access times, as fast as dynamic
RAM, although not as fast as static RAM.
 The other modes of operation are erase and program. In the first
case, the cells are taken to an “erased state”, which may be a
logic 0 or logic 1, depending on the hardware configuration.
 A flash memory controller, or flash controller, manages the data
stored on flash memory and communicates with the CPU,
computer or whatever electronic device the memory is serving.
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