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Chap 7 Latches Flipflops Timers

This document summarizes a chapter on latches, flip-flops, and timers from a digital systems design course. It introduces basic latches like NOR and NAND latches. It explains the differences between latches, flip-flops, and their types like D and J-K flip-flops. It also covers applications of flip-flops like frequency division. Additionally, it discusses one-shot circuits and how the 555 timer can be used as a one-shot or astable multivibrator. The document provides objectives, circuit diagrams, and homework problems to reinforce the concepts taught in the chapter.
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0% found this document useful (0 votes)
68 views22 pages

Chap 7 Latches Flipflops Timers

This document summarizes a chapter on latches, flip-flops, and timers from a digital systems design course. It introduces basic latches like NOR and NAND latches. It explains the differences between latches, flip-flops, and their types like D and J-K flip-flops. It also covers applications of flip-flops like frequency division. Additionally, it discusses one-shot circuits and how the 555 timer can be used as a one-shot or astable multivibrator. The document provides objectives, circuit diagrams, and homework problems to reinforce the concepts taught in the chapter.
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PPTX, PDF, TXT or read online on Scribd
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TON DUC THANG UNIVERSITY

FACULTY OF ELECTRICAL & ELECTRONICS ENGINEERING

DEPARTMENT OF ELECTRONICS & TELECOMMUNICATIONS ENGINEERING

CHAPTER 7:
LATCHES, FLIP-FLOPS
AND TIMERS
DIGITAL SYSTEM DESIGN 1
402061
ACKNOWLEDGEMENT

The picture content of this slide is from


Thomas L. Floyd, [2015],Digital Fundamentals,
11e. Prentice Hall.

3/24/2016 402061 - CHAP 7: LATCHES, FLIPFLOPS, AND TIMERS 2


OUTLINE
1. Latches
2. Flip-flop and characteristics
3. Flip-flop applications
4. One-shots
5. The 555 timer

3/24/2016 402061 - CHAP 7: LATCHES, FLIPFLOPS, AND TIMERS 3


OBJECTIVES

 Use logic gates to construct basic latches


 Explain the different between an S-R latch
and a D latch
 Recognize the difference between a latch
and a flip-flop
 Explain how D and J-K flip-flops differ

3/24/2016 402061 - CHAP 7: LATCHES, FLIPFLOPS, AND TIMERS 4


OBJECTIVES

 Understand some metrics in the application of


flip-flops
 Apply flip-flops in basic applications
 Explain how retriggerable and nonretriggerable
one-shots differ
 Connect a 555 timer to operate as either an
astable multivibrator or a one-shot

3/24/2016 402061 - CHAP 7: LATCHES, FLIPFLOPS, AND TIMERS 5


LATCHES
 A latch is a temporary storage device that
has two stable states (bistable).
 It is a basic form of memory.

NOR Active-HIGH Latch NAND Active-LOW Latch

3/24/2016 402061 - CHAP 7: LATCHES, FLIPFLOPS, AND TIMERS 6


LATCHES
The active-LOW S  R latch is available as the
74LS279A IC.

74LS279A

3/24/2016 402061 - CHAP 7: LATCHES, FLIPFLOPS, AND TIMERS 7


LATCHES
A gated latch is a variation on the basic latch.

Ex: Find waveform of Q

3/24/2016 402061 - CHAP 7: LATCHES, FLIPFLOPS, AND TIMERS 8


LATCHES
D latch

Rule: Q follows D when the ENable is active


Inputs Outputs
D EN Q Q Comments
0 1 0 1 RESET
1 1 1 0 SET
X 0 Q0 Q0 No change

3/24/2016 402061 - CHAP 7: LATCHES, FLIPFLOPS, AND TIMERS 9


FLIP-FLOPS
A flip-flop is a clocked device

Dynamic
input
indicator

Positive-edge trigger Negative-edge trigger

3/24/2016 402061 - CHAP 7: LATCHES, FLIPFLOPS, AND TIMERS 10


FLIP-FLOPS
D flip-flops

Inputs Outputs Inputs Outputs


D CLK Q Q Comments D CLK Q Q Comments
1 1 0 SET 1 1 0 SET
0 0 1 RESET 0 0 1 RESET

Positive-edge triggered Negative-edge triggered

3/24/2016 402061 - CHAP 7: LATCHES, FLIPFLOPS, AND TIMERS 11


FLIP-FLOPS
J-K flip-flops

Inputs Outputs
J K CLK Q Q Comments

0 0 Q0 Q0 No change
0 1 0 1 RESET
1 0 1 0 SET
1 1 Q0 Q0 Toggle

3/24/2016 402061 - CHAP 7: LATCHES, FLIPFLOPS, AND TIMERS 12


FLIP-FLOP CHARACTERISTICS

 Propagation delay time is specified for the


rising and falling outputs.
 It is measured between the 50% level of the
clock to the 50% level of the output transition.

3/24/2016 402061 - CHAP 7: LATCHES, FLIPFLOPS, AND TIMERS 13


FLIP-FLOP CHARACTERISTICS

 Set-up time and hold time are times


required before and after the clock transition
that data must be present to be reliably
clocked into the flip-flop.

3/24/2016 402061 - CHAP 7: LATCHES, FLIPFLOPS, AND TIMERS 14


FLIP-FLOP APPLICATIONS
Frequency divider

3/24/2016 402061 - CHAP 7: LATCHES, FLIPFLOPS, AND TIMERS 15


FLIP-FLOP APPLICATIONS
Data storage Output lines

D Q0
C

D Q1
C

D Q2
C
Parallel
data input R

lines D Q3
Clock C

Clear
3/24/2016 402061 - CHAP 7: LATCHES, FLIPFLOPS, AND TIMERS 16
ONE-SHOTS
 The one-shot or monostable multivibrator is
a device with only one stable state.
 When triggered, it goes to its unstable state
for a predetermined length of time, then returns
to its stable state.

3/24/2016 402061 - CHAP 7: LATCHES, FLIPFLOPS, AND TIMERS 17


ONE-SHOTS

3/24/2016 402061 - CHAP 7: LATCHES, FLIPFLOPS, AND TIMERS 18


555 TIMER
 The 555 timer can be configured in various
ways, including as a one-shot.
 The pulse width is determined by R1C1 and is
approximately tW = 1.1R1C1.

The trigger is a
negative-going
pulse.

3/24/2016 402061 - CHAP 7: LATCHES, FLIPFLOPS, AND TIMERS 19


555 TIMER
 The 555 can be configured as a basic astable
multivibrator
1.44
 The output frequency is given by: f 
 R1  2 R2  C1

The frequency and duty


cycle are set by these
components.

3/24/2016 402061 - CHAP 7: LATCHES, FLIPFLOPS, AND TIMERS 20


SUMMARY
In this chapter, we have learned:
 basic latches
 the difference between a latch and a flip-flop
 different types of flipflop: D and J-K flip-flops
 metrics in the application of flip-flops
 one-shot and timer

3/24/2016 402061 - CHAP 7: LATCHES, FLIPFLOPS, AND TIMERS 21


HW #7
DIGITAL FUNDAMENTALS 11th edition (borrow
from the library)
 Prob: pg 439 – 445 every even problem
 Prepare chap 9: Counters

3/24/2016 402061 - CHAP 7: LATCHES, FLIPFLOPS, AND TIMERS 22

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