PD Assignment
PD Assignment
ASSIGNMENT, AND
SCHEDULI NG
Presenter Name
G.Pradeep - AP23122140001
Ch.sivani - AP23122140002
P.v.n. Sai Ganesh - AP23122140003
G. Surya Teja - AP23122140004
D.Ramya - AP23122140005
B.Raja Babu - AP23122140006
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CONTENTS
Allocation, assignment, and scheduling
Allocation types
Scheduling types
ALLOCATION, ASSIGNMENT, AND SCHEDULIN
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Targets Hardware
• FPGA - Field Programmable Gate Arrays
• ASIC - Application-Specific Integrated Circuit
Allocation
Assignment
Scheduling
HLS Overview
Allocation
• Allocation is the process of binding a data path or control path to
operations or components.
• The components can be, for example, microprocessors, micro-
controllers, DSP, ASIC, FPGA, memories, buses or point-to-point
links.
• It is divided into two types
• Data path allocation
• Control path allocation
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Data Path Allocation
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Control Path Allocation
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Assignment
• After allocation the partitioning of system functionality to selected components
can be done.
• The partitioning defines the assignment of tasks to particular components.
• If there is number of tasks assigned to the same component, which does not
support parallel execution,
• the execution order need to be decided — task scheduling.
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Scheduling
• Scheduling is the task of determining the instants at which the
execution of operations in the Data Flow Graph will start.
• ASAP Scheduling
• ALAP Scheduling
• List Scheduling
• Priority List Scheduling
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As Soon As Possible Scheduling
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As Soon As Possible Scheduling
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As Late As Possible Scheduling
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ASAP vs ALAP
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List Scheduling
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List Scheduling
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Priority List Scheduling
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Conclusion
Allocation, assignment, and scheduling are crucial stages in VLSI
design, determining the distribution of functional units, associating
hardware resources with logical entities, and optimizing timing for
improved performance. These processes bridge the gap between abstract
descriptions and physical implementation, influencing power
consumption and area utilization. Success in VLSI design relies on
effective decision-making in allocation and assignment, coupled with
optimized scheduling, to create efficient integrated circuits.
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HARDWARE ACCELERATION
THANK YOU
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