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Microprocessor Unit 4

Here are the answers: 1) At 4MHz clock frequency, each clock cycle is 0.25μs. MOV B,A takes 4 T-states. So time taken = 4 * 0.25μs = 1μs 2) STAX B takes 7 T-states. At 4MHz clock, time taken = 7 * 0.25μs = 1.75μs 3) At 6MHz crystal frequency, clock frequency is 6/2 = 3MHz. Each clock cycle is 0.33μs. MVI M,25h takes 10 T-states. Time taken = 10 * 0.33μs = 3.3μs

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100% found this document useful (1 vote)
148 views

Microprocessor Unit 4

Here are the answers: 1) At 4MHz clock frequency, each clock cycle is 0.25μs. MOV B,A takes 4 T-states. So time taken = 4 * 0.25μs = 1μs 2) STAX B takes 7 T-states. At 4MHz clock, time taken = 7 * 0.25μs = 1.75μs 3) At 6MHz crystal frequency, clock frequency is 6/2 = 3MHz. Each clock cycle is 0.33μs. MVI M,25h takes 10 T-states. Time taken = 10 * 0.33μs = 3.3μs

Uploaded by

Vekariya Karan
Copyright
© © All Rights Reserved
Available Formats
Download as PPTX, PDF, TXT or read online on Scribd
You are on page 1/ 55

Microprocessor Technologies

(102045610)

MODULE 4
PROGRAMMING TECHNIQUES
Module 4
• Stack & Subroutines
• Developing Counters and Time Delay Routines
• Code Conversion
• BCD Arithmetic and 16-Bit Data operations

2
Stack
• Stack is a group of memory location in the R/W memory that is used for
temporary storage of binary information during execution of a program.
• The starting memory location of the stack can be defined in program and space is
reserved usually at the high end of memory map.
E.g.: LXI SP,FFF8; loads 16-bit memory address in stack pointer

3
Stack
Instruction necessary for stack are as follows:

LXI SP, 2095 Load the stack pointer register with a 16-bit
address.
PUSH B/D/H It copies contents of register pair on the stack
PUSH PSW Operand PSW represents Program status word
meaning. i.e. content of accumulator and flags.

POP B/D/H It copies content of top two memory locations of


the stack in to specified register pair
POP PSW It copies content of top two memory locations of
the stack in to accumulator and flags respectively.

4
Subroutine
• A subroutine is a group of instruction that performs a subtask of repeated occurrence.
• A subroutine can be used repeatedly in different locations of the program.

5
Subroutine
Advantage of using Subroutine
• Rather than repeat the same instructions several times, they can be grouped into a subroutine that is
called from the different locations.
Where to write Subroutine?
• In Assembly language, a subroutine can exist anywhere in the code.
• However, it is customary to place subroutines separately from the main program.

6
Subroutine
•The 8085 has two instructions for dealing with subroutines.
• The CALL instruction is used to redirect program execution to the subroutine.
• The RET instruction is used to return.

7
Subroutine
Things to be considered in Subroutine

• Number of PUSH and POP instruction used in the subroutine must be same, otherwise,
RET instruction will pick wrong value of the return address from the stack and program
will fail.

8
9
Counters and Time Delays
Counters and Time Delays are important techniques.
Applications of Counters and Time Delays
They are commonly used in
1. Traffic Signal
2. Digital Clocks
3. Process Control
4. Serial data transfer

10
Counters and Time Delays
• A counter is designed simply by loading appropriate number into one of the registers and using INR or DCR
instructions.

• Loop is established to update the count.

• Each count is checked to determine whether it has reached final number ;if not, the loop is repeated.

11
Counters
• How to create counters?

Initialize 1. MVI C,05

Display 2. LOOP: MOV A,C

3. OUT 01
Update
4. DCR C
Is this
NO 5. JNZ LOOP
Final
Count
6. HLT
YES
End

12
Counters
Label Opcod Operand Comment T-states
e
MVI C,05h ; Load Counter 7

LOOP: DCR C ; Decrement Counter 4


JNZ LOOP ; Jump back to Decr. C 10/7

MVI C, 05h JNZ LOOP (false)

Machine Cycle: F + R = 2 Machine Cycle: F+R =2


T-States: 4T + 3T =7T
T-States: 4T + 3T = 7T
DCR C
JNZ LOOP (true)
Machine Cycle: F =
Machine Cycle: F + R + R =3
1
T-States: 4T + 3T + 3T=10T
T-States: =
4T 13 13
Counters and Time Delays
• Instruction MVI C, 05h requires 7 T-States to execute.
• Assuming, 8085 Microprocessor with 2MHz clock frequency.
• How much time it will take to execute above instruction?

Clock frequency of the system (f)= 2 MHz


Clock period (T) = 1/f = ½ * 10-6 = 0.5 μs
Time to execute MVI = 7 T-states * 0.5 μs
= 3.5 μs
How much time it will take to execute above instruction with 1 MHz clock frequency?

14
Counters and Time Delays
Label Opcode Operand Comment T-states
MVI C,05h ; Load Counter 7
LOOP: DCR C ; Decrement Counter 4
JNZ LOOP ; Jump back to Decr. C 10/7
• Now to calculate time delay in loop, we must account for the T-states required for each instruction, and for
the number of times instructions are executed in the loop.
• The for the next two instructions:

DCR: 4 T-States
JNZ : + 10 T-States
14 T-States
• Here, the loop is repeated for 5 times.

15
Counters and Time Delays
How to calculate time delay for given loop?

• Time delay in loop TL with 2MHz clock frequency is calculated as:

TL= T * Loop T-states * N10 -----------------(1)

TL : Time Delay in Loop

T : Clock Period

N10 : Equivalent decimal number of hexadecimal count


loaded in the delay register
Substituting value in equation (1)

TL= (0.5 * 10-6 * 14 * 5)

= 35 μs

16
Counters and Time Delays
• If we want to calculate delay more accurately, we need to accurately calculate execution of JNZ
instruction
i.e

If JNZ = true, then T-States = 10

Else if JNZ =false, then T-States = 7

17
Counters and Time Delays
• Now, according to our program:

1. MVI C,05
2. LOOP: DCR C
Here, the last cycle will be
3. JNZ LOOP executed in 7 T-States;
4. HLT when JNZ = false

Therefore, there is difference of (10T – 7T) 3T-states:

18
Counters and Time Delays
Therefore, there is difference of (10T – 7T) 3T-states:
• Delay generated by last clock cycle:

= 3T * Clock Period
= 3T * (1/2 * 10-6 )
= 1.5 μs
• Now, the accurate loop delay is:

TLA=TL - Delay generated by last clock cycle

= 35 μs - 1.5 μs
= 33.5 μs
TL= (0.5 * 10-6 * 14 * 5)= 35 μs

19 19
Counters and Time Delays
Now, to calculate total time delay
Total Delay = Time taken to execute instruction outside loop
+
Time taken to execute loop instructions

TD = TO + TLA

= (7 * 0.5 μs) + 33.5 μs


= 3.5 μs + 33.5 μs
= 37 μs

20
Counters and Time Delays
Calculate time delay and accurate time delay for given loop with
Counter value =255 (FF h) and
Clock frequency =2MHz

TL= T * Loop T-states * N10 -----------------(1)

= 0.5 *10-6* 14* 255


= 1785 μs = 1.8 ms

TLA= Time to execute loop instructions

= TL – (3T states*clock period)

= 1785 – ( 3 * ½ * 10-6)
= 1785 – 1.5=1783.5 μs

21
Exercise
1. How much time the 8085 microprocessor will take to execute the MOV B, A instruction, if the crystal
frequency is 4MHz?
ANS : 4T
2. How much time will be required to execute the STAX B instruction if the clock frequency is 4 MHz?
ANS : 7T
3. How much time will be required to execute the MVI M,25h instruction if the clock frequency is 6
MHz? 10T

crystal freq. = 6MHz then clock freq. = 3MHz


clock frequency = crystal / 2

22 22
Time Delay using a Register Pair
• Time delay can be considerably increased by setting a loop and using a register pair with a 16-bit
number (FFFF h).
• A 16-bit is decremented by using DCX instruction.

Problem with DCX instruction


• DCX instruction doesn’t set Zero flag.
• Without test flag, Jump instruction can’t check desired conditions.
• Additional technique must be used to set Zero flag.

23 23
Time Delay using a Register Pair
• The loop is repeated for 2384 h times.

• Converting (2384)16 (_____)10

2384 h = (2 * 163 )+ (3* 162) + (8 * 161) + (4 * 160)


= 8192 + 768 + 128 + 4
= 9092
• Clock frequency of the system (f)= 2 MHz
• Clock period (T) = 1/f = ½ * 10-6 = 0.5 μs

25 25
Time Delay using a Register Pair
Now, to find delay in the loop

TL= T * Loop T-sates * N10

= 0.5 *10-6* 24 * 9092

= 109104 μs
= 109 ms (without adjusting last cycle)

26 26
Time Delay using a LOOP within a LOOP
38 h

FF h

27 27
Time Delay using a LOOP within a LOOP
• Calculating delay of inner LOOP1: TL1

LOOP
1 Decrement Register
C Label Opcode Operand T-states
LOOP DCR C 4T
1: JNZ LOOP1 10/7 T
No Is
Register
C = 0?
TL= T * Loop T-states * N10
= 0.5 *10-6* 14* 255
Ye
= 1785 μs = 1.8 ms
s TL1= TL – (3T states* clock period)
= 1785 – ( 3 * ½ * 10-6)
= 1785-1.5=1783.5 μs

Delay of Loop1 TL1= 1783.5 μs


28 28
Time Delay using a LOOP within a LOOP
• Now, Calculating delay of outer LOOP2: TL2
MVI C, Label Opcode Operand T-states
FF
MVI B,38h 7T
LOOP2 MVI C,FFh 7T
:
TL1 Delay Delay of Loop1 TL1= 1783.5 μs
in LOOP1 DCR B 4T
JNZ LOOP2 10/7 T

DCR Counter B : (38)16 = (56)10


B Loop2 is executed for 56 times
T-States = 7 + 4 + 10 = 21 T-States
TL2 = 56 (TL1 + 21 T-States * 0.5)
JNZ
LOOP2 = 56( 1783.5 μs + 10.5)
= 100464 μs
TL2 = 100.46 ms
29 29
Disadvantage of using software delay
• Accuracy of time delay depends on the accuracy of system clock.
• Microprocessor is occupied simply in a waiting loop; otherwise, it could be employed to
perform other functions.
• The task of calculating accurate time delays is tedious.
• In real time applications timers are commonly used.
• Intel 8254 is a programmable timer chip, that can be interfaced with microprocessor to provide
timing accuracy.
• The disadvantage of using hardware chip include the additional expense and the need for extra
chip in the system.

30 30
Counter design with time delay
Initialize
Counter
Displa
y Load Delay
Register
Time
Delay Decrement
Delay
Update Count Register

No

Is Delay
No Register =
Is Count
0?
Complete?

Ye
Ye s
s
31 31
Hexadecimal counter program
Write a program to count continuously in hexadecimal from FFh to 00h with 0.5 μs clock period. Use
register C to set up 1ms delay between each count and display the number at one of the output port.
Given:
Counter= FF h
Clock Period T=0.5 μs
Total Delay = 1ms
Output:
To find value of delay counter

32 32
Hexadecimal counter program
Program

1. MVI B,FF

2. LOOP:MOV A,B

3. OUT 01

4. MVI C, COUNT; need to calculate delay count

5. DELAY: DCR C

6. JNZ DELAY

7. DCR B

8. JNZ LOOP 33
Hexadecimal counter program
Delay Calculations
Instruction T-States
DCR C 4
1. MVI B,FF;
JNZ DELAY 10
Total 14 T
2. LOOP:MOV A,B

3. OUT 01
Calculate Delay for Internal Loop
4. MVI C, COUNT TI = T-States * Clock Period * COUNT
5. DELAY: DCR C = 14 * 0.5 * 10-6 * COUNT

6. JNZ DELAY TI = (7.0 * 10-6 )* COUNT

7. DCR B

8. JNZ LOOP 34
Hexadecimal counter program
Instruction T-States
MOV A,B 4
OUT 01H 10
MVI C, COUNT 7
DCR B 4
JNZ LOOP 10
TOTAL 35 T

≅ (140)10 = (8C)16

35 35
0-9 up/down counter program
Write an 8085 assembly language program to generate a decimal counter (which counts 0 to 9 continuously)
with a one second delay in between. The counter should reset itself to zero and repeat continuously. Assume a
Clock frequency of 1MHz.

36
0-9 up counter program
Program
Instruction T-States
1. START: MVI B,00H DCX 6
2. DISPLAY: OUT 01 MOV A,L 4
3. LXI H, COUNT ORA H 4
4. LOOP: DCX H JNZ 10
TOTAL 24 T
5. MOV A,L

6. ORA H

7. JNZ LOOP

8. INR B

9. MOV A,B

10. CPI 0A

11. JNZ DISPLAY

12. JZ START
37 37
0-9 up counter program

38
Exercise
Calculate delay in following loop, assuming clock period = 0.33μs

Label Instruction T-states


LXI B, 12FF H 10
DELAY: DCX B 6
XTHL 16
XTHL 16
NOP 4
NOP 4
MOV A,C 4
ORA B 4
JNZ DELAY 10/7

Ans=102ms
TL= T * T-states * Count

39
Exercise
Write a set of 8085 assembly language instructions to generate a 1 second delay, if the crystal frequency is 6
MHz.
Note:
Clock Frequency(Operating Frequency)=Crystal Frequency/2
Clock Period = 1/Clock Frequency

40
Square wave program
Write a program to generate a continuous square wave with the period of 500 μs with clock period of 325ns,
and use bit D0 to output square wave.

500 μs

41
Square wave program
Problem Analysis
• In this problem, the period of square wave is 500 μs; therefore, the pulse should be ON(logic 1) for 250 μs
and OFF(logic 0) for remaining 250 μs.
• Therefore, the alternate pattern of 0/1 bits can be provided by loading Accumulator with AA h (1010 1010).
• Now rotating the pattern once through each delay loop.

• Bit D0 of output port is used to provide logic 0 and 1.

• The delay of 250μs can be easily obtained with an 8-bit delay count and one register.

42
Square wave program
Program Logic 1
1. MVI D, AA (A) 1 0 1 0 1 0 1 0
2. ROTATE: MOV A,D After RLC 0 1 0 1 0 1 0 1
3. RLC ANI 01h 0 0 0 0 0 0 0 1
4. MOV D,A
After AND 0 0 0 0 0 0 0 1
5. ANI 01
Logic 0
6. OUT 01
(A) 0 1 0 1 0 1 0 1
7. MVI B, COUNT
After RLC 1 0 1 0 1 0 1 0
8. DELAY: DCR B
9. JNZ DELAY
ANI 01h 0 0 0 0 0 0 0 1

10. JMP ROTATE After AND 0 0 0 0 0 0 0 0


43
Square wave program
Delay Calculation:
• In this problem, the pulse width is relatively small (250 μs); therefore, to obtain accurate output
pulse, we should take into account for all the T-states.
• The total delay should include the delay in the loop and execution time of the instruction outside the
loop.

44
Square wave program
Delay Calculation:
• No. of instruction outside the loop is seven.

Delay outside the loop TO=46 T-states * 325 ns =14.95μs


• Delay Loop includes two instruction, with 14 T-States, except for last cycle 11 T-States

Loop Delay TL= 14 T * 325ns * (COUNT -1) + [ 11 T *325ns ]

TL = 4.5 μs (COUNT -1) + 3.575 μs


• Total delay required = 250 μs

TD = TO + TL

250 μs = 14.95μs + 4.5 μs (COUNT -1) + 3.575 μs

Count = (52)10

= (34)16
45
Exercise
Write a program to generate a square wave with the period of 400μs with clock period of 325ns.
Use bit D0 to output square wave.

ANS = (42)10

46 46
To convert a given decimal number to hexadecimal
LXI H,4300H
MOV A,M
MOV B,A
ANI 0FH
MOV C,A
MOV A,B
RRC
RRC
RRC
RRC
ANI 0FH
MOV B,A
XRA A
CMP B
JZ LAST
BACK:ADI 0AH
DCR B
JNZ BACK
LAST:ADD C
INX H
MOV M,A
HLT
47
To convert a given HEXADECIMAL TO DECIMAL.
LXI H, 4150H ; Point to data
LXI B, 0000H ; Initialize hundreds= 0, Tens=0
MOV A, M ; Get hex data to A
LOOP: SUI 64H
JC LOOP1
INR B ; hundreds= hundreds+1
JMP LOOP
LOOP1: ADI 64H ; if subtracted extra, add it clear carry flag
LOOP2: SUI 0AH
JC LOOP3
INR C ; Tens=tens+1
JMP LOOP2
LOOP3: ADI 0AH ; If subtracted extra, add it again
INX H ; A = Units
MOV M, B ; store hundreds
MOV B, A ; Combine Tens in C &
MOV A, C ; Units in A to form a
RLC ; Single 8-bit number
RLC
RLC
RLC
ADD B
INX H
MOV M, A ; Store tens & Units
HLT
Note: In this experiment the number is converted to its equivalent decimal number using the following logic. First count the number of hundreds, the number of tens & units present
in that hex number. Then add up to get the equivalent decimal number.
Converting A9 we get:
A9 /64=45 Hundreds = 01
Since 64(100 decimal) cannot be subtracted from 45 no. of hundreds = 01. Now count tens
45/0A=3B Tens = 01
Now from 09, 0A cannot be subtracted. Hence tens = 06 the decimal equivalent of A9 is
PROGRAM 1: Convert BCD TO BINARY OR BCD TO HEX.

Note: Use principal of positional weighing in given no.

For example: 60=6 x 0A+00 72=7x0A+02

=3C+00 =48

LDA D000H

MOV B,A

ANI 0FH

MOV C,A

MOV A,B

ANI F0H

RRC

RRC

RRC

RRC

MOV B,A

XRA A

MVI D,0AH

L1:ADD D

DCR B

JNZ L1

ADD C

STA D100H

HLT

49
Binary to BCD conversion or HEX to BCD CONVERSION

Note: Binary to BCD is done by dividing no. by power often.

Step-1if no. is equal to or greater than 100 ,divide the no. By 100(i.e. subtract 100 repeatedly till remainder is less than 100) the quotient gives the MSB ,DIGIT 2 of BCD no. if no.<100 follow step.2

STEP -2 IF NO. i.e. remainder of 1st division is equal to or greater than 10 divide no. by 10 repeatedly until remainder is less than 10 quotient , the digit 1, if no. is less than 10, go to step 3.

Step-3 Remainder it gives digit 3

LDA 3040H

MVI B,64H

MVI C,0AH

MVI D,00H

MVI E,00H

L1:CMP B

JC L2

SUB B

INR E

JMP L1

L2:CMP C

JC L3

SUB C

INR D

JMP L2

L3: STA 3041H

MOV A,D

STA 3042H

MOV A,E

STA 3043H

HLT

50
51
HEX or Binary to ASCII HEX Code
LXI H,0050H
LXI D,0052H
MOV A,M
MOV B,A
RRC
RRC
RRC
RRC
CALL ASCII
STAX D
INX D
MOV A,B
CALL ASCII
STAX D
HLT

ASCII: ANI 0FH


CPI 0AH
JC CODE
ADI 07H
CODE: ADI 30H
RET
52
Write 8085 Assembly language program to convert ASCII to Hexadecimal character values.

LXI H,8000H
MOV A, M
CPI 58H
JNC NUM
SUI 37H
JMP STORE
NUM:SUI 30H
STORE:INX H
MOV M, A
HLT

53
54
Add two 8 bit BCD numbers stored at consecutive memory locations.

START: MVI C, 00H


LXI H, 4500H
MOV A, M
INX H
ADD M
DAA
JNC L1
INR C
L1:INX H
MOV M, A
INX H
MOV M, C
HLT

55

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