ECE 372 - Chap14
ECE 372 - Chap14
Single-Transistors Amplifiers
Amplifier Families
RB R1 R2 RL RC R3
Small-Signal Analysis of Complete C-E
Amplifier: Small-Signal Equivalent
Input applied to Base
Output appears at Collector
Emitter is common (through
RE) to both input and output
signal - Common-Emitter
(CE) Amplifier.
Common-Emitter (CE): Terminal
Voltage Gain
Using alternate small-signal model form and
test source vb to drive the base terminal of the
transistor, neglecting ro,
v o oib RL
v b ib r (ib oib )RE
Solving for ib and substituting, ib [r ( o 1)RE ]
v R
o
Avt o L
v / g ( 1)R
b o m o E
For 1and gmr
o o
CE g m RL
Avt
1 g R
m E
Common-Emitter (CE): Input Resistance
and Signal Source Voltage Gain
( o 1)RE is the impedance in
the emitter side of the transistor
reflected to the base side.
vb RB || Rib
ib RI RB || Rib
Combining equations, the overall
vb voltage gain can be written as :
Rib r ( o 1) RE
ib vb
ACE
A
CE
r (1 g m RE )
v vt
ib
assuming o 1 and o g m r g m RL RB || Rib
ACE
v
1 g R R
m E I RB || Rib
C-E Amplifier Voltage Gain Example
with RE = 0
• Problem: Calculate voltage gain
• Given data: bF = 100, VA = 75 V, Q-point is (1.45 mA, 3.41 V),
R1 = 10 kW, R2 = 30 kW, R3 = 100 kW, RC = 4.3 kW, RI = 1kW.
• Assumptions: Transistor is in active region, bO = bF. Signals are low
enough to be considered small signals.
• Analysis: gm 40IC 40(1.45mA) 58.0 mS RB R1 R2 7.5k
V A VCE 75V 3.14V
RL ro RC R3 3.83 k ro 54.1 k
IC 1.45mA
V 100(0.025V ) RB r
r o T 1.72 k Av gm R 130 or 42.3 dB
IC 1.45mA
L
RI RB r
R (RB r )
vi (0.005V ) I
8.57 mV
RB r
Small-Signal Model Simplification
• For max gain RI RB r and RE 0,
• For maximum gain we set R3 >> RC and load resistor RC << ro. If we assume IC
RC = VCC with 0 < < 1
I R
Av Avt gm RC C C 40VCC
VT
Typically, = 1/3, since common design allocates one-third power supply across
RC. To further account for other approximations leading to this result, we use:
Av 10VCC
• Also, if the load resistor approaches ro (RC and R3 infinite), voltage gain is
limited by amplificationfactor, mf of BJT itself. g m R R
• For large RE, voltage gain can be aproximated as: Avt
CE L L
1 g m R R
E E
C-E Amplifier Output Resistance
• Output resistance is the total equivalent resistance
looking into the output of the amplifier at coupling
capacitor C3. Input source is set to 0 and a test
source vx is applied at output.
vx vr ve (ix i)ro ve
0
ve ix [(R r )|| R ]
th E
R
i ix E (current division)
R r R
th E
vx R
R = r 1 0 E (R r )|| R
ic i 0 R r R th E
x th E
R
r 1
0 E r [1 g (R ||r )]
0 R r R 0 m E
th E
R r r (R >> r )
ic f 00 E
Sample Analysis of C-E Amplifier
Analysis: To find the Q-point, dc
equivalent circuit is constructed.
105 IB VBE (F 1)IB (1.6104 ) 5
IB 3.71 A
IC 65IB 241 A
Sample Analysis of C-E Amplifier
(cont.)
Next we construct the ac
equivalent and simplify it.
Rin RB r 6.23 k
gm 40IC 9.64103 S
oVT
r 6.64 k Rout RC ro 9.57 k
IC
vo Rin
VA VCE Av gm (Rout R )
84.0
ro 223 k vi
3
RI R
IC in
Small-Signal Analysis of Complete C-S
Amplifier: ac Equivalent
• ac equivalent circuit is
constructed by assuming that all
capacitances have zero
impedance at signal frequency
and dc voltage sources represent
ac grounds.
• Assume that Q-point is already
known.
RG R1 R2
Small-Signal Analysis of Complete C-S
Amplifier: Small-Signal Equivalent
Terminal voltage gain between
gate and drain is:
v v
Avt vd v o gm RL
g gs
C-S Amplifier Voltage Gain: Example
• Problem: Calculate voltage gain
• Given data: Kn = 0.5 mA/V2, VTN = 1V, l= 0.0133 V-1, Q-point is
(1.45 mA, 3.86 V), R1 = 430 kW, R2 = 560 kW, R3 = 100 kW, RD = 4.3
kW, RI = 1 kW.
• Assumptions: Transistor is in active region. Signals are low enough to
be considered small signals.
• Analysis: gm 2K n I DS (1 VDS ) 1.23mS R R R 243kΩ
G 1 2
1
V
ro DS 54.5kΩ RL ro RD R3 3.83kΩ
I
D
R 2I
Av gm R G 4.69 13.4dB
v 0.2V V 0.2
D 0.48V
L R R i GS TN Kn
I G
Small-Signal Model Simplification
• If we assume RI << RG
Av Avt gm RL gm ro RD R3
This implies that total signal voltage at input
appears across gate-source terminals.
• Generally R3 >> RD and load resistor << ro. Hence, total load resistance on
drain is RD. For this case, common design allocates half the power supply for
voltage drop across RD and (VGS - VTN ) = 1V
I D RD
Av gm RD VDD
VGS VTN
2
• Also, if load resistor approaches ro, (RD and R3 infinite), voltage gain is limited
by amplification factor, mf of the MOSFET itself.
C-S Amplifier Input Resistance
vx ix RG
Rin RG
C-S Amplifier Output Resistance
Sample Analysis of C-S Amplifier
Analysis: dc equivalent circuit is
constructed and analyzed
Since IG 0,
V
I1 DS 6
510
K
• Problem: Find voltage gain, input ID n (0.4VDS VTN )2
and output resistances.
2
VDS 5 V
• Given data: Kn = 500 mA/V2, VTN =
1V, l = 0.0167 V-1 VGS 2 V ID 250 A
Sample Analysis of C-S Amplifier
(cont.)
Next we construct the ac
equivalent and simplify it.
Inverting Amplifiers: Summary
• C-E and C-S amplifiers have similar voltage gains.
• C-S amplifier provides extremely high input resistance but that of C-E is also
substantial due to the mf RE term.
• Output resistance of the C-E amplifier is higher than that of the C-S amplifier
as mf is typically much larger for the BJT than for the FET.
• Input signal range of the C-S amplifier is higher than that of C-E amplifier.
• Current gains of both are identical to those of individual transistors.
• Following transformation is used to simplify circuit analysis by absorbing RE
(or RS ) into the transistor (For FET, current gain and input resistance are
infinite). gm r ' r (1 gm RE ) ro' ro(1 gm RE )
gm '
1 g m RE
o' gm 'r '
o
f ' gm 'ro' f
Follower Circuits: Common-Collector
and Common-Drain Amplifiers
1 g R
m L
v ( 1)R
Avt o o L
Output voltage follows input voltage,
v r ( 1)R
hence theses circuits are called
b o L
g R followers. BJT gain is closer to unity
Avt
CC m L
Assuming o 1 than FET. Mostly, 0.75 A 1
1 g R vt
m L ro can be neglected as gain<< mf
Follower Circuits: Input Signal Range
For small-signal operation, magnitude of vbe developed across rp in small-
signal model must be less than 5 mV.
vb RL
vbe ir vb 0.0051 g m RL 0.005(1 gm RL )V
RL
1 g m RL o
r
Followers can be used with relatively large input signals without violating
small-signal limits.
In case of FET, magnitude of vgs must be less than 0.2(VGS - VTN).
vg
v gs 0.2(VGS VTN ) v g 0.2(VGS VTN )(1 gm RL )
1 g m RL
Follower Circuits: Input Resistance and
Overall Voltage Gain
Input resistance looking into the base Overall voltage gain is
terminal is given by
vo v
v
v
A CC
v
o b A CC b
vt
v vi v
v
b i
v
i
R
CC
iB
b r (o 1)RL
i
b RB RCC
iB
AvCC A CC
vt
R RB R CC
For C-S Amplifier, r iB
I
RG
AvCD A CD
vt
I
R R
G
Follower Circuits: Voltage Gain
Calculations (Example)
• Problem: Find overall voltage gain.
• Given data: Q-point values and values for RI, R1, R2, R4, R7 ,for both
BJT and FET.
• Assumptions: Small-signal operating conditions. VT = 25 mV
• Analysis: For C-C Amplifier,
RB R1 R2 104k
RL R4 R7 11.5k
RiB r (1 gm RL )10.2k[19.8mS(11.5k)]1.16M
CC
CC
R
g R B RiB
Avt m L 9.80mS(11.5k) 0.991
CC CC CC
Av Avt
0.956
1 g R 1 + 9.80mS(11.5k) R R RCC
m L
I B iB
Follower Circuits: Voltage Gain
Calculations (Example cont.)
• Analysis: For C-D Amplifier,
RG R1 R2 892k
RL R6 R3 10.7k
g R (0.491mS)(10.7k)
A 0.840
CD m L
vt
1 g m RL 1(0.491mS)(10.7k)
RG
Avt A 0.838
CD CD
vt
R R
I
G
Follower Circuits: Output Resistance
Current is injected
into emitter of BJT.
i R i
ve o th
g m o 1
Follower Circuits: Current Gain
• Terminal current gain is the ratio of the current delivered to the load
resistor to the current being supplied from the Thevenin source.
i
CC 1 1
Ait o
i
Ait
CD
Follower Circuits: Summary
• Both C-C and C-D amplifiers have voltage gains approaching unity.
• The C-D amplifier provides extremely high input resistance because of
infinite resistance looking into the gate terminal of FET as compared
to the C-C amplifier.
• Output resistance of the C-C amplifier is much lower than the C-D
amplifier due to the higher transconductance of a BJT than an FET for
a given operating current.
• Both C-C and C-D amplifiers can handle relatively large input signal
levels.
• Current gain of an FET is inherently infinite, whereas that of BJT is
limited by its finite value of bo.
Inverting Amplifiers: C-E and C-S
Amplifiers: Summary
Follower Circuits: Summary
C-B and C-G Amplifiers: Summary
Selecting Amplifier Configurations (i)
• A single-transistor amplifier with a gain of 80 dB and input
resistance of 100 kW.
– Av = 1080/20 = 10,000. For even the best BJTs, gain < mf = 40VA =
40(150) = 6000 and FET typically has much lower intrinsic gain.
Hence such large gain can’t be achieved by a single-transistor
amplifier.
For an FET, even with small gate overdrive, VDD = 100 V which
is too large.
Selecting Amplifier Configurations (ii)
• A single-transistor amplifier with a gain of 30 dB and input resistance of 5 MW
– Rin = 5 MW and Av = 1030/20 = 31.6 - large input resistance and moderate
gain. These requirements can easily be met by a common-source amplifier:
VDD 15V
Av 30
VGS VTN 0.5V
– The input resistance is set by our choice of gate bias resistors (R 1 and R2 in
Fig. 14.2), and 5 MΩ can be achieved with standard resistor values.
• A single-transistor amplifier with a gain of 0 dB, and an input resistance of 20
MW with a load resistor of 10 kW
– Zero dB corresponds to a follower. For an emitter-follower,
Rin o RL 10010k 1 M
– So the BJT will not meet the input resistance requirement. On the other
had, a source follower provides a gain of approximately one and can easily
achieve the required input resistance.
Selecting Amplifier Configurations (iii)
• A follower is needed with a gain of at least 0.98 and an input resistance of 250
kW with a load resistor of 5 kW
– Both specifications should be achievable with either an emitter follower or
a source follower:
g m RL 2I D RL
For the MOSFET : AvCD 0.98 requires g m RL 49
1 g m RL VGS VTN
which can be achieved with I D RL 12.3 V for VGS VTN 0.5 V.
IC RL
For the BJT : g m RL 49 IC RL 490.025V 1.23 V
VT
Note that o RL 1005k 500 k
• The bipolar transistor can achieve the specifications with a much lower power
supply voltage and current.
Selecting Amplifier Configurations (iv)
• A single transistor amplifier is needed with a gain of +10 and an input resistance of 2 kW
– A noninverting amplifier with a gain of 10 and and input resistance of 2 kW should be
achievable with either a common-base or common-gate amplifier. A gain of 10 is
easily achieved with either transistor based upon our rule-of-thumb design estimates:
VDD
AvCB g m RL 10VCC and AvCG g m RL
VGS VTN
1
Rin 2k is within easy reach of either device.
gm
– Remember that the signal handling capability of the CB stage will be much lower
than that of the FET.
Selecting Amplifier Configurations (v)
• An amplifier is needed with an output resistance of 25 W
– Twenty-five ohms represents a small value of output resistance, and the followers inherently
provide low output resistances. For the followers, R out = 1/gm, so we need gm = 40 mS.
– Here again we see the advantage of the BJT that has a much higher transconductance per unit
current.
1
C2
1
R
R
6 S
g
m
Coupling and Bypass Capacitor Design:
C-E Amplifier (Example)
• Problem: Choose values of coupling and bypass capacitors for a
common-emitter amplifier in Figs. 14.2, 14.23 and 14.24
• Given data: f = 1000 Hz, values of all resistors and input and output
resistances for the C-E amplifier. (R4 = R6)
• Analysis:
R R RCE 78.1 k = 2f = 2000
in B in
1
C 1.99 nF C 0.02 F
1 R R 1
I in
1
C 67.2 nF C 0.68 F
2 2
R R (1/ g m )
6 E
1
C 1.31 nF C 0.015 F
3 R R 3
7 out
Coupling and Bypass Capacitor Design:
C-S Amplifier (Example)
• Problem: Choose values of coupling and bypass capacitors for the C-S
amplifier in Figs. 14.2, 14.23 and 14.24
• Given data: f = 1000 Hz, values of all resistors and input and output
resistances for the C-S amplifier.
• Analysis:
Rin R 892 k 2f 2000
G
1
C 178 pF C 1800 pF
1 R R 1
I in
1
C 55.3 nF C 0.56 F
2 2
R R (1/ g m )
6 S
1
C 1.31 nF C 0.015 F
3 R R 3
7 out
Coupling and Bypass Capacitor Design:
C-C and C-D Amplifiers
For the C-C amplifier,
Rin RB RCC
in Rout R4 RCC
out
Coupling and Bypass Capacitor Design:
C-C and C-D Amplifiers (Example)
• Problem: Choose values of coupling and bypass capacitors.
• Given data: f = 1000 Hz, values of all resistors and input and output
resistances for both the C-C and C-D amplifiers.
• Analysis:
For the C-C amplifier: For the C-D amplifier:
R R RCC 95.5k R R R
CC 120 Rin R 892k R R RCD 1.74k
in B in out 4 out G out 4 out
1 1
C 816 pFC 8200 pF C 89 pFC 1000 pF
1 R R 1 1 R R 1
I in I in
1 1
C 795 pFC 8200 pF C 782 pFC 8200 pF
3 R R 3 3 R R 3
7 out 7 out
Lower Cutoff Frequency of an Amplifier
• We can choose capacitor values to set the lower cutoff frequency of the
amplifier at a desired value.
• The pole associated with a capacitor occurs at the frequency at which
capacitive reactance is equal to resistance at the capacitor terminals.
• In the amplifiers discussed thus far, there are several poles and a
bandwidth shrinkage occurs at low frequencies.
• A transfer function with n identical poles at wo is given by
Amid Amid o
T j T j L L
n
2 2 1
1 o 2 1
n
• Lower cutoff frequency is higher than the frequency corresponding to
the individual poles.
Dominant Pole Design
• The capacitor associated with the emitter or source part of the circuit
tends to be the largest due to low resistance presented by emitter or
source terminal of transistor and is commonly used to set fL.
1
C 1.31 nF C 0.015 F
3 R R 3
7 out
Coupling and Bypass Capacitors
Dominant Pole Design (Example)
• Problem: Choose values of coupling and bypass capacitors for the C-E and
C-S amplifiers in Figs. 14.2, 14.23 and 14.24 to set f L = 1000 Hz.
• Given data: fL = 1000 Hz, results from Slide 42
• Analysis C-S Amplifier: Use C2 to set the lower cutoff frequency. Make C1
and C3 negligible at 1000 Hz. Using the results from the previous calculation:
Rin R 892 k 2f 2000
G
1
C 178 pF C 1800 pF
1 R R 1
I in
1
C 55.3 nF C 0.056 F
2 2
R R (1/ g m )
6 S
1
C 1.31 nF C 0.015 F
3 R R 3
7 out
Follower Design Example
• Problem: Design an amplifier with given specifications.
• Given data: Av > 0.95, Rin > 20MW, Rout < 3 kW.
• Analysis: Gain is approximately unity, and high input resistance is
required. The relatively low load resistance suggests that a low output
resistance is required. Se we can choose between emitter or source-
follower configurations.
The emitter follower’s input resistance
is limited by bo RL, and the current gain
bo required to meet the input resistance
specification with given load resistance
is > 6600 (beyond the range of normal
BJTs). So let us choose a source-
follower configuration.
Follower Design Example (cont.)
Possible solutions to Kn I D 8.96 mA
I D mA
Kn mA/ V 2 V GS VTN V VSS V
3 10 0.78 9.80 + VTN
5 10 1.00 16.0 + VTN
8 10 1.27 25.3 + VTN
5 20 0.71 16.7 + VTN
Follower Design Example (cont.)
VSS 2.21V
Possible solutions to RS
5mA
VS , RS :
10V ,1.56k 15V ,2.56k 20V ,3.56k 25V ,4.56k
We assumed R S 3k, so select 20V , 3.56k 20V , 3.6k
AC-coupled Amplifiers
A 3-Stage AC-coupled Amplifier Circuit
• MOSFET M1operating in the C-S configuration provides high input resistance and
moderate voltage gain.
• BJT Q2 in a C-E configuration, the second stage, provides high gain.
• BJT Q3, an emitter-follower gives low output resistance and buffers the high gain
stage from the relatively low value of load resistance.
AC-coupled Amplifiers: Description
• Input and output of overall amplifier is ac-coupled through capacitors C1 and C6.
• Bypass capacitors C2 and C4 are used to get maximum voltage gain from the two
inverting amplifiers.
• Interstage coupling capacitors C3 and C5 transfer ac signals between amplifiers but
provide isolation at dc, and prevent Q-points of the transistors from being affected.
• In the ac equivalent circuit, bias resistors are replaced by R B2 = R1||R2 and
RB3 = R3||R4
AC-coupled Amplifiers
dc Equivalent Circuit
Transistor Parameters
M1 : Kn 10 mA/V 2 , VTN 2 V , 0.02V 1
Q2 : F 150, VA 80V , VBE 0.7V
Q3 : F 80, VA 60V , VBE 0.7V
Q - Points
M1 : 5.00 mA, 10.9 V
Q2 : 1.57 mA, 5.09 V
Q3 : 1.99 mA, 8.36 V
At dc, the capacitors isolate each stage from Small - Signal Parameters
the others. Thus, the bias point for each M1 : g m1 10.0 mS, ro1 12.2 k
Q2 : g m2 62.8 mS, r 2 2.39 k,
transistor may be found using the single ro2 54.2 k
transistor analysis methods already discussed. Q3 : g m3 79.6 mS, r 3 1.00 k,
ro3 34.4 k
AC-coupled Amplifiers
ac Equivalent Circuits
ac Equivalent
Small-signal
Equivalent
AC-coupled Amplifiers:
Input Resistance and Voltage Gain
Rin
Av Avt3 Avt2 Avt1
RI Rin
v2
Avt1 g m1 RL1 0.01S 0.478k 4.78
v1
Rin 1M
v1 vi vi 0.990vi
RI Rin 10k 1M
AC-coupled Amplifiers
Output Resistance
To find output resistance, a test To find Rth3, a test voltage is
voltage is applied at amplifier applied to the output of Q2.
output.
vx vx v vx
Rout ix ir ie x Rth3 RI 2 Rout
CE
RI 2 ro2 4.31k 54.2k 3.99k
ix 3300 Rout3 ix
AC-coupled Amplifiers
Current and Power Gain
io
The input signal current delivered to the amplifier Current Gain : Ai 4.03x106 (132 dB)
ii
from source vi is
vi
ii 9.90x107 vi vo
RI Rin Voltage Gain : Av 9.98x102 (60 dB)
vi
AC-coupled Amplifiers
Input and Output Signal Range
0.21 2V
For the first stage : v1 0.2VGS VTN vi 0.202 V
0.99
AC-coupled Amplifiers
Potential Ideas to Improve Voltage Gain
• Gain of C-S amplifier is inversely proportional to square root of drain
current, so voltage gain could be increased by reducing ID1 while
maintaining a constant voltage drop across RD1. Signal range could be
improved by increasing current in output stage and voltage drop across
RE3.
• Q1 could be replaced with a FET. This could cause gain loss in third
stage since gain of C-D amplifier is typically < that of a C-C stage.
However, this loss could be made up by improving gain of first and
second stages.