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Unit 3erts

The document introduces the Thumb instruction set, which encodes ARM instructions into a smaller 16-bit format. This improves code density for memory-constrained embedded systems like phones and PDAs by reducing code size by around 30% on average compared to the equivalent ARM code. Thumb instructions are decoded into equivalent 32-bit ARM instructions. While Thumb code uses more instructions, it reduces the overall memory footprint. The document also discusses Thumb register usage and how ARM and Thumb code is interworked through state switching during procedure calls and returns.

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Shivanth Lenkalapally
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11 views

Unit 3erts

The document introduces the Thumb instruction set, which encodes ARM instructions into a smaller 16-bit format. This improves code density for memory-constrained embedded systems like phones and PDAs by reducing code size by around 30% on average compared to the equivalent ARM code. Thumb instructions are decoded into equivalent 32-bit ARM instructions. While Thumb code uses more instructions, it reduces the overall memory footprint. The document also discusses Thumb register usage and how ARM and Thumb code is interworked through state switching during procedure calls and returns.

Uploaded by

Shivanth Lenkalapally
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PPTX, PDF, TXT or read online on Scribd
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UNIT- 3

INTRODUCTION
TO THE THUMB
INSTRUCTION SET
Introduction
This chapter introduces the Thumb instruction set.
Thumb encodes a subset of the 32-bit

ARM instructions into a 16-bit instruction set space.


Since Thumb has higher performance than ARM on a
processor with a 16-bit data bus, but lower performance
than ARM on a 32-bit data bus, use Thumb for memory-
constrained systems.
Introduction
For memory-constrained embedded systems, for
example,
Mobile phones and PDAs, code density is very
important. Cost pressures also limit memory size, width,
and speed.
On average, a Thumb implementation of the same code
takes up around 30% less memory than the equivalent
ARM implementation.
Introduction
As an example, shows the same divide code
routine implemented in ARM and Thumb assembly
code.
Thumb implementation
Each Thumb instruction is related to a 32-bit ARM
instruction. Figure shows
A simple Thumb ADD instruction being decoded into an
equivalent ARM ADD instruction.
Even though the Thumb implementation uses more
instructions, the overall memory footprint is reduced.
Code density was the main driving force for the Thumb
instruction set.
Because it was also designed as a compiler target, rather
than for hand-written assembly code,
We recommend that you write Thumb-targeted code in a
high-level language like C or C++.
THUMB INSTRUCTION DECODING
Thumb Register Usage
In Thumb state, you do not have direct access to all
registers. Only the low registers r0 to r7 are fully
accessible
The higher registers r8 to r12 are only accessible with
MOV, ADD, or CMP instructions.
CMP and all the data processing instructions that
operate on low registers update the condition flags in
the cpsr.
Thumb Register Usage
Thumb Register Usage
Thumb register usage table that there is no direct
access to the cpsr or spsr.
In other words, there are no MSR- and MRS-
equivalent Thumb instructions.
To alter the cpsr or spsr, you must switch into ARM
state to use MSR and MRS. Similarly,
there are no coprocessor instructions in Thumb state.
You need to be in ARM state to access the coprocessor
for configuring cache and memory management.
ARM-Thumb Interworking
ARM-Thumb interworking is the name given to the
method of linking ARM and Thumb
code together for both assembly and C/C++. It handles
the transition between the two states. Extra code,
called a veneer, is sometimes needed to carry out the
transition. ATPCS
defines the ARM and Thumb procedure call
standards.
To call a Thumb routine from an ARM routine, the core has
to change state. This state change is shown in the T bit of the
cpsr.
The BX and BLX branch instructions cause a switch between
ARM and Thumb state while branching to a routine. The BX
lr instruction returns from a routine, also with a state switch
if necessary.
The BLX instruction was introduced in ARMv5T. On
ARMv4T cores the linker uses a veneer to switch state on a
subroutine call. Instead of calling the routine directly, the
linker calls the veneer, which switches to Thumb state using
the BX instruction.

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