Chapter 2
Chapter 2
Chapter 2
Performance Issues
Copyright © 2019, 2016, 2013 Pearson Education, Inc. All Rights Reserved
Designing for Performance
• The cost of computer systems continues to drop dramatically, while the performance and capacity
of those systems continue to rise equally dramatically
• Today’s laptops have the computing power of an IBM mainframe from 10 or 15 years ago
• Processors are so inexpensive that we now have microprocessors we throw away
• Desktop applications that require the great power of today’s microprocessor-based systems
include:
– Image processing
– Three-dimensional rendering
– Speech recognition
– Videoconferencing
– Multimedia authoring
– Voice and video annotation of files
– Simulation modeling
• Businesses are relying on increasingly powerful servers to handle transaction and database
processing and to support massive client/server networks that have replaced the huge mainframe
computer centers of yesteryear
• Cloud service providers use massive high-performance banks of servers to satisfy high-volume,
high-transaction-rate applications for a broad spectrum of clients
Copyright © 2019, 2016, 2013 Pearson Education, Inc. All Rights Reserved
Microprocessor Speed
Techniques built into contemporary processors include:
Pipelining • Processor moves data or instructions into a conceptual pipe
with all stages of the pipe processing simultaneously
Copyright © 2019, 2016, 2013 Pearson Education, Inc. All Rights Reserved
Performance Balance
• Adjust the organization and Increase the number of
architecture to compensate bits that are retrieved at
one time by making
DRAMs “wider” rather
for the mismatch among the than “deeper” and by
using wide bus data
capabilities of the various paths
components
Reduce the frequency of
• Architectural examples memory access by
incorporating
include: increasingly complex and
efficient cache structures
between the processor
and main memory
Copyright © 2019, 2016, 2013 Pearson Education, Inc. All Rights Reserved
Figure 2.1
Copyright © 2019, 2016, 2013 Pearson Education, Inc. All Rights Reserved
Improvements in Chip Organization and
Architecture
• Increase hardware speed of processor
– Fundamentally due to shrinking logic gate size
▪ More gates, packed more tightly, increasing clock rate
▪ Propagation time for signals reduced
Copyright © 2019, 2016, 2013 Pearson Education, Inc. All Rights Reserved
Problems with Clock Speed and Logic
Density
• Power
– Power density increases with density of logic and clock speed
– Dissipating heat
• RC delay
– Speed at which electrons flow limited by resistance and capacitance of
metal wires connecting them
– Delay increases as the RC product increases
– As components on the chip decrease in size, the wire interconnects
become thinner, increasing resistance
– Also, the wires are closer together, increasing capacitance
Copyright © 2019, 2016, 2013 Pearson Education, Inc. All Rights Reserved
The use of multiple processors on
Multicore
the same chip provides the
potential to increase performance
without increasing the clock rate
Copyright © 2019, 2016, 2013 Pearson Education, Inc. All Rights Reserved
Many Integrated Core (MIC)
Graphics Processing Unit (GPU)
MIC • GP
U
• Leap in performance as well • Core designed to perform
as the challenges in parallel operations on graphics
developing software to data
exploit such a large number
of cores • Traditionally found on a plug-in
graphics card, it is used to
• The multicore and MIC encode and render 2D and 3D
strategy involves a graphics as well as process
homogeneous collection of video
general purpose processors
on a single chip • Used as vector processors for
a variety of applications that
require repetitive computations
Copyright © 2019, 2016, 2013 Pearson Education, Inc. All Rights Reserved
Amdahl’s Law
• Gene Amdahl
• Deals with the potential speedup of a program using
multiple processors compared to a single processor
• Illustrates the problems facing industry in the
development of multi-core machines
– Software must be adapted to a highly parallel execution
environment to exploit the power of parallel processing
Copyright © 2019, 2016, 2013 Pearson Education, Inc. All Rights Reserved
Figure 2.3
Copyright © 2019, 2016, 2013 Pearson Education, Inc. All Rights Reserved
Figure 2.4
Copyright © 2019, 2016, 2013 Pearson Education, Inc. All Rights Reserved
Little’s Law
• Fundamental and simple relation with broad applications
• Can be applied to almost any system that is statistically in steady
state, and in which there is no leakage
• Queuing system
– If server is idle an item is served immediately, otherwise an arriving item joins
a queue
– There can be a single queue for a single server or for multiple servers, or
multiple queues with one being for each of multiple servers
Copyright © 2019, 2016, 2013 Pearson Education, Inc. All Rights Reserved
Figure 2.5
Copyright © 2019, 2016, 2013 Pearson Education, Inc. All Rights Reserved
Table 2.1 Performance Factors and System Attributes
Ic p m k
Compiler technology X X X
Processor implementation X X
Copyright © 2019, 2016, 2013 Pearson Education, Inc. All Rights Reserved
Calculating the Mean
The three
The use of benchmarks to compare common
systems involves calculating the formulas used
mean value of a set of data points
related to execution time for calculating a
mean are:
• Arithmetic
• Geometric
• Harmonic
Copyright © 2019, 2016, 2013 Pearson Education, Inc. All Rights Reserved
Figure 2.6
Copyright © 2019, 2016, 2013 Pearson Education, Inc. All Rights Reserved
Arithmetic Mean
An Arithmetic Mean (AM) is an appropriate measure
if the sum of all the measurements is a meaningful
and interesting value
The AM used for a time-based variable, such as program execution time, has
the important property that it is directly proportional to the total time
If the total time doubles, the mean
Copyright value
© 2019, 2016,doubles
2013 Pearson Education, Inc. All Rights Reserved
Table 2.2
A Comparison of Arithmetic and Harmonic Means for Rates
Computer Computer Computer Computer Computer Computer
A time B time C time A rate B rate C rate
(secs) (secs) (secs) (MFLOPS) (MFLOPS) (MFLOPS)
Program 1
2.0 1.0 0.75 50 100 133.33
(108 FP ops)
Program 1
0.75 2.0 4.0 133.33 50 25
(108 FP ops)
Total
execution 2.75 3.0 4.75 – – –
time
Arithmetic
mean of 1.38 1.5 2.38 – – –
times
Inverse
of total
0.36 0.33 0.21 – – –
execution
time (1/sec)
Arithmetic
mean of – – – 91.67 75.00 79.17
rates
Harmonic
mean of – – – 72.72 66.67 42.11
rates
Copyright © 2019, 2016, 2013 Pearson Education, Inc. All Rights Reserved
Table 2.3
A Comparison of Arithmetic and Geometric Means for Normalized
Results
(a) Results normalized to Computer A
Copyright © 2019, 2016, 2013 Pearson Education, Inc. All Rights Reserved
Table 2.4
Another Comparison of Arithmetic and Geometric Means for
Normalized Results
(a) Results normalized to Computer A
Copyright © 2019, 2016, 2013 Pearson Education, Inc. All Rights Reserved
Benchmark Principles
• Desirable characteristics of a benchmark
program:
Copyright © 2019, 2016, 2013 Pearson Education, Inc. All Rights Reserved
System Performance Evaluation
Corporation (SPEC)
• Benchmark suite
– A collection of programs, defined in a high-level language
– Together attempt to provide a representative test of a computer in a
particular application or system programming area
– SPEC
– An industry consortium
– Defines and maintains the best known collection of benchmark suites
aimed at evaluating computer systems
– Performance measurements are widely used for comparison and
research purposes
Copyright © 2019, 2016, 2013 Pearson Education, Inc. All Rights Reserved
SPEC CPU2017
• Best known SPEC benchmark suite
• Industry standard suite for processor intensive applications
• Appropriate for measuring performance for applications that
spend most of their time doing computation rather than I/O
• Consists of 20 integer benchmarks and 23 floating-point
benchmarks written in C, C++, and Fortran
• For all of the integer benchmarks and most of the floating-
point benchmarks, there are both rate and speed benchmark
programs
• The suite contains over 11 million lines of code
Copyright © 2019, 2016, 2013 Pearson Education, Inc. All Rights Reserved
Rate Speed Language Kloc Application Area
Kloc = line count (including comments/whitespace) for source files used in a build/1000 (Table can be found on page 61 in the textbook.)
Copyright © 2019, 2016, 2013 Pearson Education, Inc. All Rights Reserved
Rate Speed Language Kloc Application Area
Kloc = line count (including comments/whitespace) for source files used in a build/1000 (Table can be found on page 61 in the textbook.)
Copyright © 2019, 2016, 2013 Pearson Education, Inc. All Rights Reserved
Base Peak
541.leela_r
892 1410 896 1420 (a) Rate Result
833 2420 770 2610 (768 copies)
548.exchange2_r
602.gcc_s
546 7.29 535 7.45 SPEC
605.mcf_s
866 5.45 700 6.75 CPU 2017
276 5.90 247 6.61 Integer
620.omnetpp_s
Benchmarks
188 7.52 179 7.91 for HP
623.xalancbmk_s
Integrity
625.x264_s
283 6.23 271 6.51 Superdome X
407 3.52 343 4.18
631.deepsjeng_s
(b) Speed
641.leela_s
469 3.63 439 3.88
Result
329 8.93 299 9.82
(384 threads)
648.exchange2_s
Copyright © 2019, 2016, 2013 Pearson Education, Inc. All Rights Reserved
Benchmark Seconds Energy (kJ) Average Power Maximum Power
(W) (W)
605.mcf_s
4721 5150 1090 1120
Table 2.7
1630 1770 1090 1090
620.omnetpp_s SPECspeed
2017_int_base
1417 1540 1090 1090
Benchmark
623.xalancbmk_s Results for
Reference
1764 1920 1090 1100
625.x264_s Machine (1
1432 1560 1090 1130 thread)
631.deepsjeng_s
Copyright © 2019, 2016, 2013 Pearson Education, Inc. All Rights Reserved
Copyright
This work is protected by United States copyright laws and is provided solely
for the use of instructions in teaching their courses and assessing student
learning. dissemination or sale of any part of this work (including on the
World Wide Web) will destroy the integrity of the work and is not permit-
ted. The work and materials from it should never be made available to
students except by instructors using the accompanying text in their
classes. All recipients of this work are expected to abide by these
restrictions and to honor the intended pedagogical purposes and the needs of
other instructors who rely on these materials.
Copyright © 2019, 2016, 2013 Pearson Education, Inc. All Rights Reserved