The VLSI design flow involves multiple steps from specification to fabrication. It begins with system specification and architectural design. Then comes functional design, register transfer level design, circuit design, and physical design involving layout. The layout is then used to create photolithographic masks for wafer fabrication. The fabricated chips are then packaged and tested. Full custom design involves designing every component from scratch for high performance but takes more time and effort.
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2-Module-1 - Implementation Strategies-26-07-2023
The VLSI design flow involves multiple steps from specification to fabrication. It begins with system specification and architectural design. Then comes functional design, register transfer level design, circuit design, and physical design involving layout. The layout is then used to create photolithographic masks for wafer fabrication. The fabricated chips are then packaged and tested. Full custom design involves designing every component from scratch for high performance but takes more time and effort.
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Module-1
VLSI DESIGN FLOW
Full custom design Semi-Custom design • Since the complexity of VLSI Circuits is in the order of millions of transistor, designing a VLSI Circuits is understandably a complex task. • In order to reduce the complexity of design process, several intermediate level of abstractions are introduced. More and more details about the new design are introduced as the design progresses from highest to lowest levels of abstraction. • Figure illustrated the design is taken from specification to fabrication step by step with help of various CAD tools • The first step of any design process is to lay down the specifications of the system. System specification is a high level representation of the system. • The factors to be considered in this process include: performance, functionality, and physical dimensions (size of the die (chip)). The fabrication technology and design techniques are also considered. • The specification of a system is a compromise between market requirements, technology and economical viability. The end results are specifications for the size, speed, power, and functionality of the VLSI system. • The basic architecture of the system is designed in this step. This includes, such decisions as RISC (Reduced Instruction Set Computer) versus CISC (Complex Instruction Set Computer), number of ALUs, Floating Point units, number and structure of pipelines, and size of caches among others. • The outcome of architectural design is a Micro- Architectural Specification (MAS). While MAS is a textual (English like) description, architects can accurately predict the performance, power and die size of the design based on such a description. • In this step, main functional units of the system are identified. This also identifies the interconnect requirements between the units. • The area, power, and other parameters of each unit are estimated. The behavioral aspects of the system are considered without implementation specific information. • For example, it may specify that a multiplication is required, but exactly in which mode such multiplication may be executed is not specified. We may use a variety of multiplication hardware depending on the speed and word size requirements. • The key idea is to specify behavior, in terms of input, output and timing of each unit, without specifying its internal structure. • The outcome of functional design is usually a timing diagram or other relationships between units. This information leads to improvement of the overall design process and reduction of the complexity of subsequent phases. • Functional or behavioral design provides quick emulation of the system and allows fast debugging of the full system. • Behavioral design is largely a manual step with little or no automation help available. • In this step the control flow, word widths, register allocation, arithmetic operations, and logic operations of the design that represent the functional design are derived and tested. • This description is called Register Transfer Level (RTL) description. RTL is expressed in a Hardware Description Language (HDL), such as VHDL or Verilog. • This description can be used in simulation and verification. This description consists of Boolean expressions and timing information. The Boolean expressions are minimized to achieve the smallest logic design which conforms to the functional design. • This logic design of the system is simulated and tested to verify its correctness. In some special cases, logic design can be automated using high level synthesis tools. These tools produce a RTL description from a behavioral description of the design. • The purpose of circuit design is to develop a circuit representation based on the logic design. • The Boolean expressions are converted into a circuit representation by taking into consideration the speed and power requirements of the original design. • Circuit Simulation is used to verify the correctness and timing of each component. The circuit design is usually expressed in a detailed circuit diagram. This diagram shows the circuit elements (cells, macros, gates, transistors) and interconnection between these elements. This representation is also called a netlist. • Tools used to manually enter such description are called schematic capture tools. In many cases, a netlist can be created automatically from logic (RTL) description by using logic synthesis tools. • In this step the circuit representation (or netlist) is converted into a geometric representation. • As stated earlier, this geometric representation of a circuit is called a layout. Layout is created by converting each logic component (cells, macros, gates, transistors) into a geometric representation (specific shapes in multiple layers), which perform the intended logic function of the corresponding component. • Connections between different components are also expressed as geometric patterns typically lines in multiple layers. • The exact details of the layout also depend on design rules, which are guidelines based on the limitations of the fabrication process and the electrical properties of the fabrication materials. • Physical design is a very complex process and therefore it is usually broken down into various sub-steps. • Various verification and validation checks are performed on the layout during physical design. In many cases, physical design can be completely or partially automated and layout can be generated directly from netlist by Layout Synthesis tools. • Most of the layout of a high performance design (such as a microprocessor) may be done using manual design, while many low to medium performance design or designs which need faster time-to-market may be done automatically. • Layout synthesis tools, while fast, do have an area and performance penalty, which limit their use to some designs. • Manual layout, while slow and manually intensive, does have better area and performance as compared to synthesized layout. • After layout and verification, the design is ready for fabrication. Since layout data is typically sent to fabrication on a tape, the event of release of data is called Tape Out. • Layout data is converted (or fractured) into photo-lithographic masks, one for each layer. • Masks identify spaces on the wafer, where certain materials need to be deposited, diffused or even removed. Silicon crystals are grown and sliced to produce wafers. • Extremely small dimensions of VLSI devices require that the wafers be polished to near perfection. The fabrication process consists of several steps involving deposition, and diffusion of various materials on the wafer. • During each step one mask is used. Several dozen masks may be used to complete the fabrication process. • Finally, the wafer is fabricated and diced into individual chips in a fabrication facility. • Each chip is then packaged and tested to ensure that it meets all the design specifications and that it functions properly. • Chips used in Printed Circuit Boards (PCBs) are packaged in Dual In-line Package (DIP), Pin Grid Array (PGA), Ball Grid Array (BGA), and Quad Flat Package (QFP). • Chips used in Multi-Chip Modules (MCM) are not packaged, since MCMs use bare or naked chips. Full custom design • This style involves the design of every component from scratch. • High Performance and speed. • Time to market is very high.
• This method is followed if there are no libraries available.