Memory-Management

1
 Storage Structure
• The CPU can load instructions only from
memory, so any programs to run must be
stored there.
• General-purpose computers run most of their
programs from rewritable memory, called
main memory (also called random-access
memory, or RAM). Main memory commonly is
implemented in a semiconductor technology
called dynamic random-access memory
(DRAM).
• Computers use other forms of memory as well
2
• All forms of memory provide an array of
bytes. Each byte has its own address.
• Interaction is achieved through a sequence
of load or store instructions to specific
memory addresses.
• The load instruction moves a byte or word
from main memory to an internal register
within the CPU, whereas the store
instruction moves the content of a register
to main memory.
• Aside from explicit loads and stores, the
CPU automatically loads instructions from
main memory for execution. 3
• Ideally, we want the programs and data
to reside in main memory permanently.
• This arrangement usually is not
possible for the following two reasons:
• 1. Main memory is usually too small to
store all needed programs and data
permanently.
• 2. Main memory is a volatile storage
device that loses its contents when
power is turned off or otherwise lost.

4
• Thus, most computer systems provide
secondary storage as an extension of main
memory.
• The main requirement for secondary storage is
that it be able to hold large quantities of data
permanently.
• The most common secondary-storage device is
a magnetic disk, which provides storage for
both programs and data.
• Most programs (system and application) are
stored on a disk until they are loaded into
memory.
• Many programs then use the disk as both the
source and the destination of their processing.5
• The wide variety of storage systems can be
organized in a hierarchy according to speed
and cost.
• The higher levels are expensive, but they are
fast. As we move down the hierarchy, the
cost per bit generally decreases, whereas the
access time generally increases.
• Each storage system provides the basic
functions of storing a datum and holding that
datum until it is retrieved at a later time.
• The main differences among the various
storage systems lie in speed, cost, size, and
volatility.
6
7
• In addition to differing in speed and
cost, the various storage systems are
either volatile or nonvolatile.
• volatile storage loses its contents when
the power to the device is removed. In
the absence of expensive battery and
generator backup systems, data must
be written to nonvolatile storage for
safekeeping.
• Solid-state disks have several variants
but in general are faster than magnetic
disks and are nonvolatile
8
• One type of solid-state disk stores data in a
Large DRAM array during normal operation
but also contains a hidden magnetic hard disk
and a battery for backup power.
• If external power is interrupted, this solid-state
disk’s controller copies the data from RAM to
the magnetic disk.
• When external power is restored, the controller
copies the data back into RAM.
• Another form of solid-state disk is flash
memory, which is popular in cameras and
personal digital assistants (PDAs), in robots,
and increasingly for storage on general-
purpose computers.
9
 Storage Management Strategies
• Basic Hardware:
• Main memory and the registers built into
the processor itself are the only general-
purpose storage that the CPU can access
directly.
• Any instructions in execution, and any data
being used by the instructions, must be in
one of these direct-access storage devices.
• If the data are not in memory, they must be
moved there before the CPU can operate on
them.
10
• Registers that are built into the CPU are
generally accessible within one cycle of the CPU
clock.
• Most CPUs can decode instructions and
perform simple operations on register contents
at the rate of one or more operations per clock
tick.
• The same cannot be said of main memory,
which is accessed via a transaction on the
memory bus. Completing a memory access may
take many cycles of the CPU clock.
• We first need to make sure that each
process has a separate memory space.
11
• Separate per-process memory space protects
the processes from each other and is
fundamental to having multiple processes
loaded in memory for concurrent execution.
• To separate memory spaces, we need the ability
to determine the range of legal addresses that
the process may access and to ensure that the
process can access only these legal addresses.
• We can provide this protection by using two
registers, usually a base and a limit, as
illustrated in Figure.
• The base register holds the smallest legal
physical memory address; the limit register
specifies the size of the range.
12
Figure : A base and a limit register define a
logical address space.

13
• For example, if the base register holds 300040 and
the limit register is 120900, then the program can
legally access all addresses from 300040 through
420939 (inclusive).
• Protection of memory space is accomplished by
having the CPU hardware compare every address
generated in user mode with the registers.
• Any attempt by a program executing in user mode
to access operating-system memory or other users’
memory results in a trap to the operating system,
which treats the attempt as a fatal error (Figure).
• This scheme prevents a user program from
(accidentally or deliberately) modifying the code or
data structures of either the operating system or
other users.
14
Figure: Hardware address protection
with base and limit registers.

15
• The base and limit registers can be loaded
only by the operating system, which uses a
special privileged instruction.
• Since privileged instructions can be executed
only in kernel mode, and since only the
operating system executes in kernel mode,
only the operating system can load the base
and limit registers.
• This scheme allows the operating system to
change the value of the registers but prevents
user programs from changing the registers’
contents.

16
 Address Binding
• Usually, a program resides on a disk as a binary
executable file. To be executed, the program
must be brought into memory and placed within
a process.
• Depending on the memory management in use,
the process may be moved between disk and
memory during its execution.
• The processes on the disk that are waiting to be
brought into memory for execution form the
input queue.
• The normal single-tasking procedure is to select
one of the processes in the input queue and to
load that process into memory.
17
• As the process is executed, it accesses instructions and
data from memory. Eventually, the process terminates,
and its memory space is declared available.
• Classically, the binding of instructions and data to
memory addresses can be done at any step along the
way:
• Compile time. If you know at compile time where the
process will reside in memory, then absolute code can be
generated.
• For example, if you know that a user process will reside
starting at location R, then the generated compiler code
will start at that location and extend up from there.
• If, at some later time, the starting location changes, then
it will be necessary to recompile this code. The MS-
DOS .COM-format programs are bound at compile time.

18
• Load time. If it is not known at compile time
where the process will reside in memory, then
the compiler must generate relocatable code.
In this case, final binding is delayed until load
time. If the starting address changes, we need
only reload the user code to incorporate this
changed value.
• Execution time. If the process can be moved
during its execution from one memory
segment to another, then binding must be
delayed until run time.

19
Multistep Processing of a User Program

20
Logical Versus Physical Address Space
• An address generated by the CPU is commonly
referred to as a logical address, whereas an
address seen by the memory unit—that is, the
one loaded into the memory-address register of
the memory—is commonly referred to as a
physical address.
• The compile-time and load-time address-
binding methods generate identical logical and
physical addresses.
• However, the execution-time address binding
scheme results in differing logical and physical
addresses.
21
Figure: Dynamic relocation using
a relocation register

22
• we usually refer to the logical address as a
virtual address. We use logical address and
virtual address interchangeably in this text.
• The set of all logical addresses generated by a
program is a logical address space.
• The set of all physical addresses corresponding
to these logical addresses is a physical address
space.
• Thus, in the execution-time address-binding
scheme, the logical and physical address spaces
differ.
• The run-time mapping from virtual to physical
addresses is done by a hardware device called
the memory-management unit (MMU).
23
 Dynamic Loading
• In our discussion so far, it has been necessary
for the entire program and all data of a process
to be in physical memory for the process to
execute. The size of a process has thus been
limited to the size of physical memory.
• To obtain better memory-space utilization, we
can use dynamic loading. With dynamic
loading, a routine is not loaded until it is
called.
• All routines are kept on disk in a relocatable
load format. The main program is loaded into
memory and is executed.
24
• The advantage of dynamic loading is that a
routine is loaded only when it is needed. This
method is particularly useful when large
amounts of code are needed to handle
infrequently occurring cases, such as error
routines.
• Dynamic loading does not require special
support from the operating system. It is the
responsibility of the users to design their
programs to take advantage of such a method.

25
 Swapping
• A process must be in memory to be
executed. A process, however, can be
swapped temporarily out of memory to a
backing store and then brought back into
memory for continued execution.
• Swapping makes it possible for the total
physical address space of all processes to
exceed the real physical memory of the
system, thus increasing the degree of
multiprogramming in a system.

26
 Standard Swapping
• Standard swapping involves moving processes between main
memory and a backing store. The backing store is commonly a
fast disk.
• It must be large enough to accommodate copies of all memory
images for all users, and it must provide direct access to these
memory images.
• The system maintains a ready queue consisting of all
processes whose memory images are on the backing store or
in memory and are ready to run. Whenever the CPU scheduler
decides to execute a process, it calls the dispatcher.
• The dispatcher checks to see whether the next process in the
queue is in memory.
• If it is not, and if there is no free memory region, the
dispatcher swaps out a process currently in memory and
swaps in the desired process. It then reloads registers and
transfers control to the selected process.
27
Figure :Swapping of two processes
using a disk as a backing store.

28
• Notice that the major part of the swap
time is transfer time. The total transfer
time is directly proportional to the
amount of memory swapped.
• Clearly, it would be useful to know exactly
how much memory a user process is using,
not simply how much it might be using.
• Then we would need to swap only what is
actually used, reducing swap time. For this
method to be effective, the user must keep
the system informed of any changes in
memory requirements.

29
• Swapping is constrained by other factors as
well. If we want to swap a process, we must be
sure that it is completely idle.
• Of particular concern is any pending I/O. A
process may be waiting for an I/O operation
when we want to swap that process to free up
memory. However, if the I/O is asynchronously
accessing the user memory for I/O buffers,
then the process cannot be swapped.
• Assume that the I/O operation is queued
because the device is busy. If we were to swap
out process P1 and swap in process P2, the I/O
operation might then attempt to use memory
that now belongs to process P2.
30
• There are two main solutions to this problem:
never swap a process with pending I/O, or
execute I/O operations only into operating-
system buffers.
• Transfers between operating-system buffers and
process memory then occur only when the
process is swapped in.
• Standard swapping is not used in modern
operating systems. It requires too much swapping
time and provides too little execution time to be a
reasonable memory-management solution.
• Modified versions of swapping, however, are
found on many systems, including UNIX, Linux,
and Windows.
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 Contiguous Memory Allocation
• The main memory must accommodate both the
operating system and the various user processes.
We therefore need to allocate main memory in the
most efficient way possible. This section explains
one early method, contiguous memory allocation.
• The memory is usually divided into two partitions:
one for the resident operating system and one for the
user processes.
• We can place the operating system in either low
memory or high memory. The major factor affecting
this decision is the location of the interrupt vector.
Since the interrupt vector is often in low memory,
programmers usually place the operating system in
low memory as well.
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• We usually want several user processes to
reside in memory at the same time. We
therefore need to consider how to allocate
available memory to the processes that are in
the input queue waiting to be brought into
memory.
• In contiguous memory allocation, each process
is contained in a single section of memory that
is contiguous to the section containing the
next process.

33
 Memory Protection
• Before discussing memory allocation further, we
must discuss the issue of memory protection.
• If we have a system with a relocation register,
together with a limit register, we accomplish our
goal.
• The relocation register contains the value of the
smallest physical address; the limit register
contains the range of logical addresses. Each
logical address must fall within the range
specified by the limit register.
• The MMU maps the logical address dynamically
by adding the value in the relocation register.

34
Figure: Hardware support for relocation
and limit registers.

35
• When the CPU scheduler selects a process for
execution, the dispatcher loads the relocation
and limit registers with the correct values as
part of the context switch.
• Because every address generated by a CPU is
checked against these registers, we can protect
both the operating system and the other users’
programs and data from being modified by this
running process.
• The relocation-register scheme provides an
effective way to allow the operating system’s
size to change dynamically. This flexibility is
desirable in many situations.

36
 Memory Allocation
• One of the simplest methods for allocating memory
is to divide memory into several fixed-sized
partitions. Each partition may contain exactly one
process. Thus, the degree of multiprogramming is
bound by the number of partitions.
• In this multiple partition method, when a partition
is free, a process is selected from the input queue
and is loaded into the free partition.
• When the process terminates, the partition
becomes available for another process. This method
was originally used by the IBM OS/360 operating
system (called MFT)but is no longer in use.

37
• The method described next is a generalization
of the fixed-partition scheme (called MVT); it is
used primarily in batch environments. Many of
the ideas presented here are also applicable to
a time-sharing environment in which pure
segmentation is used for memory management.
• In the variable-partition scheme, the operating
system keeps a table indicating which parts of
memory are available and which are occupied.
• Initially, all memory is available for user
processes and is considered one large block of
available memory, a hole. Eventually, as you
will see, memory contains a set of holes of
various sizes.
38
• As processes enter the system, they are put
into an input queue. The operating system
takes into account the memory requirements of
each process and the amount of available
memory space in determining which processes
are allocated memory.
• When a process is allocated space, it is loaded
into memory, and it can then compete for CPU
time. When a process terminates, it releases its
memory, which the operating system may then
fill with another process from the input queue.
• At any given time, then, we have a list of
available block sizes and an input queue.

39
• The operating system can order the input queue
according to a scheduling algorithm. Memory is
allocated to processes until, finally, the memory
requirements of the next process cannot be
satisfied—that is, no available block of memory
(or hole) is large enough to hold that process.
• The operating system can then wait until a large
enough block is available, or it can skip down
the input queue to see whether the smaller
memory requirements of some other process
can be met.
• In general, as mentioned, the memory blocks
available comprise a set of holes of various
sizes scattered throughout memory.
40
• When a process arrives and needs memory, the
system searches the set for a hole that is large
enough for this process. If the hole is too large, it is
split into two parts. One part is allocated to the
arriving process; the other is returned to the set of
holes.
• When a process terminates, it releases its block of
memory, which is then placed back in the set of
holes. If the new hole is adjacent to other holes,
these adjacent holes are merged to form one larger
hole.
• At this point, the system may need to check
whether there are processes waiting for memory
and whether this newly freed and recombined
memory could satisfy the demands of any of these
waiting processes. 41
• There are many solutions to this problem. The
first-fit, best-fit, and worst-fit strategies are
the ones most commonly used to select a free
hole from the set of available holes.
• First fit. Allocate the first hole that is big
enough. Searching can start either at the
beginning of the set of holes or at the location
where the previous first-fit search ended. We
can stop searching as soon as we find a free
hole that is large enough.
• Best fit. Allocate the smallest hole that is big
enough. We must search the entire list,
unless the list is ordered by size. This strategy
produces the smallest leftover hole.
42
• Worst fit. Allocate the largest hole. Again, we
must search the entire list, unless it is sorted
by size. This strategy produces the largest
leftover hole, which may be more useful than
the smaller leftover hole from a best-fit
approach.
• Simulations have shown that both first fit and
best fit are better than worst fit in terms of
decreasing time and storage utilization.
• Neither first fit nor best fit is clearly better
than the other in terms of storage utilization,
but first fit is generally faster.

43
 Fragmentation
• Both the first-fit and best-fit strategies for memory
allocation suffer from external fragmentation.
• As processes are loaded and removed from
memory, the free memory space is broken into
little pieces.
• External fragmentation exists when there is
enough total memory space to satisfy a request
but the available spaces are not contiguous:
storage is fragmented into a large number of small
holes.
• This fragmentation problem can be severe. In the
worst case, we could have a block of free (or
wasted) memory between every two processes.
44
• If all these small pieces of memory were in one
big free block instead, we might be able to run
several more processes.
• Whether we are using the first-fit or best-fit
strategy can affect the amount of
fragmentation. (First fit is better for some
systems, whereas best fit is better for others.)
• Another factor is which end of a free block is
allocated.
• No matter which algorithm is used, however,
external fragmentation will be a problem.
• Memory fragmentation can be internal as well
as external.
45
• The general approach to avoiding this problem
is to break the physical memory into fixed-
sized blocks and allocate memory in units
based on block size.
• With this approach, the memory allocated to a
process may be slightly larger than the
requested memory.
• External Fragmentation – total memory space
exists to satisfy a request, but it is not
contiguous.
• Internal Fragmentation – allocated memory
may be slightly larger than requested memory;
this size difference is memory internal to a
partition, but not being used.
46
• One solution to the problem of external
fragmentation is compaction.
• The goal is to shuffle the memory contents so as to
place all free memory together in one large block.
• Compaction is not always possible, however. If
relocation is static and is done at assembly or load
time, compaction cannot be done.
• It is possible only if relocation is dynamic and is
done at execution time. If addresses are relocated
dynamically, relocation requires only moving the
program and data and then changing the base
register to reflect the new base address.
• When compaction is possible, we must determine
its cost.
47
• The simplest compaction algorithm is to move
all processes toward one end of memory; all
holes move in the other direction, producing
one large hole of available memory. This
scheme can be expensive.
• Another possible solution to the external-
fragmentation problem is to permit the logical
address space of the processes to be
noncontiguous, thus allowing a process to be
allocated physical memory wherever such
memory is available.
• Two complementary techniques achieve this
solution: segmentation and paging.
48
 Segmentation
• Memory-management scheme that supports
user view of memory.
• When writing a program, a programmer thinks
of it as a main program with a set of methods,
procedures, or functions. It may also include
various data structures: objects, arrays, stacks,
variables, and so on. Each of these modules or
data elements is referred to by name.
• The programmer talks about “the stack,” “the
math library,” and “the main program” without
caring what addresses in memory these
elements occupy.
49
• Segments vary in length, and the length of
each is intrinsically defined by its purpose in
the program.
• Elements within a segment are identified by
their offset from the beginning of the segment:
the first statement of the program, the seventh
stack frame entry in the stack, the fifth
instruction of the Sqrt(), and so on.
• Segmentation is a memory-management
scheme that supports this programmer view of
memory. A logical address space is a collection
of segments.

50
User’s View of a Program

51
 Logical View of Segmentation

1 4

3
2
4

user space physical memory space

52
• Each segment has a name and a length. The
addresses specify both the segment name and
the offset within the segment. The programmer
therefore specifies each address by two
quantities: a segment name and an offset.
• For simplicity of implementation, segments are
numbered and are referred to by a segment
number, rather than by a segment name. Thus,
a logical address consists of a two tuple:
<segment-number, offset>.
• Normally, when a program is compiled, the
compiler automatically constructs segments
reflecting the input program.

53
• A C compiler might create separate segments
for the following:
1. The code
2. Global variables
3. The heap, from which memory is allocated
4. The stacks used by each thread
5. The standard C library
• Libraries that are linked in during compile time
might be assigned separate segments.

54
 Segmentation Hardware
• Thus, we must define an implementation to
map two-dimensional user-defined addresses
into one-dimensional physical addresses.
• This mapping is effected by a segment table.
Each entry in the segment table has a segment
base and a segment limit. The segment base
contains the starting physical address where
the segment resides in memory, and the
segment limit specifies the length of the
segment.

55
Segmentation Hardware

56
• A logical address consists of two parts: a
segment number, s, and an offset into that
segment, d.
• The segment number is used as an index to
the segment table.
• The offset d of the logical address must be
between 0 and the segment limit. If it is not,
we trap to the operating system (logical
addressing attempt beyond end of segment).
• The segment table is thus essentially an array
of base–limit register pairs.

57
Example:
Consider the following segment table:
What are the physical addresses for the following logical
addresses?
a. 0, 430
Segment Base Length
b. 1, 10 0 219 600
c. 2, 500 1 2300 14
d. 3, 400 2 90 100
3 1327 580
e. 4, 112 4 1952 96
Answer:
a. 219 + 430 = 649
b. 2300 + 10 = 2310
c. illegal reference, trap to operating system
d. 1327 + 400 = 1727
e. illegal reference, trap to operating system

58
 Paging
• Segmentation permits the physical address
space of a process to be noncontiguous.
• Paging is another memory-management scheme
that offers this advantage. However, paging
avoids external fragmentation and the need for
compaction, whereas segmentation does not.
• It also solves the considerable problem of fitting
memory chunks of varying sizes onto the
backing store.
• Most memory-management schemes used before
the introduction of paging suffered from this
problem.
59
• Because of its advantages over earlier methods,
paging in its various forms is used in most
operating systems.
• Paging is implemented through cooperation
between the operating system and the computer
hardware.
Basic Method:
• The basic method for implementing paging
involves breaking physical memory into fixed-
sized blocks called frames and breaking logical
memory into blocks of the same size called pages.
• When a process is to be executed, its pages are
loaded into any available memory frames from
their source.
60
• The hardware support for paging is illustrated
in Figure.
• Every address generated by the CPU is divided
into two parts: a page number (p) and a page
offset (d). The page number is used as an
index into a page table. The page table
contains the base address of each page in
physical memory.
• This base address is combined with the page
offset to define the physical memory address
that is sent to the memory unit.

61
Figure: Paging Hardware

62
Paging Model of Logical and Physical Memory

63
• The page size (like the frame size) is defined by
the hardware. The size of a page is a power of
2, varying between 512 bytes and 1 GB per
page, depending on the computer architecture.
The selection of a power of 2 as a page size
makes the translation of a logical address into
a page number and page offset particularly
easy.
• If the size of the logical address space is 2m,
and a page size is 2n bytes, then the high-order
m− n bits of a logical address designate the
page number, and the n low-order bits
designate the page offset.
• Thus, the logical address is as follows:
64
Address Translation Scheme
• Address generated by CPU is divided into:
– Page number (p) – used as an index into a page table which
contains base address of each page in physical memory
– Page offset (d) – combined with base address to define the
physical memory address that is sent to the memory unit

page number page offset

p d
m-n n

– For given logical address space 2m and page size 2n

• where p is an index into the page table and d is the

displacement within the page.
65
consider the memory shown in Figure
Figure : Paging example for a 32-byte memory with 4-byte pages.

66
• Here, in the logical address, n= 2 and m = 4.
Using a page size of 4 bytes and a physical
memory of 32 bytes (8 pages), we show how the
programmer’s view of memory can be mapped
into physical memory. Logical address 0 is page
0, offset 0. Indexing into the page table, we find
that page 0 is in frame 5.
• Thus, logical address 0 maps to physical address
20 [= (5 × 4) +0]. Logical address 3 (page 0, offset
3) maps to physical address 23 [= (5 × 4) +3].
Logical address 4 is page 1, offset 0; according to
the page table, page 1 is mapped to frame 6.
Thus, logical address 4 maps to physical address
24 [= (6× 4) + 0]. Logical address 13 maps to
physical address 9.
67
 Free Frames

Before allocation After allocation

68
 Implementation of Page Table
• Page table is kept in main memory

• Page-table base register (PTBR) points to the page table

• Page-table length register (PTLR) indicates size of the page table

• In this scheme every data/instruction access requires two memory
accesses
– One for the page table and one for the data / instruction
• The two memory access problem can be solved by the use of a special
fast-lookup hardware cache called associative memory or translation
look-aside buffers (TLBs)
• Some TLBs store address-space identifiers (ASIDs) in each TLB entry –
uniquely identifies each process to provide address-space protection for
that process
– Otherwise need to flush at every context switch
• TLBs typically small (64 to 1,024 entries)
• On a TLB miss, value is loaded into the TLB for faster access next time
– Replacement policies must be considered
– Some entries can be wired down for permanent fast access

69