Computer Hardware &

Digital Logic (CCR204) /

Digital Circuits (ECR205)
Lecture 4
Introduction to Lecture 4
 Basic logic gate functions will be combined in
combinational logic circuits.
 Simplification of logic circuits will be done using
Boolean algebra and a mapping technique.
 Troubleshooting of combinational circuits will be
introduced.
 PLD and HDL control structures will be explained.
4-1 Sum-of-Products Form
 A Sum-of-products (SOP) expression will
appear as two or more AND terms ORed
together.

ABC  ABC
AB  ABC  C D  D
4-2 Simplifying Logic Circuits
 The circuits below both provide the same output, but
the lower one is clearly less complex.

 We will study simplifying logic circuits using

Boolean algebra and Karnaugh mapping
4-3 Algebraic Simplification
 Place the expression in SOP form by applying
DeMorgan’s theorems and multiplying terms.
 Check the SOP form for common factors and
perform factoring where possible.
 Note that this process may involve some trial
and error to obtain the simplest result.
4-4 Designing Combinational Logic
Circuits
 To solve any logic design problem:
 Interpret the problem and set up its truth table.
 Write the AND (product) term for each case where output = 1.
 Combine the terms in SOP form.
 Simplify the output expression if possible.
 Implement the circuit for the final, simplified expression.

Circuit that
produces a 1
output only for
the A = 0, B = 1
condition.
4-4 Designing Combinational Logic
Circuits
Each set of input conditions that is to produce a
1 output is implemented by a separate AND gate.
The AND outputs are ORed
OR to produce the final output.
4-4 Designing Combinational Logic
Circuits
Truth table for a 3-input circuit.
AND terms for each
case where output is 1.
4-4 Designing Combinational Logic
Circuits
Design a logic circuit with three inputs, A, B, and C.
Output to be HIGH only when a majority inputs are HIGH.
AND terms for each
Truth table. case where output is 1.

SOP expression for the output:

4-4 Designing Combinational Logic Circuits
Design a logic circuit with three inputs, A, B, and C.
Output to be HIGH only when a majority inputs are HIGH.
4-4 Designing Combinational Logic
Circuits
Design a logic circuit with three inputs, A, B, and C.
Output to be HIGH only when a majority inputs are HIGH.
Simplified output expression:

Implementing the
circuit after factoring:

Since the expression is in SOP form, the circuit is a

group of AND gates, working into a single OR gate,
Practice
 Design a logic circuit whose output is HIGH
only when a majority of
inputs A, B, and C are LOW.
4-5 Karnaugh Map Method
 A graphical method of simplifying logic equations or
truth tables—also called a K map.
 Theoretically can be used for any number of input
variables—practically limited to 5 or 6 variables.

The truth table values are placed in the K map.

Shown here is a two-variable map.
4-5 Karnaugh Map Method
Four-variable K-Map.

Adjacent K map square differ in only one

variable both horizontally and vertically.
A SOP expression can be obtained by
ORing
OR all squares that contain a 1.
4-5 Karnaugh Map Method
Looping 1s in adjacent groups of 2, 4, or 8
will result in further simplification.

Looping groups of 2 (Pairs)

Groups of 4 Groups of 8
(Quads) (Octets)
4-5 Karnaugh Map Method
 When the largest possible groups have been
looped, only the common terms are placed
in the final expression.
 Looping may also be wrapped between top,
bottom, and sides.
4-5 Karnaugh Map Method
 Complete K map simplification process:
 Construct the K map, place 1s as indicated in the truth table.
 Loop 1s that are not adjacent to any other 1s.
 Loop 1s that are in pairs.
 Loop 1s in octets even if they have already been looped.
 Loop quads that have one or more 1s not already looped.
 Loop any pairs necessary to include 1st not already looped.
 Form the OR sum of terms generated by each loop.
When a variable appears in both complemented and
uncomplemented form within a loop, that variable
is eliminated from the expression.

Variables that are the same for all squares of

the loop must appear in the final expression.
Two equally good k-maps (ex-4-13)
Don’t Care Conditions
Design of an Elevator Door Controller
 The circuit has four inputs. M is a logic signal that indicates when the
elevator is moving M = 1 or stopped M = 0. F1, F2, and F3 are floor
indicator signals that are normally LOW, and they go HIGH only when
the elevator is positioned at the level of that particular floor. For example,
when the elevator is lined up level with the second floor,
F2 = 1 and F1 = F3 = 0.
The circuit output is the OPEN signal, which is normally LOW and will go
HIGH when the elevator door is to be opened.
Design of an Elevator Door Controller
4-6 Exclusive OR and Exclusive NOR Circuits
 The exclusive OR (XOR) produces a HIGH output
whenever the two inputs are at opposite levels.
 The exclusive NOR (XNOR) produces a HIGH
output whenever the two inputs are at the same level.
 XOR and XNOR outputs are opposite.
Exclusive-OR
Exclusive-NOR
Output waveform of XOR

 How would be the output waveform for XNOR?

Use of XOR / XNOR
 When simplifying the expression for the output of a combinational logic
circuit, you may encounter the XOR or XNOR operations as you are
factoring. This will often lead to the use of XOR or XNOR gates in the
implementation of the final circuit.
Use of XOR / XNOR
4-7 Parity Generator and Checker

 XOR and XNOR

gates are useful in
circuits for parity
generation and
checking.
4-8 Enable/Disable Circuits
 A circuit is enabled when it allows the
passage of an input signal to the output.
 A circuit is disabled when it prevents the
passage of an input signal to the output.
 Situations requiring enable/disable circuits
occur frequently in digital circuit design.
4-9 Basic Characteristics of Digital ICs
 IC “chips” consist of resistors, diodes, and transistors
fabricated on a piece of semiconductor material called a
substrate.
 Digital ICs may be categorized according to the number
of logic gates on the substrate:
 SSI – less than 12
 MSI – 12 to 99
 LSI – 100 to 9999
 VLSI – 10,000 to 99,999
 ULSI – 100,000 to 999,999
 GSI – 1,000,000 or more
4-9 Basic Characteristics of Digital ICs
 The first package we will examine is the dual
in line package (DIP). The pin numbering
scheme is described in figure 4-29.
 PLDs have a different numbering scheme that
is also described in figure 4-29
4-9 Basic Characteristics of Digital ICs
 ICs are also categorized by the type of components
used in their circuits.
 Bipolar ICs use NPN and PNP transistors
 Unipolar ICs use FET transistors.
 The transistor-transistor logic (TTL) and the
complementary metal-oxide semiconductor (CMOS)
families will both be examined.
4-9 Basic Characteristics of Digital ICs
 The TTL family consists of subfamilies as listed
in table 4-6.
 The 74 series devices are all part of the standard TTL
series.
 The 74LS series devices are all part of the low power
Schottky TTL series.
 The differences between devices is limited to electrical
characteristics like power dissipation and switching speed.
The pin layout and logic operations are the same.
 The 7404, 74S04, 74LS04, and 74ALS04 are all hex (six to
a chip) inverters.
4-9 Basic Characteristics of Digital ICs
 The CMOS family consists of several series, some of
which are shown in table 4-7.
 CMOS devices perform the same function as, but are
not necessarily pin for pin compatible with TTL
devices.
 Characteristics of TTL and CMOS devices will be
explored in more detail in chapter 8.
4-9 Basic Characteristics of Digital ICs
 Power (referred to as VCC) and ground connections
are required for chip operation.
 VCC for TTL devices is normally +5 V.
 VDD for CMOS devices can be from +3 to +18 V.
 Logic levels for TTL and CMOS devices are shown
in figure 4-31.
 4-9 Basic Characteristics of Digital ICs
 Voltages that fall in the indeterminate range will
provide unpredictable results and should be avoided.

Ronald Tocci/Neal Widmer/Gregory Moss

Digital Systems: Principles and Applications, Copyright ©2007 by Pearson Education, Inc.
Columbus, OH 43235
10e
All rights reserved..
 4-9 Basic Characteristics of Digital ICs
 Inputs that are not connected are said to be floating.
The consequences of floating inputs differ for TTL
and CMOS.
 Floating TTL input acts like a logic 1. The voltage
measurement may appear in the indeterminate range, but
the device will behave as if there is a 1 on the floating
input.
 Floating CMOS inputs can cause overheating and damage
to the device. Some ICs have protection circuits built in,
but the best practice is to tie all unused inputs either high
or low.
Ronald Tocci/Neal Widmer/Gregory Moss
Digital Systems: Principles and Applications, Copyright ©2007 by Pearson Education, Inc.
Columbus, OH 43235
10e
All rights reserved..